[GAS][AARCH64]Add TLSDESC large memory model support.
bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * elfnn-aarch64.c (elfNN_aarch64_howto_table): Check overflow for BFD_RELOC_AARCH64_TLSDESC_OFF_G1. gas/ 2015-10-02 Renlin Li <renlin.li@arm.com> * config/tc-aarch64.c (s_tlsdescadd): New. (s_tlsdescldr): New. (md_pseudo_table): Handle tlsdescadd and tlsdescldr pseudo ops. (reloc_table): Add entries for BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC and BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC. (process_movw_reloc_info): Support AARCH64_TLSDESC_OFF_G1 and AARCH64_TLSDESC_OFF_G0_NC. (md_apply_fix): Likewise. (aarch64_force_relocation): Likewise. gas/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * gas/aarch64/reloc-tlsdesc_off_g0_nc.d: New. * gas/aarch64/reloc-tlsdesc_off_g0_nc.s: New. * gas/aarch64/reloc-tlsdesc_off_g1.d: New. * gas/aarch64/reloc-tlsdesc_off_g1.s: New. * gas/aarch64/tls-desc.d: New. * gas/aarch64/tls-desc.s: New.
This commit is contained in:
Renlin Li
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ac73473248
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@ -1,3 +1,8 @@
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2015-10-02 Renlin Li <renlin.li@arm.com>
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* elfnn-aarch64.c (elfNN_aarch64_howto_table): Check overflow for
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BFD_RELOC_AARCH64_TLSDESC_OFF_G1.
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2015-10-02 Renlin Li <renlin.li@arm.com>
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* elfnn-aarch64.c(IS_AARCH64_TLS_RELAX_RELOC):
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@ -1616,7 +1616,7 @@ static reloc_howto_type elfNN_aarch64_howto_table[] =
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12, /* bitsize */
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FALSE, /* pc_relative */
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0, /* bitpos */
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complain_overflow_dont, /* complain_on_overflow */
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complain_overflow_unsigned, /* complain_on_overflow */
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bfd_elf_generic_reloc, /* special_function */
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AARCH64_R_STR (TLSDESC_OFF_G1), /* name */
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FALSE, /* partial_inplace */
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@ -1,3 +1,15 @@
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2015-10-02 Renlin Li <renlin.li@arm.com>
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* config/tc-aarch64.c (s_tlsdescadd): New.
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(s_tlsdescldr): New.
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(md_pseudo_table): Handle tlsdescadd and tlsdescldr pseudo ops.
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(reloc_table): Add entries for BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC and
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BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC.
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(process_movw_reloc_info): Support AARCH64_TLSDESC_OFF_G1 and
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AARCH64_TLSDESC_OFF_G0_NC.
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(md_apply_fix): Likewise.
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(aarch64_force_relocation): Likewise.
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2015-10-02 Renlin Li <renlin.li@arm.com>
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* config/tc-aarch64.c (reloc_table): Add two entries for
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@ -1892,6 +1892,21 @@ s_aarch64_inst (int ignored ATTRIBUTE_UNUSED)
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}
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#ifdef OBJ_ELF
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/* Emit BFD_RELOC_AARCH64_TLSDESC_ADD on the next ADD instruction. */
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static void
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s_tlsdescadd (int ignored ATTRIBUTE_UNUSED)
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{
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expressionS exp;
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expression (&exp);
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frag_grow (4);
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fix_new_aarch64 (frag_now, frag_more (0) - frag_now->fr_literal, 4, &exp, 0,
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BFD_RELOC_AARCH64_TLSDESC_ADD);
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demand_empty_rest_of_line ();
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}
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/* Emit BFD_RELOC_AARCH64_TLSDESC_CALL on the next BLR instruction. */
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static void
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@ -1911,6 +1926,21 @@ s_tlsdesccall (int ignored ATTRIBUTE_UNUSED)
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demand_empty_rest_of_line ();
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}
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/* Emit BFD_RELOC_AARCH64_TLSDESC_LDR on the next LDR instruction. */
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static void
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s_tlsdescldr (int ignored ATTRIBUTE_UNUSED)
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{
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expressionS exp;
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expression (&exp);
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frag_grow (4);
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fix_new_aarch64 (frag_now, frag_more (0) - frag_now->fr_literal, 4, &exp, 0,
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BFD_RELOC_AARCH64_TLSDESC_LDR);
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demand_empty_rest_of_line ();
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}
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#endif /* OBJ_ELF */
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static void s_aarch64_arch (int);
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@ -1936,7 +1966,9 @@ const pseudo_typeS md_pseudo_table[] = {
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{"arch_extension", s_aarch64_arch_extension, 0},
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{"inst", s_aarch64_inst, 0},
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#ifdef OBJ_ELF
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{"tlsdescadd", s_tlsdescadd, 0},
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{"tlsdesccall", s_tlsdesccall, 0},
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{"tlsdescldr", s_tlsdescldr, 0},
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{"word", s_aarch64_elf_cons, 4},
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{"long", s_aarch64_elf_cons, 4},
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{"xword", s_aarch64_elf_cons, 8},
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@ -2648,6 +2680,24 @@ static struct reloc_table_entry reloc_table[] = {
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0,
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0},
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/* Lower 16 bit offset into GOT entry for a symbol */
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{"tlsdesc_off_g0_nc", 0,
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0, /* adr_type */
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0,
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BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC,
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0,
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0,
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0},
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/* Higher 16 bit offset into GOT entry for a symbol */
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{"tlsdesc_off_g1", 0,
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0, /* adr_type */
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0,
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BFD_RELOC_AARCH64_TLSDESC_OFF_G1,
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0,
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0,
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0},
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/* Get to the page containing GOT TLS entry for a symbol */
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{"gottprel", 0,
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0, /* adr_type */
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@ -4723,6 +4773,7 @@ process_movw_reloc_info (void)
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case BFD_RELOC_AARCH64_MOVW_G0_NC:
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case BFD_RELOC_AARCH64_MOVW_G0_S:
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case BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC:
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case BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC:
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case BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC:
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case BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC:
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case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0:
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@ -4735,6 +4786,7 @@ process_movw_reloc_info (void)
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case BFD_RELOC_AARCH64_MOVW_G1_NC:
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case BFD_RELOC_AARCH64_MOVW_G1_S:
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case BFD_RELOC_AARCH64_MOVW_GOTOFF_G1:
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case BFD_RELOC_AARCH64_TLSDESC_OFF_G1:
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case BFD_RELOC_AARCH64_TLSGD_MOVW_G1:
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case BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G1:
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case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1:
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@ -6859,6 +6911,22 @@ md_apply_fix (fixS * fixP, valueT * valP, segT seg)
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case BFD_RELOC_AARCH64_MOVW_GOTOFF_G1:
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scale = 16;
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goto movw_common;
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case BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC:
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scale = 0;
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S_SET_THREAD_LOCAL (fixP->fx_addsy);
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/* Should always be exported to object file, see
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aarch64_force_relocation(). */
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gas_assert (!fixP->fx_done);
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gas_assert (seg->use_rela_p);
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goto movw_common;
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case BFD_RELOC_AARCH64_TLSDESC_OFF_G1:
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scale = 16;
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S_SET_THREAD_LOCAL (fixP->fx_addsy);
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/* Should always be exported to object file, see
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aarch64_force_relocation(). */
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gas_assert (!fixP->fx_done);
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gas_assert (seg->use_rela_p);
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goto movw_common;
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case BFD_RELOC_AARCH64_MOVW_G2:
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case BFD_RELOC_AARCH64_MOVW_G2_NC:
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case BFD_RELOC_AARCH64_MOVW_G2_S:
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@ -6888,6 +6956,7 @@ md_apply_fix (fixS * fixP, valueT * valP, segT seg)
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case BFD_RELOC_AARCH64_MOVW_G2:
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case BFD_RELOC_AARCH64_MOVW_G3:
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case BFD_RELOC_AARCH64_MOVW_GOTOFF_G1:
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case BFD_RELOC_AARCH64_TLSDESC_OFF_G1:
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if (unsigned_overflow (value, scale + 16))
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as_bad_where (fixP->fx_file, fixP->fx_line,
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_("unsigned value out of range"));
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@ -7185,6 +7254,8 @@ aarch64_force_relocation (struct fix *fixp)
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case BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC:
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case BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC:
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case BFD_RELOC_AARCH64_TLSDESC_LD_PREL19:
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case BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC:
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case BFD_RELOC_AARCH64_TLSDESC_OFF_G1:
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case BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC:
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case BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21:
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case BFD_RELOC_AARCH64_TLSGD_ADR_PREL21:
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@ -1,3 +1,12 @@
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2015-10-02 Renlin Li <renlin.li@arm.com>
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* gas/aarch64/reloc-tlsdesc_off_g0_nc.d: New.
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* gas/aarch64/reloc-tlsdesc_off_g0_nc.s: New.
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* gas/aarch64/reloc-tlsdesc_off_g1.d: New.
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* gas/aarch64/reloc-tlsdesc_off_g1.s: New.
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* gas/aarch64/tls-desc.d: New.
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* gas/aarch64/tls-desc.s: New.
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2015-10-02 Renlin Li <renlin.li@arm.com>
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* gas/aarch64/reloc-gottprel_g0_nc.d: New.
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@ -0,0 +1,9 @@
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#objdump: -dr
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.*: file format .*
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Disassembly of section \.text:
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0000000000000000 <.*>:
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0: f280001c movk x28, #0x0
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0: R_AARCH64_TLSDESC_OFF_G0_NC x
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@ -0,0 +1,5 @@
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// Test file for AArch64 GAS -- tlsdesc_off_g0_nc
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func:
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// BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC
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movk x28, #:tlsdesc_off_g0_nc:x
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@ -0,0 +1,8 @@
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#objdump: -dr
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.*: file format .*
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Disassembly of section \.text:
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0000000000000000 <.*>:
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0: d2a0001c movz x28, #0x0, lsl #16
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0: R_AARCH64_TLSDESC_OFF_G1 x
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@ -0,0 +1,5 @@
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// Test file for AArch64 GAS -- tlsdesc_off_g1
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func:
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// BFD_RELOC_AARCH64_TLSDESC_OFF_G1
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movz x28, #:tlsdesc_off_g1:x
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@ -0,0 +1,17 @@
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#objdump: -dr
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.*: file format .*
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Disassembly of section \.text:
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0000000000000000 <.*>:
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0: d2a00000 movz x0, #0x0, lsl #16
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0: R_AARCH64_TLSDESC_OFF_G1 var
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4: f2800000 movk x0, #0x0
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4: R_AARCH64_TLSDESC_OFF_G0_NC var
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8: f8606a41 ldr x1, \[x18,x0\]
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8: R_AARCH64_TLSDESC_LDR var
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c: 8b000240 add x0, x18, x0
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c: R_AARCH64_TLSDESC_ADD var
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10: d63f0020 blr x1
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10: R_AARCH64_TLSDESC_CALL var
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@ -0,0 +1,16 @@
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func:
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// R_AARCH64_TLSDESC_0FF_G1 var
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movz x0, #:tlsdesc_off_g1:var
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// R_AARCH64_TLSDESC_OFF_G0_NC var
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movk x0, #:tlsdesc_off_g0_nc:var
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.tlsdescldr var
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// R_AARCH64_TLSDESC_LDR var
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ldr x1, [x18, x0]
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.tlsdescadd var
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// R_AARCH64_TLSDESC_ADD var
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add x0, x18, x0
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.tlsdesccall var
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// R_AARCH64_TLSDESC_CALL var
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blr x1
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