* gas/config/tc-tic4x.c: Remove c4x_pseudo_ignore function.
(c4x_operands_match): Added check for 8-bits LDF insn. Give warning when using constant direct bigger than 2^16. Add the new arguments. * include/opcode/tic4x.h: Major rewrite of entire file. Define instruction classes, and put each instruction into a class. * opcodes/tic4x-dis.c: (c4x_print_op): Add support for the new argument format. Fix bug in 'N' register printer.
This commit is contained in:
Svein Seldal
parent
18cde8d5ad
commit
44287f6039
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@ -1,3 +1,10 @@
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2002-11-16 Svein E. Seldal <Svein.Seldal@solidas.com>
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* config/tc-tic4x.c: Remove c4x_pseudo_ignore function.
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(c4x_operands_match): Added check for 8-bits LDF insn. Give
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warning when using constant direct bigger than 2^16. Add the new
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arguments.
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2002-11-11 Christopher Faylor <cgf@redhat.com>
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* configure.in: Use .gdbinit under Cygwin.
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@ -23,30 +23,41 @@
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TODOs:
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------
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o .align cannot handle fill-data larger than 0xFF/8-bits
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o .align cannot handle fill-data-width larger than 0xFF/8-bits. It
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should be possible to define a 32-bits pattern.
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o .align fills all section with NOP's when used regardless if has
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been used in .text or .data. (However the .align is primarely
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intended used in .text sections. If you require something else,
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use .align <size>,0x00)
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o .align: Implement a 'bu' insn if the number of nop's exeeds 4 within
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the align frag. if(fragsize>4words) insert bu fragend+1 first.
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o .align: Implement a 'bu' insn if the number of nop's exeeds 4
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within the align frag. if(fragsize>4words) insert bu fragend+1
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first.
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o .usect if has symbol on previous line not implemented
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o .sym, .eos, .stag, .etag, .member not implemented
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o Evaluation of constant floating point expressions (expr.c needs work!)
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o Evaluation of constant floating point expressions (expr.c needs
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work!)
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o Warnings issued if parallel load of same register
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o Warnings issued if parallel load of same register. Applies to LL
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class. Can be applied to destination of the LS class as well, but
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the test will be more complex.
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o Support 'abc' constants?
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o Support new opcodes and implement a silicon version switch (maybe -mpg)
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o Support new opcodes and implement a silicon version switch (maybe
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-mpg)
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o Disallow non-float registers in float instructions. Make as require
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'fx' notation on floats, while 'rx' on the rest
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o Disallow non-float registers in float instructions.
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o Make sure the source and destination register is NOT equal when
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the C4X LDA insn is used (arg mode Q,Y)
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o Merge the C3x op-table and the c4x op-table, and adhere to the
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last argument when parsing the hash.
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*/
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#include <stdio.h>
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@ -155,8 +166,6 @@ static void c4x_usect
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PARAMS ((int));
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static void c4x_version
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PARAMS ((int));
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static void c4x_pseudo_ignore
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PARAMS ((int));
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static void c4x_init_regtable
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PARAMS ((void));
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static void c4x_init_symbols
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@ -1792,9 +1801,19 @@ c4x_operands_match (inst, insn)
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use an immediate mode form of ldiu or ldpk instruction. */
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if (exp->X_op == O_constant)
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{
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/* Maybe for C3x we should check for 8 bit number. */
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INSERTS (opcode, exp->X_add_number, 15, 0);
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continue;
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if( ( IS_CPU_C4X (c4x_cpu) && exp->X_add_number <= 65535 )
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|| ( IS_CPU_C3X (c4x_cpu) && exp->X_add_number <= 255 ) )
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{
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INSERTS (opcode, exp->X_add_number, 15, 0);
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continue;
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}
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else
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{
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as_bad ("LDF's immediate value of %ld is too large",
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(long) exp->X_add_number);
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ret = -1;
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continue;
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}
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}
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else if (exp->X_op == O_symbol)
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{
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@ -1809,9 +1828,19 @@ c4x_operands_match (inst, insn)
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break;
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if (exp->X_op == O_constant)
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{
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/* Store only the 16 LSBs of the number. */
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INSERTS (opcode, exp->X_add_number, 15, 0);
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continue;
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if(exp->X_add_number <= 65535)
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{
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/* Store only the 16 LSBs of the number. */
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INSERTS (opcode, exp->X_add_number, 15, 0);
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continue;
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}
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else
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{
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as_bad ("Direct value of %ld is too large",
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(long) exp->X_add_number);
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ret = -1;
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continue;
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}
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}
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else if (exp->X_op == O_symbol)
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{
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@ -1871,6 +1900,7 @@ c4x_operands_match (inst, insn)
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break;
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if (operand->mode != M_INDIRECT)
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break;
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/* Require either *+ARn(disp) or *ARn. */
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if (operand->expr.X_add_number != 0
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&& operand->expr.X_add_number != 0x18)
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{
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@ -1888,6 +1918,20 @@ c4x_operands_match (inst, insn)
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INSERTU (opcode, exp->X_add_number, 7, 0);
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continue;
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case 'e':
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if (!(operand->mode == M_REGISTER))
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break;
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reg = exp->X_add_number;
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if ( (reg >= REG_R0 && reg <= REG_R7)
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|| (IS_CPU_C4X (c4x_cpu) && reg >= REG_R8 && reg <= REG_R11) )
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INSERTU (opcode, reg, 7, 0);
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else
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{
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as_bad ("Register must be Rn");
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ret = -1;
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}
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continue;
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case 'F':
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if (operand->mode != M_IMMED_F
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&& !(operand->mode == M_IMMED && exp->X_op == O_constant))
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@ -1913,6 +1957,20 @@ c4x_operands_match (inst, insn)
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INSERTU (opcode, exp->X_add_number, 15, 8);
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continue;
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case 'g':
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if (operand->mode != M_REGISTER)
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break;
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reg = exp->X_add_number;
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if ( (reg >= REG_R0 && reg <= REG_R7)
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|| (IS_CPU_C4X (c4x_cpu) && reg >= REG_R8 && reg <= REG_R11) )
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INSERTU (opcode, reg, 15, 8);
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else
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{
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as_bad ("Register must be Rn");
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ret = -1;
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}
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continue;
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case 'H':
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if (operand->mode != M_REGISTER)
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break;
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@ -2058,6 +2116,20 @@ c4x_operands_match (inst, insn)
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INSERTU (opcode, reg, 15, 0);
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continue;
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case 'q':
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if (operand->mode != M_REGISTER)
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break;
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reg = exp->X_add_number;
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if ( (reg >= REG_R0 && reg <= REG_R7)
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|| (IS_CPU_C4X (c4x_cpu) && reg >= REG_R8 && reg <= REG_R11) )
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INSERTU (opcode, reg, 15, 0);
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else
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{
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as_bad ("Register must be Rn");
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ret = -1;
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}
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continue;
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case 'R':
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if (operand->mode != M_REGISTER)
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break;
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@ -2065,6 +2137,20 @@ c4x_operands_match (inst, insn)
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INSERTU (opcode, reg, 20, 16);
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continue;
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case 'r':
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if (operand->mode != M_REGISTER)
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break;
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reg = exp->X_add_number;
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if ( (reg >= REG_R0 && reg <= REG_R7)
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|| (IS_CPU_C4X (c4x_cpu) && reg >= REG_R8 && reg <= REG_R11) )
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INSERTU (opcode, reg, 20, 16);
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else
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{
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as_bad ("Register must be Rn");
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ret = -1;
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}
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continue;
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case 'S': /* Short immediate int. */
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if (operand->mode != M_IMMED && operand->mode != M_HI)
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break;
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@ -1,3 +1,8 @@
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2002-11-16 Svein E. Seldal <Svein.Seldal@solidas.com>
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* opcode/tic4x.h: Major rewrite of entire file. Define
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instruction classes, and put each instruction into a class.
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2002-11-14 Egor Duda <deo@logos-m.ru>
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* bfdlink.h (struct bfd_link_info): Add new boolean
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File diff suppressed because it is too large
Load Diff
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@ -1,3 +1,8 @@
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2002-11-16 Svein E. Seldal <Svein.Seldal@solidas.com>
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* tic4x-dis.c: (c4x_print_op): Add support for the new argument
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format. Fix bug in 'N' register printer.
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2002-11-12 Segher Boessenkool <segher@koffie.nl>
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* ppc-dis.c (print_insn_powerpc): Correct condition register display.
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@ -479,6 +479,7 @@ c4x_print_op (info, instruction, p, pc)
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break;
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case 'E': /* register 0--7 */
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case 'e':
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if (! c4x_print_register (info, EXTRU (instruction, 7, 0)))
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return 0;
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break;
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@ -501,6 +502,7 @@ c4x_print_op (info, instruction, p, pc)
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break;
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case 'G': /* register 8--15 */
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case 'g':
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if (! c4x_print_register (info, EXTRU (instruction, 15, 8)))
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return 0;
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break;
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@ -525,7 +527,7 @@ c4x_print_op (info, instruction, p, pc)
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break;
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case 'N': /* register 23--23 */
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c4x_print_register (info, EXTRU (instruction, 22, 22) + REG_R0);
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c4x_print_register (info, EXTRU (instruction, 23, 23) + REG_R0);
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break;
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case 'O': /* indirect (short C4x) 8--15 */
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@ -542,11 +544,13 @@ c4x_print_op (info, instruction, p, pc)
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break;
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case 'Q': /* register 0--15 */
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case 'q':
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if (! c4x_print_register (info, EXTRU (instruction, 15, 0)))
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return 0;
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break;
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case 'R': /* register 16--20 */
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case 'r':
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if (! c4x_print_register (info, EXTRU (instruction, 20, 16)))
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return 0;
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break;
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