Enable bfd_assembler by default for the MAXQ port.

Adjust the testsuite expected disassemblies to take this into account.
This commit is contained in:
Nick Clifton 2004-11-18 16:20:11 +00:00
parent 15f5e61fb4
commit 444bf5f39e
7 changed files with 46 additions and 32 deletions

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@ -1,3 +1,8 @@
2004-11-18 Inderpreet Singh <inderpreetb@nioda.hcltech.com>
* configure.in: Enable bfd_assember for the MAXQ port.
* configure: Regenerate.
2004-11-12 Bob Wilson <bob.wilson@acm.org>
Sterling Augustine <sterling@tensilica.com>

2
gas/configure vendored
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@ -4442,7 +4442,7 @@ echo "$as_me: WARNING: GAS support for ${generic_target} is preliminary and a wo
m88k-motorola-sysv3*) fmt=coff em=delt88 ;;
m88k-*-coff*) fmt=coff ;;
maxq-*-coff) fmt=coff ;;
maxq-*-coff) fmt=coff bfd_gas=yes ;;
mcore-*-elf) fmt=elf ;;
mcore-*-pe) fmt=coff em=pe bfd_gas=yes ;;

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@ -381,7 +381,7 @@ changequote([,])dnl
m88k-motorola-sysv3*) fmt=coff em=delt88 ;;
m88k-*-coff*) fmt=coff ;;
maxq-*-coff) fmt=coff ;;
maxq-*-coff) fmt=coff bfd_gas=yes ;;
mcore-*-elf) fmt=elf ;;
mcore-*-pe) fmt=coff em=pe bfd_gas=yes ;;

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@ -1,3 +1,10 @@
2004-11-18 Inderpreet Singh <inderpreetb@nioda.hcltech.com>
* gas/maxq10/call.d: Fix expected results now that bfd assembler
support is enabled by default.
* gas/maxq10/range.d: Likewise.
* gas/maxq20/call.d: Likewise.
2004-11-17 Daniel Jacobowitz <dan@codesourcery.com>
* gas/arm/mapping.d: Expect F markers for Thumb code.

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@ -5,32 +5,34 @@
Disassembly of section .text:
0+000 <foo>:
0: 02 3d [ ]*CALL #02h
2: 00 0b [ ]*MOVE PFX\[0\], #00h
0+004 <SmallCall>:
4: 0d 8c [ ]*RET
6: 0d ac [ ]*RET C
8: 0d 9c [ ]*RET Z
a: 0d dc [ ]*RET NZ
c: 0d cc [ ]*RET S
e: 8d 8c [ ]*RETI
10: 8d ac [ ]*RETI C
12: 8d 9c [ ]*RETI Z
14: 8d dc [ ]*RETI NZ
16: 8d cc [ ]*RETI S
18: 10 7d [ ]*MOVE LC\[1\], #10h
1a: 00 3d [ ]*CALL #00h
1c: ff 5d [ ]*DJNZ LC\[1\], #ffh
1e: 10 7d [ ]*MOVE LC\[1\], #10h
20: 00 3d [ ]*CALL #00h
0: 03 3d [ ]*CALL #03h
2: 04 0b [ ]*MOVE PFX\[0\], #04h
4: 28 3d [ ]*CALL #28h
0+6 <SmallCall>:
6: 0d 8c [ ]*RET
8: 0d ac [ ]*RET C
a: 0d 9c [ ]*RET Z
c: 0d dc [ ]*RET NZ
e: 0d cc [ ]*RET S
10: 8d 8c [ ]*RETI
12: 8d ac [ ]*RETI C
14: 8d 9c [ ]*RETI Z
16: 8d dc [ ]*RETI NZ
18: 8d cc [ ]*RETI S
1a: 10 7d [ ]*MOVE LC\[1\], #10h
0+1c <LoopTop>:
1c: 00 3d [ ]*CALL #00h
1e: ff 5d [ ]*DJNZ LC\[1\], #ffh
20: 10 7d [ ]*MOVE LC\[1\], #10h
0+22 <LoopTop1>:
22: 00 3d [ ]*CALL #00h
...
422: 00 0b [ ]*MOVE PFX\[0\], #00h
424: 1c 5d [ ]*DJNZ LC\[1\], #1ch
426: 8d 8c [ ]*RETI
428: 8d ac [ ]*RETI C
42a: 8d 9c [ ]*RETI Z
42c: 8d dc [ ]*RETI NZ
42e: 8d cc [ ]*RETI S
424: 00 0b [ ]*MOVE PFX\[0\], #00h
426: 1c 5d [ ]*DJNZ LC\[1\], #1ch
0+428 <LongCall>:
428: 8d 8c [ ]*RETI
42a: 8d ac [ ]*RETI C
42c: 8d 9c [ ]*RETI Z
42e: 8d dc [ ]*RETI NZ
430: 8d cc [ ]*RETI S
...

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@ -46,4 +46,4 @@ Disassembly of section .text:
4c: 81 4a [ ]*ADD #81h
4e: ff 0b [ ]*MOVE PFX\[0\], #ffh
50: 7f 4a [ ]*ADD #7fh
...

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@ -24,14 +24,14 @@ Disassembly of section .text:
0+01c <LoopTop>:
1c: 00 3d [ ]*CALL #00h
1e: ff 5d [ ]*DJNZ LC\[1\], #ffh
1e: ff 5d [ ]*DJNZ LC\[1\], #ffh
20: 10 7d [ ]*MOVE LC\[1\], #10h
0+022 <LoopTop1>:
22: 00 3d [ ]*CALL #00h
...
424: 00 0b [ ]*MOVE PFX\[0\], #00h
426: 1c 5d [ ]*DJNZ LC\[1\], #1ch
426: 1c 5d [ ]*DJNZ LC\[1\], #1ch
0+428 <LongCall>:
428: 8d 8c [ ]*RETI