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bfd/

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2014-02-04  Heiher <r@hev.cc>

	* elfxx-mips.c (mips_set_isa_flags): Use E_MIPS_ARCH_64R2 for
	Loongson-3A.
	(mips_mach_extensions): Make bfd_mach_mips_loongson_3a an
	extension of bfd_mach_mipsisa64r2.

opcodes/
2014-02-04  Heiher <r@hev.cc>

	* mips-dis.c (mips_arch_choices): Usee ISA_MIPS64R2 for Loongson-3A.

gas/
2014-02-04  Heiher <r@hev.cc>

	* config/tc-mips.c (mips_cpu_info_table): Use ISA_MIPS64R2 for
	Loongson-3A.
This commit is contained in:
Richard Sandiford 2014-03-04 21:18:02 +00:00
parent 079b5aec63
commit 4ba154f579
6 changed files with 20 additions and 4 deletions
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7
bfd/ChangeLog
View File

@ -1,3 +1,10 @@
2014-03-04 Heiher <r@hev.cc>
* elfxx-mips.c (mips_set_isa_flags): Use E_MIPS_ARCH_64R2 for
Loongson-3A.
(mips_mach_extensions): Make bfd_mach_mips_loongson_3a an
extension of bfd_mach_mipsisa64r2.
2014-03-04 Nick Clifton <nickc@redhat.com>
PR ld/16017

4
bfd/elfxx-mips.c
View File

@ -11624,7 +11624,7 @@ mips_set_isa_flags (bfd *abfd)
break;
case bfd_mach_mips_loongson_3a:
val = E_MIPS_ARCH_64 | E_MIPS_MACH_LS3A;
val = E_MIPS_ARCH_64R2 | E_MIPS_MACH_LS3A;
break;
case bfd_mach_mips_octeon:
@ -14208,12 +14208,12 @@ static const struct mips_mach_extension mips_mach_extensions[] =
{ bfd_mach_mips_octeon2, bfd_mach_mips_octeonp },
{ bfd_mach_mips_octeonp, bfd_mach_mips_octeon },
{ bfd_mach_mips_octeon, bfd_mach_mipsisa64r2 },
{ bfd_mach_mips_loongson_3a, bfd_mach_mipsisa64r2 },
/* MIPS64 extensions. */
{ bfd_mach_mipsisa64r2, bfd_mach_mipsisa64 },
{ bfd_mach_mips_sb1, bfd_mach_mipsisa64 },
{ bfd_mach_mips_xlr, bfd_mach_mipsisa64 },
{ bfd_mach_mips_loongson_3a, bfd_mach_mipsisa64 },
/* MIPS V extensions. */
{ bfd_mach_mipsisa64, bfd_mach_mips5 },

5
gas/ChangeLog
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@ -1,3 +1,8 @@
2014-03-04 Heiher <r@hev.cc>
* config/tc-mips.c (mips_cpu_info_table): Use ISA_MIPS64R2 for
Loongson-3A.
2014-03-03 Nick Clifton <nickc@redhat.com>
* config/msp430/msp430.c: Replace known mcu array with known

2
gas/config/tc-mips.c
View File

@ -17904,7 +17904,7 @@ static const struct mips_cpu_info mips_cpu_info_table[] =
/* Broadcom SB-1A CPU core */
{ "sb1a", 0, ASE_MIPS3D | ASE_MDMX, ISA_MIPS64, CPU_SB1 },
{ "loongson3a", 0, 0, ISA_MIPS64, CPU_LOONGSON_3A },
{ "loongson3a", 0, 0, ISA_MIPS64R2, CPU_LOONGSON_3A },
/* MIPS 64 Release 2 */

4
opcodes/ChangeLog
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@ -1,3 +1,7 @@
2014-03-04 Heiher <r@hev.cc>
* mips-dis.c (mips_arch_choices): Usee ISA_MIPS64R2 for Loongson-3A.
2014-03-04 Richard Sandiford <rdsandiford@googlemail.com>
* mips-opc.c (mips_builtin_opcodes): Move the udi* instructions

2
opcodes/mips-dis.c
View File

@ -588,7 +588,7 @@ const struct mips_arch_choice mips_arch_choices[] =
NULL, 0, mips_cp1_names_numeric, mips_hwr_names_numeric },
{ "loongson3a", 1, bfd_mach_mips_loongson_3a, CPU_LOONGSON_3A,
ISA_MIPS64 | INSN_LOONGSON_3A, 0, mips_cp0_names_numeric,
ISA_MIPS64R2 | INSN_LOONGSON_3A, 0, mips_cp0_names_numeric,
NULL, 0, mips_cp1_names_mips3264, mips_hwr_names_numeric },
{ "octeon", 1, bfd_mach_mips_octeon, CPU_OCTEON,