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Update x86 register name documentation.

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* doc/c-i386.texi (Register Naming): Update to details of the
        latest architecture version.
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Ulrich Drepper 2016-03-15 11:00:28 +00:00 committed by Nick Clifton
parent 5f7ebda2e2
commit 4bde3cdd70
2 changed files with 48 additions and 7 deletions
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@ -1,3 +1,8 @@
2016-03-15 Ulrich Drepper <drepper@gmail.com>
* doc/c-i386.texi (Register Naming): Update to details of the
latest architecture version.
2016-03-10 Mickael Guene <mickael.guene@st.com> 2016-03-10 Mickael Guene <mickael.guene@st.com>
PR gas/19744 PR gas/19744

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gas/doc/c-i386.texi
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@ -663,8 +663,8 @@ the 6 section registers @samp{%cs} (code section), @samp{%ds}
and @samp{%gs}. and @samp{%gs}.
@item @item
the 3 processor control registers @samp{%cr0}, @samp{%cr2}, and the 5 processor control registers @samp{%cr0}, @samp{%cr2},
@samp{%cr3}. @samp{%cr3}, @samp{%cr4}, and @samp{%cr8}.
@item @item
the 6 debug registers @samp{%db0}, @samp{%db1}, @samp{%db2}, the 6 debug registers @samp{%db0}, @samp{%db1}, @samp{%db2},
@ -682,7 +682,7 @@ These registers are overloaded by 8 MMX registers @samp{%mm0},
@samp{%mm6} and @samp{%mm7}. @samp{%mm6} and @samp{%mm7}.
@item @item
the 8 SSE registers registers @samp{%xmm0}, @samp{%xmm1}, @samp{%xmm2}, the 8 128-bit SSE registers registers @samp{%xmm0}, @samp{%xmm1}, @samp{%xmm2},
@samp{%xmm3}, @samp{%xmm4}, @samp{%xmm5}, @samp{%xmm6} and @samp{%xmm7}. @samp{%xmm3}, @samp{%xmm4}, @samp{%xmm5}, @samp{%xmm6} and @samp{%xmm7}.
@end itemize @end itemize
@ -699,13 +699,13 @@ pointer)
the 8 extended registers @samp{%r8}--@samp{%r15}. the 8 extended registers @samp{%r8}--@samp{%r15}.
@item @item
the 8 32-bit low ends of the extended registers: @samp{%r8d}--@samp{%r15d} the 8 32-bit low ends of the extended registers: @samp{%r8d}--@samp{%r15d}.
@item @item
the 8 16-bit low ends of the extended registers: @samp{%r8w}--@samp{%r15w} the 8 16-bit low ends of the extended registers: @samp{%r8w}--@samp{%r15w}.
@item @item
the 8 8-bit low ends of the extended registers: @samp{%r8b}--@samp{%r15b} the 8 8-bit low ends of the extended registers: @samp{%r8b}--@samp{%r15b}.
@item @item
the 4 8-bit registers: @samp{%sil}, @samp{%dil}, @samp{%bpl}, @samp{%spl}. the 4 8-bit registers: @samp{%sil}, @samp{%dil}, @samp{%bpl}, @samp{%spl}.
@ -714,7 +714,43 @@ the 4 8-bit registers: @samp{%sil}, @samp{%dil}, @samp{%bpl}, @samp{%spl}.
the 8 debug registers: @samp{%db8}--@samp{%db15}. the 8 debug registers: @samp{%db8}--@samp{%db15}.
@item @item
the 8 SSE registers: @samp{%xmm8}--@samp{%xmm15}. the 8 128-bit SSE registers: @samp{%xmm8}--@samp{%xmm15}.
@end itemize
With the AVX extensions more registers were made available:
@itemize @bullet
@item
the 16 256-bit SSE @samp{%ymm0}--@samp{%ymm15} (only the first 8
available in 32-bit mode). The bottom 128 bits are overlaid with the
@samp{xmm0}--@samp{xmm15} registers.
@end itemize
The AVX2 extensions made in 64-bit mode more registers available:
@itemize @bullet
@item
the 16 128-bit registers @samp{%xmm16}--@samp{%xmm31} and the 16 256-bit
registers @samp{%ymm16}--@samp{%ymm31}.
@end itemize
The AVX512 extensions added the following registers:
@itemize @bullet
@item
the 32 512-bit registers @samp{%zmm0}--@samp{%zmm31} (only the first 8
available in 32-bit mode). The bottom 128 bits are overlaid with the
@samp{%xmm0}--@samp{%xmm31} registers and the first 256 bits are
overlaid with the @samp{%ymm0}--@samp{%ymm31} registers.
@item
the 8 mask registers @samp{%k0}--@samp{%k7}.
@end itemize @end itemize
@node i386-Prefixes @node i386-Prefixes