Add -mcom support.
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@ -1,3 +1,18 @@
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Sun Oct 15 22:06:14 1995 Michael Meissner <meissner@cygnus.com>
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* config/tc-ppc.c (md_parse_option): Support for -mcom to turn on
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common mode operation.
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(md_show_usage): Add -mcom to usage message.
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(md_begin): If the target CPU is common mode, only allow
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instructions in both architectures.
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Fri Oct 13 13:32:45 1995 steve chamberlain <sac@slash.cygnus.com>
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* expr.c (op_rank): Add O_symbol_rva.
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* expr.h (operatorT): Add O_symbol_rva.
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* read.c (cons_worker): Set O_symbol_rva when necessary.
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* write.c (fix_new_exp): Understand O_symbol_rva.
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Tue Oct 10 11:34:14 1995 Ian Lance Taylor <ian@cygnus.com>
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* config/tc-mips.c: Correct s_cons arguments. From Michael
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@ -582,6 +582,10 @@ md_parse_option (c, arg)
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ppc_cpu = PPC_OPCODE_PPC;
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ppc_size = PPC_OPCODE_64;
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}
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/* -mcom means assemble for the common intersection between Power
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and PowerPC. */
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else if (strcmp (arg, "com") == 0)
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ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_PPC;
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/* -many means to assemble for any architecture (PWR/PWRX/PPC). */
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else if (strcmp (arg, "any") == 0)
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ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_POWER2 | PPC_OPCODE_PPC;
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@ -656,6 +660,7 @@ PowerPC options:\n\
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-mppc, -mppc32, -m403, -m603, -m604\n\
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generate code for Motorola PowerPC 603/604\n\
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-mppc64, -m620 generate code for Motorola PowerPC 620\n\
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-mcom generate code Power/PowerPC common instructions\n
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-many generate code for any architecture (PWR/PWRX/PPC)\n");
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#ifdef OBJ_ELF
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fprintf(stream, "\
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@ -737,7 +742,10 @@ md_begin ()
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if ((op->flags & ppc_cpu) != 0
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&& ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64)) == 0
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|| (op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64)) == ppc_size))
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|| (op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64)) == ppc_size)
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/* If -mcom, check for instructions not in both Power/PowerPC */
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&& (ppc_cpu != (PPC_OPCODE_POWER | PPC_OPCODE_PPC)
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|| (op->flags & (PPC_OPCODE_POWER | PPC_OPCODE_PPC)) == ppc_cpu))
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{
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const char *retval;
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@ -1648,7 +1656,7 @@ ppc_macro (str, macro)
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const struct powerpc_macro *macro;
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{
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char *operands[10];
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int count;
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unsigned int count;
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char *s;
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unsigned int len;
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const char *format;
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@ -2342,18 +2350,19 @@ ppc_biei (ei)
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name = demand_copy_C_string (&len);
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/* The value of these symbols is actually file offset. Here we set
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the value to the index into the line number entries. In
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ppc_frob_symbols we set the fix_line field, which will cause BFD
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to do the right thing. */
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sym = symbol_make (name);
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S_SET_SEGMENT (sym, ppc_coff_debug_section);
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S_SET_SEGMENT (sym, now_seg);
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S_SET_VALUE (sym, coff_n_line_nos);
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sym->bsym->flags |= BSF_DEBUGGING;
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/* FIXME: The value of the .bi or .ei symbol is supposed to be the
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offset in the file to the line number entry to use. That is
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quite difficult to implement using BFD, so I'm just not doing it.
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Sorry. Please add it if you can figure out how. Note that this
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approach is the only way to support multiple files in COFF, since
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line numbers are associated with function symbols. Note further
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that it still doesn't work, since the line numbers are stored as
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offsets from a base line number. */
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/* obj-coff.c currently only handles line numbers correctly in the
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.text section. */
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assert (now_seg == text_section);
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S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
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sym->sy_tc.output = 1;
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@ -3431,6 +3440,8 @@ ppc_frob_symbol (sym)
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&& S_GET_STORAGE_CLASS (sym) != C_FCN
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&& S_GET_STORAGE_CLASS (sym) != C_BSTAT
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&& S_GET_STORAGE_CLASS (sym) != C_ESTAT
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&& S_GET_STORAGE_CLASS (sym) != C_BINCL
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&& S_GET_STORAGE_CLASS (sym) != C_EINCL
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&& S_GET_SEGMENT (sym) != ppc_coff_debug_section)
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S_SET_STORAGE_CLASS (sym, C_HIDEXT);
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@ -3575,6 +3586,14 @@ ppc_frob_symbol (sym)
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resolve_symbol_value (csect);
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S_SET_VALUE (sym, S_GET_VALUE (sym) - S_GET_VALUE (csect));
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}
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else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
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|| S_GET_STORAGE_CLASS (sym) == C_EINCL)
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{
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/* We want the value to be a file offset into the line numbers.
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BFD will do that for us if we set the right flags. We have
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already set the value correctly. */
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coffsymbol (sym->bsym)->native->fix_line = 1;
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}
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return 0;
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}
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