* interp.c (BUSERROR): New macro.
([r|w][bwl]at[little|big]) New functions. (sim_resume): If GO32 check for interrupt every now and again. Decrement PC if SIGBUS seen. * run.c (main): Return result of simulated _exit.
This commit is contained in:
Steve Chamberlain
parent
582d2a4d37
commit
4d0be1f5d4
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@ -1,3 +1,19 @@
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Wed Dec 28 21:25:31 1994 Steve Chamberlain (sac@jonny.cygnus.com)
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* interp.c (BUSERROR): New macro.
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([r|w][bwl]at[little|big]) New functions.
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(sim_resume): If GO32 check for interrupt every now
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and again. Decrement PC if SIGBUS seen.
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* run.c (main): Return result of simulated _exit.
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Mon Dec 5 21:59:51 1994 Doug Evans <dje@canuck.cygnus.com>
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* Makefile.in (gencode): Allow build in different directory.
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Wed Nov 30 17:47:13 1994 Jim Wilson <wilson@chestnut.cygnus.com>
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* Makefile.in (gencode): Change $< to gencode.c for portability.
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Wed Nov 23 21:31:55 1994 Steve Chamberlain (sac@jonny.cygnus.com)
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* interp.c ([wr][bwl]at): New functions.
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599
sim/sh/interp.c
599
sim/sh/interp.c
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@ -27,7 +27,7 @@
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#include "../../newlib/libc/sys/sh/sys/syscall.h"
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#define O_RECOMPILE 85
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#define DEFINE_TABLE
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/*#define ACE_FAST*/
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#define DISASSEMBLER_TABLE
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#define SBIT(x) ((x)&sbit)
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@ -51,19 +51,21 @@
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#define PC pc
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#define C cycles
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char *fail()
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int
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fail ()
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{
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abort ();
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}
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#define BUSERROR(addr, mask) \
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if (addr & ~mask) { saved_state.asregs.exception = SIGBUS;}
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/* Define this to enable register lifetime checking.
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The compiler generates "add #0,rn" insns to mark registers as invalid,
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The compiler generates "add #0,rn" insns to mark registers as invalid,
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the simulator uses this info to call fail if it finds a ref to an invalid
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register before a def
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#define PARANOID
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*/
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@ -78,62 +80,222 @@ int valid[16];
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#define UNDEF(x)
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#endif
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#ifdef TARGET_BIG_ENDIAN
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#if 0
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#define LMEM(x) *((long *)(memory+((x)&maskl)))
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#define BMEM(x) *((char *)(memory+((x)&maskb)))
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#define UWMEM(x) *((unsigned short *)(memory+((x)&maskw)))
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#define SWMEM(x) *((short *)(memory+((x)&maskw)))
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#define WLAT(x,value) (LMEM(x) = value)
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#define RLAT(x) (LMEM(x))
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#define WWAT(x,value) (UWMEM(x) = value)
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#define RSWAT(x) (SWMEM(x))
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#define RUWAT(x) (UWMEM(x))
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#define WBAT(x,value) (BMEM(x) = value)
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#define RBAT(x) (BMEM(x))
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#ifdef __GNUC__
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#define INLINE inline
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#else
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#define LMEM(x) ((x)&maskl ? fail() : *((long *)(memory+((x)&maskl))))
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#define BMEM(x) ((x) &maskb ? fail() : *((char *)(memory+((x)&maskb))))
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#define UWMEM(x) ((x)&maskw ? fail() : *((unsigned short *)(memory+((x)&maskw))))
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#define SWMEM(x) ((x)&maskw ? fail() : *((short *)(memory+((x)&maskw))))
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#define WLAT(x,value) (LMEM(x) = value)
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#define RLAT(x) (LMEM(x))
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#define WWAT(x,value) (UWMEM(x) = value)
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#define RSWAT(x) (SWMEM(x))
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#define RUWAT(x) (UWMEM(x))
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#define WBAT(x,value) (BMEM(x) = value)
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#define RBAT(x) (BMEM(x))
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#define INLINE
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#endif
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#else
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/* For little endian or unknown host machines */
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#define WLAT(x,value)\
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{ int v = value; unsigned char *p = memory + ((x) & maskl);\
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p[0] =v>>24;p[1] = v>>16;p[2]=v>>8;p[3]=v; }
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#define WWAT(x,value)\
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{ int v = value; unsigned char *p = memory + (x & maskw);p[0] =v>>8;p[1] = v ;}
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/* These variables are at file scope so that functions other than
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sim_resume can use the fetch/store macros */
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#define WBAT(x,value)\
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{ unsigned char *p = memory + (x & maskb);p[0] =value;}
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static int little_endian;
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#define RLAT(x)\
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((memory[x&maskl]<<24)|(memory[(x&maskl)+1]<<16)|(memory[(x&maskl)+2]<<8)| (memory[(x&maskl)+3]))
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#if 1
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static int maskl = ~0;
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static int maskw = ~0;
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#endif
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typedef union
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{
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#define RWAT(x)\
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((memory[x&maskw]<<8)|(memory[(x&maskw)+1]))
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struct
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{
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#define RBAT(x)\
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((memory[x&maskb]))
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int regs[16];
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int pc;
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int pr;
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int gbr;
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int vbr;
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int mach;
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int macl;
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union
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{
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struct
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{
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unsigned int d0:22;
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unsigned int m:1;
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unsigned int q:1;
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unsigned int i:4;
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unsigned int d1:2;
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unsigned int s:1;
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unsigned int t:1;
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}
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bits;
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int word;
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}
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sr;
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int ticks;
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int stalls;
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int cycles;
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int insts;
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int prevlock;
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int thislock;
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int exception;
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int msize;
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#define PROFILE_FREQ 1
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#define PROFILE_SHIFT 2
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int profile;
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unsigned short *profile_hist;
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unsigned char *memory;
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}
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asregs;
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int asints[28];
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} saved_state_type;
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saved_state_type saved_state;
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static void INLINE
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wlat_little (memory, x, value, maskl)
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unsigned char *memory;
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{
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int v = value;
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unsigned char *p = memory + ((x) & maskl);
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BUSERROR(x, maskl);
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p[3] = v >> 24;
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p[2] = v >> 16;
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p[1] = v >> 8;
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p[0] = v;
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}
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static void INLINE
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wwat_little (memory, x, value, maskw)
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unsigned char *memory;
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{
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int v = value;
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unsigned char *p = memory + ((x) & maskw);
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BUSERROR(x, maskw);
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p[1] = v >> 8;
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p[0] = v;
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}
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static void INLINE
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wbat_any (memory, x, value, maskb)
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unsigned char *memory;
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{
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unsigned char *p = memory + (x & maskb);
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if (x > 0x5000000)
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IOMEM (x, 1, value);
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BUSERROR(x, maskb);
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p[0] = value;
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}
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static void INLINE
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wlat_big (memory, x, value, maskl)
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unsigned char *memory;
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{
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int v = value;
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unsigned char *p = memory + ((x) & maskl);
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BUSERROR(x, maskl);
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p[0] = v >> 24;
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p[1] = v >> 16;
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p[2] = v >> 8;
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p[3] = v;
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}
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static void INLINE
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wwat_big (memory, x, value, maskw)
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unsigned char *memory;
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{
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int v = value;
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unsigned char *p = memory + ((x) & maskw);
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BUSERROR(x, maskw);
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p[0] = v >> 8;
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p[1] = v;
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}
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static void INLINE
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wbat_big (memory, x, value, maskb)
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unsigned char *memory;
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{
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unsigned char *p = memory + (x & maskb);
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BUSERROR(x, maskb);
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if (x > 0x5000000)
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IOMEM (x, 1, value);
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p[0] = value;
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}
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/* Read functions */
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static int INLINE
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rlat_little (memory, x, maskl)
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unsigned char *memory;
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{
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unsigned char *p = memory + ((x) & maskl);
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BUSERROR(x, maskl);
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return (p[3] << 24) | (p[2] << 16) | (p[1] << 8) | p[0];
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}
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static int INLINE
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rwat_little (memory, x, maskw)
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unsigned char *memory;
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{
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unsigned char *p = memory + ((x) & maskw);
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BUSERROR(x, maskw);
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return (p[1] << 8) | p[0];
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}
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static int INLINE
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rbat_any (memory, x, maskb)
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unsigned char *memory;
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{
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unsigned char *p = memory + ((x) & maskb);
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BUSERROR(x, maskb);
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return p[0];
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}
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static int INLINE
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rlat_big (memory, x, maskl)
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unsigned char *memory;
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{
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unsigned char *p = memory + ((x) & maskl);
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BUSERROR(x, maskl);
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return (p[0] << 24) | (p[1] << 16) | (p[2] << 8) | p[3];
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}
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static int INLINE
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rwat_big (memory, x, maskw)
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unsigned char *memory;
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{
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unsigned char *p = memory + ((x) & maskw);
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BUSERROR(x, maskw);
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return (p[0] << 8) | p[1];
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}
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#define RWAT(x) (little_endian ? rwat_little(memory, x, maskw): rwat_big(memory, x, maskw))
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#define RLAT(x) (little_endian ? rlat_little(memory, x, maskl): rlat_big(memory, x, maskl))
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#define RBAT(x) (rbat_any (memory, x, maskb))
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#define WWAT(x,v) (little_endian ? wwat_little(memory, x, v, maskw): wwat_big(memory, x, v, maskw))
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#define WLAT(x,v) (little_endian ? wlat_little(memory, x, v, maskl): wlat_big(memory, x, v, maskl))
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#define WBAT(x,v) (wbat_any (memory, x, v, maskb))
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#define RUWAT(x) (RWAT(x) & 0xffff)
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#define RSWAT(x) ((short)(RWAT(x)))
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#define RSBAT(x) (SEXT(RBAT(x)))
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#endif
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#define SEXT(x) (((x&0xff) ^ (~0x7f))+0x80)
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#define SEXTW(y) ((int)((short)y))
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|
@ -154,69 +316,60 @@ int sim_memory_size = 24;
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static int sim_profile_size = 17;
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static int nsamples;
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static int sim_timeout;
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||||
typedef union
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||||
#undef TB
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#define TB(x,y)
|
||||
|
||||
#define SMR1 (0x05FFFEC8) /* Channel 1 serial mode register */
|
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#define BRR1 (0x05FFFEC9) /* Channel 1 bit rate register */
|
||||
#define SCR1 (0x05FFFECA) /* Channel 1 serial control register */
|
||||
#define TDR1 (0x05FFFECB) /* Channel 1 transmit data register */
|
||||
#define SSR1 (0x05FFFECC) /* Channel 1 serial status register */
|
||||
#define RDR1 (0x05FFFECD) /* Channel 1 receive data register */
|
||||
|
||||
#define SCI_RDRF 0x40 /* Recieve data register full */
|
||||
#define SCI_TDRE 0x80 /* Transmit data register empty */
|
||||
|
||||
static int
|
||||
IOMEM (addr, write, value)
|
||||
int addr;
|
||||
int write;
|
||||
int value;
|
||||
{
|
||||
static int io;
|
||||
static char ssr1;
|
||||
int x;
|
||||
static char lastchar;
|
||||
|
||||
struct
|
||||
if (write)
|
||||
{
|
||||
|
||||
int regs[16];
|
||||
int pc;
|
||||
int pr;
|
||||
|
||||
int gbr;
|
||||
int vbr;
|
||||
int mach;
|
||||
int macl;
|
||||
|
||||
|
||||
union
|
||||
switch (addr)
|
||||
{
|
||||
struct
|
||||
case TDR1:
|
||||
if (value != '\r')
|
||||
{
|
||||
unsigned int d0:22;
|
||||
unsigned int m:1;
|
||||
unsigned int q:1;
|
||||
unsigned int i:4;
|
||||
unsigned int d1:2;
|
||||
unsigned int s:1;
|
||||
unsigned int t:1;
|
||||
putchar (value);
|
||||
fflush (stdout);
|
||||
}
|
||||
bits;
|
||||
int word;
|
||||
break;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
switch (addr)
|
||||
{
|
||||
case RDR1:
|
||||
return getchar ();
|
||||
}
|
||||
sr;
|
||||
int ticks;
|
||||
int stalls;
|
||||
int cycles;
|
||||
int insts;
|
||||
|
||||
|
||||
int prevlock;
|
||||
int thislock;
|
||||
int exception;
|
||||
int msize;
|
||||
#define PROFILE_FREQ 1
|
||||
#define PROFILE_SHIFT 2
|
||||
int profile;
|
||||
unsigned short *profile_hist;
|
||||
unsigned char *memory;
|
||||
|
||||
}
|
||||
asregs;
|
||||
int asints[28];
|
||||
|
||||
}
|
||||
|
||||
saved_state_type;
|
||||
saved_state_type saved_state;
|
||||
|
||||
|
||||
static int
|
||||
get_now ()
|
||||
{
|
||||
return time((long*)0);
|
||||
return time ((long *) 0);
|
||||
}
|
||||
|
||||
static int
|
||||
|
|
@ -229,23 +382,19 @@ now_persec ()
|
|||
|
||||
static FILE *profile_file;
|
||||
|
||||
static void
|
||||
swap (b, n)
|
||||
unsigned char *b;
|
||||
static void
|
||||
swap (memory, n)
|
||||
unsigned char *memory;
|
||||
int n;
|
||||
{
|
||||
b[0] = n >> 24;
|
||||
b[1] = n >> 16;
|
||||
b[2] = n >> 8;
|
||||
b[3] = n >> 0;
|
||||
WLAT (0, n);
|
||||
}
|
||||
static void
|
||||
swap16 (b, n)
|
||||
unsigned char *b;
|
||||
static void
|
||||
swap16 (memory, n)
|
||||
unsigned char *memory;
|
||||
int n;
|
||||
{
|
||||
b[0] = n >> 8;
|
||||
b[1] = n >> 0;
|
||||
WWAT (0, n);
|
||||
}
|
||||
|
||||
static void
|
||||
|
|
@ -279,32 +428,13 @@ ptr (x)
|
|||
return (char *) (x + saved_state.asregs.memory);
|
||||
}
|
||||
|
||||
static char *wwat(ptr, val)
|
||||
char *ptr;
|
||||
int val;
|
||||
{
|
||||
ptr[0] = val >> 8;
|
||||
ptr[1] = val;
|
||||
return ptr+2;
|
||||
}
|
||||
|
||||
static char *wlat(ptr,val)
|
||||
char *ptr;
|
||||
int val;
|
||||
{
|
||||
ptr[0] = val>> 24;
|
||||
ptr[1] = val >> 16;
|
||||
ptr[2] = val >>8;
|
||||
ptr[3] = val;
|
||||
return ptr+4;
|
||||
}
|
||||
|
||||
/* Simulate a monitor trap, put the result into r0 and errno into r1 */
|
||||
|
||||
static void
|
||||
trap (i, regs)
|
||||
trap (i, regs, memory, maskl, maskw, little_endian)
|
||||
int i;
|
||||
int *regs;
|
||||
unsigned char *memory;
|
||||
{
|
||||
switch (i)
|
||||
{
|
||||
|
|
@ -314,6 +444,23 @@ trap (i, regs)
|
|||
case 2:
|
||||
saved_state.asregs.exception = SIGQUIT;
|
||||
break;
|
||||
#if 0
|
||||
case 8:
|
||||
trap8 (ptr (regs[4]));
|
||||
break;
|
||||
case 9:
|
||||
trap9 (ptr (regs[4]));
|
||||
break;
|
||||
case 10:
|
||||
trap10 ();
|
||||
break;
|
||||
case 11:
|
||||
regs[0] = trap11 ();
|
||||
break;
|
||||
case 12:
|
||||
regs[0] = trap12 ();
|
||||
break;
|
||||
#endif
|
||||
case 3:
|
||||
{
|
||||
extern int errno;
|
||||
|
|
@ -322,35 +469,38 @@ trap (i, regs)
|
|||
|
||||
switch (regs[4])
|
||||
{
|
||||
#ifndef __GO32__
|
||||
case SYS_fork:
|
||||
regs[0] = fork();
|
||||
break;
|
||||
|
||||
#ifndef __GO32__
|
||||
|
||||
case SYS_fork:
|
||||
regs[0] = fork ();
|
||||
break;
|
||||
case SYS_execve:
|
||||
regs[0] = execve(ptr(regs[5]), ptr(regs[6]), ptr(regs[7]));
|
||||
regs[0] = execve (ptr (regs[5]), ptr (regs[6]), ptr (regs[7]));
|
||||
break;
|
||||
case SYS_execv:
|
||||
regs[0] = execv(ptr(regs[5]), ptr(regs[6]));
|
||||
regs[0] = execv (ptr (regs[5]), ptr (regs[6]));
|
||||
break;
|
||||
case SYS_pipe:
|
||||
{
|
||||
char* buf;
|
||||
char *buf;
|
||||
int host_fd[2];
|
||||
|
||||
buf = ptr(regs[5]);
|
||||
buf = ptr (regs[5]);
|
||||
|
||||
regs[0] = pipe(host_fd);
|
||||
regs[0] = pipe (host_fd);
|
||||
|
||||
buf = wlat(buf, host_fd[0]);
|
||||
buf = wlat(buf, host_fd[1]);
|
||||
WLAT (buf, host_fd[0]);
|
||||
buf += 4;
|
||||
WLAT (buf, host_fd[1]);
|
||||
}
|
||||
break;
|
||||
|
||||
case SYS_wait:
|
||||
regs[0] = wait(ptr(regs[5]));
|
||||
case SYS_wait:
|
||||
regs[0] = wait (ptr (regs[5]));
|
||||
break;
|
||||
#endif
|
||||
|
||||
case SYS_read:
|
||||
regs[0] = read (regs[5], ptr (regs[6]), regs[7]);
|
||||
break;
|
||||
|
|
@ -367,53 +517,65 @@ trap (i, regs)
|
|||
regs[0] = open (ptr (regs[5]), regs[6]);
|
||||
break;
|
||||
case SYS_exit:
|
||||
/* EXIT */
|
||||
/* EXIT - caller can look in r5 to work out the
|
||||
reason */
|
||||
saved_state.asregs.exception = SIGQUIT;
|
||||
errno = regs[5];
|
||||
break;
|
||||
|
||||
case SYS_stat: /* added at hmsi */
|
||||
|
||||
case SYS_stat: /* added at hmsi */
|
||||
/* stat system call */
|
||||
{
|
||||
{
|
||||
struct stat host_stat;
|
||||
char *buf;
|
||||
|
||||
regs[0] = stat( ptr(regs[5]), &host_stat);
|
||||
regs[0] = stat (ptr (regs[5]), &host_stat);
|
||||
|
||||
buf = ptr(regs[6]);
|
||||
buf = ptr (regs[6]);
|
||||
|
||||
buf = wwat(buf, host_stat.st_dev);
|
||||
buf = wwat(buf, host_stat.st_ino);
|
||||
WWAT (buf, host_stat.st_dev);
|
||||
buf += 2;
|
||||
WWAT (buf, host_stat.st_ino);
|
||||
buf += 2;
|
||||
WLAT (buf, host_stat.st_mode);
|
||||
buf += 4;
|
||||
WWAT (buf, host_stat.st_nlink);
|
||||
buf += 2;
|
||||
WWAT (buf, host_stat.st_uid);
|
||||
buf += 2;
|
||||
WWAT (buf, host_stat.st_gid);
|
||||
buf += 2;
|
||||
WWAT (buf, host_stat.st_rdev);
|
||||
buf += 2;
|
||||
WLAT (buf, host_stat.st_size);
|
||||
buf += 4;
|
||||
WLAT (buf, host_stat.st_atime);
|
||||
buf += 4;
|
||||
WLAT (buf, 0);
|
||||
buf += 4;
|
||||
WLAT (buf, host_stat.st_mtime);
|
||||
buf += 4;
|
||||
WLAT (buf, 0);
|
||||
buf += 4;
|
||||
WLAT (buf, host_stat.st_ctime);
|
||||
buf += 4;
|
||||
WLAT (buf, 0);
|
||||
buf += 4;
|
||||
WLAT (buf, 0);
|
||||
buf += 4;
|
||||
WLAT (buf, 0);
|
||||
buf += 4;
|
||||
}
|
||||
break;
|
||||
|
||||
buf = wlat(buf, host_stat.st_mode);
|
||||
|
||||
buf = wwat(buf, host_stat.st_nlink);
|
||||
buf = wwat(buf, host_stat.st_uid);
|
||||
buf = wwat(buf, host_stat.st_gid);
|
||||
buf = wwat(buf, host_stat.st_rdev);
|
||||
|
||||
buf = wlat(buf, host_stat.st_size);
|
||||
buf = wlat(buf, host_stat.st_atime);
|
||||
buf = wlat(buf, 0);
|
||||
buf = wlat(buf, host_stat.st_mtime);
|
||||
buf = wlat(buf, 0);
|
||||
buf = wlat(buf, host_stat.st_ctime);
|
||||
buf = wlat(buf, 0);
|
||||
buf = wlat(buf, host_stat.st_blksize);
|
||||
buf = wlat(buf, host_stat.st_blocks);
|
||||
}
|
||||
break;
|
||||
|
||||
case SYS_chown:
|
||||
regs[0] = chown( ptr(regs[5]), regs[6], regs[7] );
|
||||
case SYS_chown:
|
||||
regs[0] = chown (ptr (regs[5]), regs[6], regs[7]);
|
||||
break;
|
||||
case SYS_chmod:
|
||||
regs[0] = chmod( ptr(regs[5]), regs[6]);
|
||||
break;
|
||||
case SYS_utime:
|
||||
regs[0] = utime (ptr(regs[5]), ptr(regs[6]));
|
||||
regs[0] = chmod (ptr (regs[5]), regs[6]);
|
||||
break;
|
||||
case SYS_utime:
|
||||
regs[0] = utime (ptr (regs[5]), ptr (regs[6]));
|
||||
break;
|
||||
|
||||
default:
|
||||
abort ();
|
||||
}
|
||||
|
|
@ -423,9 +585,9 @@ trap (i, regs)
|
|||
|
||||
break;
|
||||
|
||||
case 0xc3:
|
||||
case 255:
|
||||
saved_state.asregs.exception = SIGTRAP;
|
||||
saved_state.asregs.exception = 5;
|
||||
break;
|
||||
}
|
||||
|
||||
|
|
@ -530,7 +692,7 @@ div1 (R, iRn2, iRn1, T)
|
|||
}
|
||||
|
||||
|
||||
static void
|
||||
static void
|
||||
dmul (sign, rm, rn)
|
||||
int sign;
|
||||
unsigned int rm;
|
||||
|
|
@ -569,7 +731,16 @@ dmul (sign, rm, rn)
|
|||
|
||||
else
|
||||
{
|
||||
#ifdef __GNUC__
|
||||
long long res;
|
||||
long long a = rn;
|
||||
long long b = rm;
|
||||
res = a * b;
|
||||
MACH = res >> 32;
|
||||
MACL = res & 0xffffffff;
|
||||
#else
|
||||
abort ();
|
||||
#endif
|
||||
}
|
||||
|
||||
}
|
||||
|
|
@ -598,7 +769,7 @@ sim_size (power)
|
|||
if (!saved_state.asregs.memory)
|
||||
{
|
||||
fprintf (stderr,
|
||||
"Not enough VM for simuation of %d bytes of RAM\n",
|
||||
"Not enough VM for simulation of %d bytes of RAM\n",
|
||||
saved_state.asregs.msize);
|
||||
|
||||
saved_state.asregs.msize = 1;
|
||||
|
|
@ -607,11 +778,21 @@ sim_size (power)
|
|||
}
|
||||
|
||||
|
||||
extern int target_byte_order;
|
||||
|
||||
static void
|
||||
set_static_little_endian(x)
|
||||
int x;
|
||||
{
|
||||
little_endian = x;
|
||||
}
|
||||
|
||||
static
|
||||
void
|
||||
init_pointers ()
|
||||
{
|
||||
register int little_endian = target_byte_order == 1234;
|
||||
set_static_little_endian (little_endian);
|
||||
if (saved_state.asregs.msize != 1 << sim_memory_size)
|
||||
{
|
||||
sim_size (sim_memory_size);
|
||||
|
|
@ -662,7 +843,7 @@ dump_profile ()
|
|||
|
||||
}
|
||||
|
||||
static int
|
||||
static int
|
||||
gotcall (from, to)
|
||||
int from;
|
||||
int to;
|
||||
|
|
@ -674,6 +855,7 @@ gotcall (from, to)
|
|||
|
||||
#define MMASKB ((saved_state.asregs.msize -1) & ~0)
|
||||
|
||||
|
||||
void
|
||||
sim_resume (step, siggnal)
|
||||
int step, siggnal;
|
||||
|
|
@ -685,6 +867,11 @@ sim_resume (step, siggnal)
|
|||
register int prevlock;
|
||||
register int thislock;
|
||||
register unsigned int doprofile;
|
||||
#ifdef __GO32__
|
||||
register int pollcount = 0;
|
||||
#endif
|
||||
register int little_endian = target_byte_order == 1234;
|
||||
|
||||
|
||||
int tick_start = get_now ();
|
||||
void (*prev) ();
|
||||
|
|
@ -699,7 +886,7 @@ sim_resume (step, siggnal)
|
|||
register int maskb = ((saved_state.asregs.msize - 1) & ~0);
|
||||
register int maskw = ((saved_state.asregs.msize - 1) & ~1);
|
||||
register int maskl = ((saved_state.asregs.msize - 1) & ~3);
|
||||
register unsigned char *memory ;
|
||||
register unsigned char *memory;
|
||||
register unsigned int sbit = (1 << 31);
|
||||
|
||||
prev = signal (SIGINT, control_c);
|
||||
|
|
@ -733,23 +920,38 @@ sim_resume (step, siggnal)
|
|||
{
|
||||
register unsigned int iword = RUWAT (pc);
|
||||
register unsigned int ult;
|
||||
|
||||
#ifndef ACE_FAST
|
||||
insts++;
|
||||
#endif
|
||||
top:
|
||||
|
||||
#include "code.c"
|
||||
|
||||
|
||||
pc += 2;
|
||||
|
||||
#ifdef __GO32__
|
||||
pollcount++;
|
||||
if (pollcount > 1000)
|
||||
{
|
||||
pollcount = 0;
|
||||
if (kbhit()) {
|
||||
int k = getkey();
|
||||
if (k == 1)
|
||||
saved_state.asregs.exception = SIGINT;
|
||||
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifndef ACE_FAST
|
||||
prevlock = thislock;
|
||||
thislock = 30;
|
||||
cycles++;
|
||||
|
||||
if (cycles >= doprofile)
|
||||
{
|
||||
if (cycles > sim_timeout)
|
||||
saved_state.asregs.exception = SIGQUIT;
|
||||
|
||||
|
||||
saved_state.asregs.cycles += doprofile;
|
||||
cycles -= doprofile;
|
||||
if (saved_state.asregs.profile_hist)
|
||||
|
|
@ -764,10 +966,13 @@ sim_resume (step, siggnal)
|
|||
|
||||
}
|
||||
}
|
||||
#endif
|
||||
}
|
||||
while (!saved_state.asregs.exception);
|
||||
|
||||
if (saved_state.asregs.exception == SIGILL)
|
||||
if (saved_state.asregs.exception == SIGILL
|
||||
|| saved_state.asregs.exception == SIGBUS
|
||||
|| (saved_state.asregs.exception == SIGTRAP && !step))
|
||||
{
|
||||
pc -= 2;
|
||||
}
|
||||
|
|
@ -830,21 +1035,21 @@ sim_read (addr, buffer, size)
|
|||
|
||||
|
||||
void
|
||||
sim_store_register (rn, value)
|
||||
sim_store_register (rn, memory)
|
||||
int rn;
|
||||
unsigned char *value;
|
||||
unsigned char *memory;
|
||||
{
|
||||
saved_state.asregs.regs[rn] = (value[0] << 24) | (value[1] << 16) | (value[2] << 8) | (value[3]);
|
||||
init_pointers();
|
||||
saved_state.asregs.regs[rn]=RLAT(0);
|
||||
}
|
||||
|
||||
void
|
||||
sim_fetch_register (rn, buf)
|
||||
sim_fetch_register (rn, memory)
|
||||
int rn;
|
||||
unsigned char *buf;
|
||||
unsigned char *memory;
|
||||
{
|
||||
int value = ((int *) (&saved_state))[rn];
|
||||
|
||||
swap (buf, value);
|
||||
init_pointers();
|
||||
WLAT (0, saved_state.asregs.regs[rn]);
|
||||
}
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -113,10 +113,11 @@ main (ac, av)
|
|||
if (verbose)
|
||||
sim_info (0);
|
||||
|
||||
/* Find out what was in r0 and return that */
|
||||
/* Assume we left through the exit system call,
|
||||
in which case r5 has the exit code */
|
||||
{
|
||||
unsigned char b[4];
|
||||
sim_fetch_register (0, b);
|
||||
sim_fetch_register (5, b);
|
||||
return b[3];
|
||||
}
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue