x86: Update segment register check in Intel syntax

https://sourceware.org/ml/binutils/2009-04/msg00223.html

introduced a new Intel syntax parser which accepts

	mov	eax, fs:gs:[eax]

It ignores anything between ':'s after fs and treats

	mov	eax, DWORD PTR fs:foobar:16
	mov	eax, DWORD PTR fs:foobar:barfoo:16
	mov	eax, DWORD PTR fs:ds:16
	mov	eax, DWORD PTR fs:ds:cs:16

as

	mov	eax, DWORD PTR fs:16

This patch updates segment register check and only allows a single ':'.

	PR gas/21874
	* config/tc-i386-intel.c (i386_intel_operand): Update segment
	register check.
	* testsuite/gas/i386/intelok.s: Replace "fs:gs:[eax]" with
	"fs:[eax]".
	* testsuite/gas/i386/inval-seg.s: Add tests for invalid segment
	register.
	* testsuite/gas/i386/x86-64-inval-seg.s: Likewise.
	* testsuite/gas/i386/inval-seg.l: Updated.
	* testsuite/gas/i386/x86-64-inval-seg.l: Likewise.
This commit is contained in:
H.J. Lu 2017-08-01 05:53:27 -07:00
parent 60c4393c50
commit 4d36230d59
7 changed files with 57 additions and 18 deletions

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@ -1,3 +1,16 @@
2017-08-01 H.J. Lu <hongjiu.lu@intel.com>
PR gas/21874
* config/tc-i386-intel.c (i386_intel_operand): Update segment
register check.
* testsuite/gas/i386/intelok.s: Replace "fs:gs:[eax]" with
"fs:[eax]".
* testsuite/gas/i386/inval-seg.s: Add tests for invalid segment
register.
* testsuite/gas/i386/x86-64-inval-seg.s: Likewise.
* testsuite/gas/i386/inval-seg.l: Updated.
* testsuite/gas/i386/x86-64-inval-seg.l: Likewise.
2017-07-31 John David Anglin <danglin@gcc.gnu.org>
* config/tc-hppa.c (pa_ip): Clear `d' bit in branch on bit instructions

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@ -932,13 +932,7 @@ i386_intel_operand (char *operand_string, int got_a_float)
if (intel_state.seg)
{
for (;;)
{
expP = symbol_get_value_expression (intel_state.seg);
if (expP->X_op != O_full_ptr)
break;
intel_state.seg = expP->X_add_symbol;
}
expP = symbol_get_value_expression (intel_state.seg);
if (expP->X_op != O_register)
{
as_bad (_("segment register name expected"));

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@ -150,7 +150,7 @@ start:
mov eax, [eax[ecx]]
mov eax, [[eax][ecx]]
mov eax, es:[eax]
mov eax, fs:gs:[eax]
mov eax, fs:[eax]
# expressions

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@ -1,10 +1,20 @@
.*: Assembler messages:
.*:3: Error: .*
.*:4: Error: .*
.*:7: Error: .*
.*:8: Error: .*
.*:9: Error: .*
.*:10: Error: .*
GAS LISTING .*
1 [ ]* .text
2 [ ]*# All the following should be illegal
3 [ ]* movl %ds,\(%eax\)
4 [ ]* movl \(%eax\),%ds
[ ]*1[ ]+\.text
[ ]*2[ ]+\# All the following should be illegal
[ ]*3[ ]+movl %ds,\(%eax\)
[ ]*4[ ]+movl \(%eax\),%ds
[ ]*5[ ]+
[ ]*6[ ]+\.intel_syntax noprefix
[ ]*7[ ]+mov eax, DWORD PTR fs:foobar:16
[ ]*8[ ]+mov eax, DWORD PTR fs:foobar:barfoo:16
[ ]*9[ ]+mov eax, DWORD PTR fs:ds:16
[ ]*10[ ]+mov eax, DWORD PTR fs:ds:cs:16

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@ -2,3 +2,9 @@
# All the following should be illegal
movl %ds,(%eax)
movl (%eax),%ds
.intel_syntax noprefix
mov eax, DWORD PTR fs:foobar:16
mov eax, DWORD PTR fs:foobar:barfoo:16
mov eax, DWORD PTR fs:ds:16
mov eax, DWORD PTR fs:ds:cs:16

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@ -3,12 +3,22 @@
.*:4: Error: .*
.*:5: Error: .*
.*:6: Error: .*
.*:9: Error: .*
.*:10: Error: .*
.*:11: Error: .*
.*:12: Error: .*
GAS LISTING .*
1 [ ]* .text
2 [ ]*# All the following should be illegal
3 [ ]* movq %ds,\(%rax\)
4 [ ]* movl %ds,\(%rax\)
5 [ ]* movq \(%rax\),%ds
6 [ ]* movl \(%rax\),%ds
[ ]*1[ ]+\.text
[ ]*2[ ]+\# All the following should be illegal
[ ]*3[ ]+movq %ds,\(%rax\)
[ ]*4[ ]+movl %ds,\(%rax\)
[ ]*5[ ]+movq \(%rax\),%ds
[ ]*6[ ]+movl \(%rax\),%ds
[ ]*7[ ]+
[ ]*8[ ]+\.intel_syntax noprefix
[ ]*9[ ]+mov eax, DWORD PTR fs:foobar:16
[ ]*10[ ]+mov eax, DWORD PTR fs:foobar:barfoo:16
[ ]*11[ ]+mov eax, DWORD PTR fs:ds:16
[ ]*12[ ]+mov eax, DWORD PTR fs:ds:cs:16

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@ -4,3 +4,9 @@
movl %ds,(%rax)
movq (%rax),%ds
movl (%rax),%ds
.intel_syntax noprefix
mov eax, DWORD PTR fs:foobar:16
mov eax, DWORD PTR fs:foobar:barfoo:16
mov eax, DWORD PTR fs:ds:16
mov eax, DWORD PTR fs:ds:cs:16