Update sto/ldo implementations with 16 bit offsets
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@ -1,3 +1,9 @@
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2014-12-27 Anthony Green <green@moxielogic.com>
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* interp.c (EXTRACT_OFFSET): Define.
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(sim_resume): ldo/sto instructions now use 16 bit offset instead
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of 32. Also swap mul.x/umul.x opcodes (reversed by mistake).
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2014-12-25 Anthony Green <green@moxielogic.com>
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2014-12-25 Anthony Green <green@moxielogic.com>
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* interp.c (sim_resume): Whitespace changes to align with GDB
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* interp.c (sim_resume): Whitespace changes to align with GDB
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@ -50,6 +50,12 @@ FILE *tracefile;
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+ (sim_core_read_aligned_1 (scpu, cia, read_map, addr+2) << 8) \
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+ (sim_core_read_aligned_1 (scpu, cia, read_map, addr+2) << 8) \
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+ (sim_core_read_aligned_1 (scpu, cia, read_map, addr+3)))
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+ (sim_core_read_aligned_1 (scpu, cia, read_map, addr+3)))
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#define EXTRACT_OFFSET(addr) \
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(unsigned int) \
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(((signed short) \
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((sim_core_read_aligned_1 (scpu, cia, read_map, addr) << 8) \
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+ (sim_core_read_aligned_1 (scpu, cia, read_map, addr+1))) << 16) >> 16)
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unsigned long
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unsigned long
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moxie_extract_unsigned_integer (addr, len)
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moxie_extract_unsigned_integer (addr, len)
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unsigned char * addr;
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unsigned char * addr;
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@ -555,26 +561,26 @@ sim_resume (sd, step, siggnal)
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break;
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break;
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case 0x0c: /* ldo.l */
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case 0x0c: /* ldo.l */
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{
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{
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unsigned int addr = EXTRACT_WORD(pc+2);
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unsigned int addr = EXTRACT_OFFSET(pc+2);
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int a = (inst >> 4) & 0xf;
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int a = (inst >> 4) & 0xf;
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int b = inst & 0xf;
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int b = inst & 0xf;
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TRACE("ldo.l");
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TRACE("ldo.l");
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addr += cpu.asregs.regs[b];
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addr += cpu.asregs.regs[b];
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cpu.asregs.regs[a] = rlat (scpu, opc, addr);
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cpu.asregs.regs[a] = rlat (scpu, opc, addr);
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pc += 4;
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pc += 2;
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}
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}
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break;
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break;
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case 0x0d: /* sto.l */
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case 0x0d: /* sto.l */
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{
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{
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unsigned int addr = EXTRACT_WORD(pc+2);
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unsigned int addr = EXTRACT_OFFSET(pc+2);
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int a = (inst >> 4) & 0xf;
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int a = (inst >> 4) & 0xf;
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int b = inst & 0xf;
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int b = inst & 0xf;
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TRACE("sto.l");
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TRACE("sto.l");
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addr += cpu.asregs.regs[a];
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addr += cpu.asregs.regs[a];
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wlat (scpu, opc, addr, cpu.asregs.regs[b]);
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wlat (scpu, opc, addr, cpu.asregs.regs[b]);
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pc += 4;
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pc += 2;
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}
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}
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break;
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break;
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case 0x0e: /* cmp */
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case 0x0e: /* cmp */
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@ -641,20 +647,7 @@ sim_resume (sd, step, siggnal)
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cpu.asregs.regs[a] = (int) bv & 0xffff;
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cpu.asregs.regs[a] = (int) bv & 0xffff;
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}
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}
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break;
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break;
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case 0x14: /* mul.x */
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case 0x14: /* umul.x */
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{
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int a = (inst >> 4) & 0xf;
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int b = inst & 0xf;
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unsigned av = cpu.asregs.regs[a];
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unsigned bv = cpu.asregs.regs[b];
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signed long long r =
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(signed long long) av * (signed long long) bv;
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TRACE("mul.x");
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cpu.asregs.regs[a] = r >> 32;
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}
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break;
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case 0x15: /* umul.x */
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{
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{
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int a = (inst >> 4) & 0xf;
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int a = (inst >> 4) & 0xf;
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int b = inst & 0xf;
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int b = inst & 0xf;
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@ -667,6 +660,19 @@ sim_resume (sd, step, siggnal)
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cpu.asregs.regs[a] = r >> 32;
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cpu.asregs.regs[a] = r >> 32;
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}
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}
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break;
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break;
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case 0x15: /* mul.x */
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{
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int a = (inst >> 4) & 0xf;
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int b = inst & 0xf;
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unsigned av = cpu.asregs.regs[a];
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unsigned bv = cpu.asregs.regs[b];
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signed long long r =
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(signed long long) av * (signed long long) bv;
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TRACE("mul.x");
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cpu.asregs.regs[a] = r >> 32;
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}
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break;
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case 0x16: /* bad */
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case 0x16: /* bad */
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case 0x17: /* bad */
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case 0x17: /* bad */
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case 0x18: /* bad */
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case 0x18: /* bad */
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@ -1057,50 +1063,50 @@ sim_resume (sd, step, siggnal)
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break;
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break;
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case 0x36: /* ldo.b */
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case 0x36: /* ldo.b */
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{
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{
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unsigned int addr = EXTRACT_WORD(pc+2);
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unsigned int addr = EXTRACT_OFFSET(pc+2);
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int a = (inst >> 4) & 0xf;
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int a = (inst >> 4) & 0xf;
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int b = inst & 0xf;
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int b = inst & 0xf;
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TRACE("ldo.b");
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TRACE("ldo.b");
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addr += cpu.asregs.regs[b];
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addr += cpu.asregs.regs[b];
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cpu.asregs.regs[a] = rbat (scpu, opc, addr);
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cpu.asregs.regs[a] = rbat (scpu, opc, addr);
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pc += 4;
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pc += 2;
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}
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}
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break;
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break;
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case 0x37: /* sto.b */
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case 0x37: /* sto.b */
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{
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{
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unsigned int addr = EXTRACT_WORD(pc+2);
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unsigned int addr = EXTRACT_OFFSET(pc+2);
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int a = (inst >> 4) & 0xf;
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int a = (inst >> 4) & 0xf;
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int b = inst & 0xf;
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int b = inst & 0xf;
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TRACE("sto.b");
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TRACE("sto.b");
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addr += cpu.asregs.regs[a];
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addr += cpu.asregs.regs[a];
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wbat (scpu, opc, addr, cpu.asregs.regs[b]);
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wbat (scpu, opc, addr, cpu.asregs.regs[b]);
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pc += 4;
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pc += 2;
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}
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}
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break;
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break;
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case 0x38: /* ldo.s */
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case 0x38: /* ldo.s */
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{
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{
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unsigned int addr = EXTRACT_WORD(pc+2);
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unsigned int addr = EXTRACT_OFFSET(pc+2);
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int a = (inst >> 4) & 0xf;
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int a = (inst >> 4) & 0xf;
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int b = inst & 0xf;
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int b = inst & 0xf;
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TRACE("ldo.s");
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TRACE("ldo.s");
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addr += cpu.asregs.regs[b];
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addr += cpu.asregs.regs[b];
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cpu.asregs.regs[a] = rsat (scpu, opc, addr);
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cpu.asregs.regs[a] = rsat (scpu, opc, addr);
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pc += 4;
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pc += 2;
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}
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}
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break;
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break;
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case 0x39: /* sto.s */
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case 0x39: /* sto.s */
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{
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{
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unsigned int addr = EXTRACT_WORD(pc+2);
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unsigned int addr = EXTRACT_OFFSET(pc+2);
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int a = (inst >> 4) & 0xf;
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int a = (inst >> 4) & 0xf;
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int b = inst & 0xf;
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int b = inst & 0xf;
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TRACE("sto.s");
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TRACE("sto.s");
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addr += cpu.asregs.regs[a];
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addr += cpu.asregs.regs[a];
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wsat (scpu, opc, addr, cpu.asregs.regs[b]);
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wsat (scpu, opc, addr, cpu.asregs.regs[b]);
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pc += 4;
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pc += 2;
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}
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}
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break;
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break;
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default:
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default:
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