x86: Check invalid XMM register in AVX512 gathers
Extend invalid register check for AVX512 gathers to XMM register. PR gas/22352 * config/tc-i386.c (check_VecOperands): Also check XMM register for invalid register in AVX512 gathers. * testsuite/gas/i386/vgather-check.s: Add tests for AVX512 gathers with XMM register. * testsuite/gas/i386/x86-64-vgather-check.s: Likewise. * testsuite/gas/i386/vgather-check-error.l: Updated. * testsuite/gas/i386/vgather-check-none.d: Likewise. * testsuite/gas/i386/vgather-check-warn.d: Likewise. * testsuite/gas/i386/vgather-check-warn.e: Likewise. * testsuite/gas/i386/vgather-check.d: Likewise. * testsuite/gas/i386/x86-64-vgather-check-error.l: Likewise. * testsuite/gas/i386/x86-64-vgather-check-none.d: Likewise. * testsuite/gas/i386/x86-64-vgather-check-warn.d: Likewise. * testsuite/gas/i386/x86-64-vgather-check-warn.e: Likewise. * testsuite/gas/i386/x86-64-vgather-check.d: Likewise.
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@ -1,3 +1,22 @@
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2017-10-26 H.J. Lu <hongjiu.lu@intel.com>
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PR gas/22352
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* config/tc-i386.c (check_VecOperands): Also check XMM register
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for invalid register in AVX512 gathers.
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* testsuite/gas/i386/vgather-check.s: Add tests for AVX512
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gathers with XMM register.
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* testsuite/gas/i386/x86-64-vgather-check.s: Likewise.
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* testsuite/gas/i386/vgather-check-error.l: Updated.
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* testsuite/gas/i386/vgather-check-none.d: Likewise.
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* testsuite/gas/i386/vgather-check-warn.d: Likewise.
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* testsuite/gas/i386/vgather-check-warn.e: Likewise.
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* testsuite/gas/i386/vgather-check.d: Likewise.
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* testsuite/gas/i386/x86-64-vgather-check-error.l: Likewise.
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* testsuite/gas/i386/x86-64-vgather-check-none.d: Likewise.
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* testsuite/gas/i386/x86-64-vgather-check-warn.d: Likewise.
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* testsuite/gas/i386/x86-64-vgather-check-warn.e: Likewise.
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* testsuite/gas/i386/x86-64-vgather-check.d: Likewise.
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2017-10-26 Hans-Peter Nilsson <hp@bitrange.com>
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* testsuite/gas/all/fill-1.s: Use L2 rather than .L2.
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@ -4658,7 +4658,8 @@ check_VecOperands (const insn_template *t)
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}
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else if (i.reg_operands == 1 && i.mask)
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{
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if ((i.types[1].bitfield.regymm
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if ((i.types[1].bitfield.regxmm
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|| i.types[1].bitfield.regymm
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|| i.types[1].bitfield.regzmm)
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&& (register_number (i.op[1].regs)
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== register_number (i.index_reg)))
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@ -10,3 +10,4 @@
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.*:22: Error: .*
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.*:24: Error: .*
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.*:26: Error: .*
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.*:28: Error: .*
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@ -29,4 +29,6 @@ Disassembly of section .text:
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[ ]+[a-f0-9]+:[ ]+62 f2 7d 49 91 b4 f5 7b 00 00 00[ ]+vpgatherqd 0x7b\(%ebp,%zmm6,8\),%ymm6\{%k1\}
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[ ]+[a-f0-9]+:[ ]+62 f2 fd 49 91 b4 fd 7b 00 00 00[ ]+vpgatherqq 0x7b\(%ebp,%zmm7,8\),%zmm6\{%k1\}
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[ ]+[a-f0-9]+:[ ]+62 f2 fd 49 91 b4 f5 7b 00 00 00[ ]+vpgatherqq 0x7b\(%ebp,%zmm6,8\),%zmm6\{%k1\}
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[ ]+[a-f0-9]+:[ ]+62 f2 7d 29 91 b4 fd 7b 00 00 00[ ]+vpgatherqd 0x7b\(%ebp,%ymm7,8\),%xmm6\{%k1\}
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[ ]+[a-f0-9]+:[ ]+62 f2 7d 29 91 b4 f5 7b 00 00 00[ ]+vpgatherqd 0x7b\(%ebp,%ymm6,8\),%xmm6\{%k1\}
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#pass
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@ -30,4 +30,6 @@ Disassembly of section .text:
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[ ]+[a-f0-9]+:[ ]+62 f2 7d 49 91 b4 f5 7b 00 00 00[ ]+vpgatherqd 0x7b\(%ebp,%zmm6,8\),%ymm6\{%k1\}
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[ ]+[a-f0-9]+:[ ]+62 f2 fd 49 91 b4 fd 7b 00 00 00[ ]+vpgatherqq 0x7b\(%ebp,%zmm7,8\),%zmm6\{%k1\}
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[ ]+[a-f0-9]+:[ ]+62 f2 fd 49 91 b4 f5 7b 00 00 00[ ]+vpgatherqq 0x7b\(%ebp,%zmm6,8\),%zmm6\{%k1\}
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[ ]+[a-f0-9]+:[ ]+62 f2 7d 29 91 b4 fd 7b 00 00 00[ ]+vpgatherqd 0x7b\(%ebp,%ymm7,8\),%xmm6\{%k1\}
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[ ]+[a-f0-9]+:[ ]+62 f2 7d 29 91 b4 f5 7b 00 00 00[ ]+vpgatherqd 0x7b\(%ebp,%ymm6,8\),%xmm6\{%k1\}
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#pass
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@ -10,3 +10,4 @@
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.*:22: Warning: .*
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.*:24: Warning: .*
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.*:26: Warning: .*
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.*:28: Warning: .*
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@ -29,4 +29,6 @@ Disassembly of section .text:
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[ ]+[a-f0-9]+:[ ]+62 f2 7d 49 91 b4 f5 7b 00 00 00[ ]+vpgatherqd 0x7b\(%ebp,%zmm6,8\),%ymm6\{%k1\}
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[ ]+[a-f0-9]+:[ ]+62 f2 fd 49 91 b4 fd 7b 00 00 00[ ]+vpgatherqq 0x7b\(%ebp,%zmm7,8\),%zmm6\{%k1\}
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[ ]+[a-f0-9]+:[ ]+62 f2 fd 49 91 b4 f5 7b 00 00 00[ ]+vpgatherqq 0x7b\(%ebp,%zmm6,8\),%zmm6\{%k1\}
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[ ]+[a-f0-9]+:[ ]+62 f2 7d 29 91 b4 fd 7b 00 00 00[ ]+vpgatherqd 0x7b\(%ebp,%ymm7,8\),%xmm6\{%k1\}
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[ ]+[a-f0-9]+:[ ]+62 f2 7d 29 91 b4 f5 7b 00 00 00[ ]+vpgatherqd 0x7b\(%ebp,%ymm6,8\),%xmm6\{%k1\}
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#pass
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@ -24,3 +24,5 @@ avx512vgather:
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vpgatherqd 123(%ebp,%zmm6,8), %ymm6{%k1}
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vpgatherqq 123(%ebp,%zmm7,8), %zmm6{%k1}
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vpgatherqq 123(%ebp,%zmm6,8), %zmm6{%k1}
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vpgatherqd 123(%ebp,%ymm7,8), %xmm6{%k1}
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vpgatherqd 123(%ebp,%ymm6,8), %xmm6{%k1}
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@ -10,3 +10,4 @@
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.*:25: Error: .*
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.*:27: Error: .*
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.*:29: Error: .*
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.*:31: Error: .*
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@ -32,4 +32,6 @@ Disassembly of section .text:
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[ ]+[a-f0-9]+:[ ]+62 e2 7d 41 91 84 c5 7b 00 00 00[ ]+vpgatherqd 0x7b\(%rbp,%zmm16,8\),%ymm16\{%k1\}
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[ ]+[a-f0-9]+:[ ]+62 e2 fd 41 91 84 cd 7b 00 00 00[ ]+vpgatherqq 0x7b\(%rbp,%zmm17,8\),%zmm16\{%k1\}
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[ ]+[a-f0-9]+:[ ]+62 e2 fd 41 91 84 c5 7b 00 00 00[ ]+vpgatherqq 0x7b\(%rbp,%zmm16,8\),%zmm16\{%k1\}
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[ ]+[a-f0-9]+:[ ]+62 e2 7d 21 91 84 cd 7b 00 00 00[ ]+vpgatherqd 0x7b\(%rbp,%ymm17,8\),%xmm16\{%k1\}
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[ ]+[a-f0-9]+:[ ]+62 e2 7d 21 91 84 c5 7b 00 00 00[ ]+vpgatherqd 0x7b\(%rbp,%ymm16,8\),%xmm16\{%k1\}
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#pass
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@ -33,4 +33,6 @@ Disassembly of section .text:
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[ ]+[a-f0-9]+:[ ]+62 e2 7d 41 91 84 c5 7b 00 00 00[ ]+vpgatherqd 0x7b\(%rbp,%zmm16,8\),%ymm16\{%k1\}
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[ ]+[a-f0-9]+:[ ]+62 e2 fd 41 91 84 cd 7b 00 00 00[ ]+vpgatherqq 0x7b\(%rbp,%zmm17,8\),%zmm16\{%k1\}
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[ ]+[a-f0-9]+:[ ]+62 e2 fd 41 91 84 c5 7b 00 00 00[ ]+vpgatherqq 0x7b\(%rbp,%zmm16,8\),%zmm16\{%k1\}
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[ ]+[a-f0-9]+:[ ]+62 e2 7d 21 91 84 cd 7b 00 00 00[ ]+vpgatherqd 0x7b\(%rbp,%ymm17,8\),%xmm16\{%k1\}
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[ ]+[a-f0-9]+:[ ]+62 e2 7d 21 91 84 c5 7b 00 00 00[ ]+vpgatherqd 0x7b\(%rbp,%ymm16,8\),%xmm16\{%k1\}
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#pass
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@ -10,3 +10,4 @@
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.*:25: Warning: .*
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.*:27: Warning: .*
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.*:29: Warning: .*
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.*:31: Warning: .*
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@ -32,4 +32,6 @@ Disassembly of section .text:
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[ ]+[a-f0-9]+:[ ]+62 e2 7d 41 91 84 c5 7b 00 00 00[ ]+vpgatherqd 0x7b\(%rbp,%zmm16,8\),%ymm16\{%k1\}
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[ ]+[a-f0-9]+:[ ]+62 e2 fd 41 91 84 cd 7b 00 00 00[ ]+vpgatherqq 0x7b\(%rbp,%zmm17,8\),%zmm16\{%k1\}
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[ ]+[a-f0-9]+:[ ]+62 e2 fd 41 91 84 c5 7b 00 00 00[ ]+vpgatherqq 0x7b\(%rbp,%zmm16,8\),%zmm16\{%k1\}
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[ ]+[a-f0-9]+:[ ]+62 e2 7d 21 91 84 cd 7b 00 00 00[ ]+vpgatherqd 0x7b\(%rbp,%ymm17,8\),%xmm16\{%k1\}
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[ ]+[a-f0-9]+:[ ]+62 e2 7d 21 91 84 c5 7b 00 00 00[ ]+vpgatherqd 0x7b\(%rbp,%ymm16,8\),%xmm16\{%k1\}
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#pass
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@ -27,3 +27,5 @@ avx512vgather:
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vpgatherqd 123(%rbp,%zmm16,8), %ymm16{%k1}
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vpgatherqq 123(%rbp,%zmm17,8), %zmm16{%k1}
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vpgatherqq 123(%rbp,%zmm16,8), %zmm16{%k1}
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vpgatherqd 123(%rbp,%ymm17,8), %xmm16{%k1}
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vpgatherqd 123(%rbp,%ymm16,8), %xmm16{%k1}
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