For sub2w, compute carry according to negated addition rules.

Test.
This commit is contained in:
Andrew Cagney 1997-12-02 00:27:27 +00:00
parent 3c6d5393c4
commit 51b057f27b
5 changed files with 81 additions and 5 deletions

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@ -1,6 +1,7 @@
Thu Nov 27 15:30:01 1997 Andrew Cagney <cagney@b1.cygnus.com>
Tue Dec 2 11:04:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
* simops.c (OP_1000): Compute carry by comparing inputs.
* simops.c (OP_1000): For "sub2w", compute carry by comparing
inputs.
Mon Nov 17 20:57:21 1997 Andrew Cagney <cagney@b1.cygnus.com>

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@ -2483,7 +2483,7 @@ OP_1000 ()
/* see ../common/sim-alu.h for a more extensive discussion on how to
compute the carry/overflow bits */
tmp = a - b;
State.C = (a < b);
State.C = (a >= b);
State.regs[OP[0]] = (tmp >> 16) & 0xffff;
State.regs[OP[0]+1] = tmp & 0xffff;
trace_output (OP_DREG);
@ -2585,7 +2585,8 @@ OP_1 ()
trace_input ("subi", OP_REG, OP_CONSTANT16, OP_VOID);
/* see ../common/sim-alu.h for a more extensive discussion on how to
compute the carry/overflow bits */
compute the carry/overflow bits. */
/* since OP[1] is never <= 0, -OP[1] == ~OP[1]+1 can never overflow */
tmp = ((unsigned)(unsigned16) State.regs[OP[0]]
+ (unsigned)(unsigned16) ( - OP[1]));
State.C = (tmp >= (1 << 16));

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@ -1,3 +1,17 @@
Tue Dec 2 11:01:36 1997 Andrew Cagney <cagney@b1.cygnus.com>
* t-sub2w.s: New file.
* Makefile.in: Update.
Mon Nov 17 20:14:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
* t-subi.s (test_subi): New file.
* Makefile.in: Update.
Fri Nov 14 14:06:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
* t-rep.s: New file. Test case of branch to RPT_E address.
Mon Nov 10 19:21:26 1997 Andrew Cagney <cagney@b1.cygnus.com>
* t-macros.i (_start): New file.

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@ -40,7 +40,10 @@ RPATH_ENVVAR = @RPATH_ENVVAR@
TESTS = \
exit47.ko \
hello.hi \
t-rachi.ok
t-rachi.ok \
t-rep.ok \
t-subi.ok \
t-sub2w.ok
AS_FOR_TARGET = `\
if [ -x ../../../gas/as-new ]; then \

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@ -0,0 +1,57 @@
.include "t-macros.i"
start
;; The d10v implements negated addition for subtraction
.macro check_sub2w s x y r c v
;; clear carry
ldi r6,#0x8004
mvtc r6,cr0
;; load opnds
ld2w r6, @(1f,r0)
ld2w r8, @(2f,r0)
.data
1: .long \x
2: .long \y
.text
;; subtract
SUB2W r6, r8
;; verify result
ld2w r10, @(1f,r0)
.data
1: .long \r
.text
cmpeq r6, r10
brf0f 2f
cmpeq r7, r11
brf0t 3f
2: ldi r6, 1
ldi r2, \s
trap 15
3:
;; verify carry
mvfc r6, cr0
and3 r6, r6, #1
cmpeqi r6, #\c
brf0t 1f
ldi r6, 1
ldi r2, \s
trap 15
1:
.endm
check_sub2w 1 0x00000000 0x00000000 0x00000000 1 0
check_sub2w 2 0x00000000 0x00000001 0xffffffff 0 0
check_sub2w 3 0x00000001 0x00000000 0x00000001 1 0
check_sub2w 3 0x00000001 0x00000001 0x00000000 1 0
check_sub2w 5 0x00000000 0x80000000 0x80000000 0 1
check_sub2w 6 0x80000000 0x00000001 0x7fffffff 1 1
check_sub2w 7 0x7fffffff 0x7fffffff 0x00000000 1 0
exit0