[AArch64][PATCH 2/14] Support ARMv8.2 FP16 Vector Three Same instructions.

ARMv8.2 adds 16-bit floating point operations as an optional extension
to floating point and Adv.SIMD support. This patch adds FP16
instructions to the group Vector Three Register Same, making them
available when +simd+fp16 is enabled.

The instructions added are: FMAXNM, FMAXNMP, FNMINNM, FMINNMP, FMLA,
FMLS, FADD, FADDP, FSUB, FABD, FMULX, FMUL, FCMEQ, FCMGE, FCMGT, FACGE,
FACGT, FMAX, FMAXP, FMIN, FMINP, FRECPS, FDIV and FRSQRTS.

The general form for these instructions is
  <OP> <Vd>.<T>, <Vs>.<T>, <Vm>.<T>
  where T is 4h or 8h.

gas/testsuite/
2015-12-14  Matthew Wahab  <matthew.wahab@arm.com>

	* gas/aarch64/advsimd-fp16.d: New.
	* gas/aarch64/advsimd-fp16.s: New.

opcodes/
2015-12-14  Matthew Wahab  <matthew.wahab@arm.com>

	* aarch64-asm-2.c: Regenerate.
	* aarch64-dis-2.c: Regenerate.
	* aarch64-opc-2.c: Regenerate.
	* aarch64-tbl.h (QL_V3SAMEH): New.
	(aarch64_opcode_table): Add fp16 versions of fmaxnm, fmla, fadd,
	fmulx, fcmeq, fmax, frecps, fminnm, fmls, fsub, fmin, frsqrts,
	fmaxnmp, faddp, fmul, fcmge, facge, fmaxp, fdiv, fminnmp, fabd,
	fcmgt, facgt and fminp to the vector three same group.

Change-Id: I3f1c5fe82ca73f7a17fe5329cf2b0de03c94328c
This commit is contained in:
Matthew Wahab 2015-12-14 16:44:02 +00:00
parent 40d16a76c7
commit 51d543ed93
8 changed files with 1907 additions and 1363 deletions

View File

@ -1,3 +1,8 @@
2015-12-14 Matthew Wahab <matthew.wahab@arm.com>
* gas/aarch64/advsimd-fp16.d: New.
* gas/aarch64/advsimd-fp16.s: New.
2015-12-12 Alan Modra <amodra@gmail.com>
* gas/sh/tlsd.s: Use .tdata not .tbss.

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@ -0,0 +1,169 @@
#as: -march=armv8.2-a+simd+fp16
#objdump: -dr
.*: file format .*
Disassembly of section \.text:
0000000000000000 <.*>:
[0-9a-f]+: 4e63c441 fmaxnm v1.2d, v2.2d, v3.2d
[0-9a-f]+: 0e23c441 fmaxnm v1.2s, v2.2s, v3.2s
[0-9a-f]+: 4e23c441 fmaxnm v1.4s, v2.4s, v3.4s
[0-9a-f]+: 0e400400 fmaxnm v0.4h, v0.4h, v0.4h
[0-9a-f]+: 0e430441 fmaxnm v1.4h, v2.4h, v3.4h
[0-9a-f]+: 4e400400 fmaxnm v0.8h, v0.8h, v0.8h
[0-9a-f]+: 4e430441 fmaxnm v1.8h, v2.8h, v3.8h
[0-9a-f]+: 6e63c441 fmaxnmp v1.2d, v2.2d, v3.2d
[0-9a-f]+: 2e23c441 fmaxnmp v1.2s, v2.2s, v3.2s
[0-9a-f]+: 6e23c441 fmaxnmp v1.4s, v2.4s, v3.4s
[0-9a-f]+: 2e400400 fmaxnmp v0.4h, v0.4h, v0.4h
[0-9a-f]+: 2e430441 fmaxnmp v1.4h, v2.4h, v3.4h
[0-9a-f]+: 6e400400 fmaxnmp v0.8h, v0.8h, v0.8h
[0-9a-f]+: 6e430441 fmaxnmp v1.8h, v2.8h, v3.8h
[0-9a-f]+: 4ee3c441 fminnm v1.2d, v2.2d, v3.2d
[0-9a-f]+: 0ea3c441 fminnm v1.2s, v2.2s, v3.2s
[0-9a-f]+: 4ea3c441 fminnm v1.4s, v2.4s, v3.4s
[0-9a-f]+: 0ec00400 fminnm v0.4h, v0.4h, v0.4h
[0-9a-f]+: 0ec30441 fminnm v1.4h, v2.4h, v3.4h
[0-9a-f]+: 4ec00400 fminnm v0.8h, v0.8h, v0.8h
[0-9a-f]+: 4ec30441 fminnm v1.8h, v2.8h, v3.8h
[0-9a-f]+: 6ee3c441 fminnmp v1.2d, v2.2d, v3.2d
[0-9a-f]+: 2ea3c441 fminnmp v1.2s, v2.2s, v3.2s
[0-9a-f]+: 6ea3c441 fminnmp v1.4s, v2.4s, v3.4s
[0-9a-f]+: 2ec00400 fminnmp v0.4h, v0.4h, v0.4h
[0-9a-f]+: 2ec30441 fminnmp v1.4h, v2.4h, v3.4h
[0-9a-f]+: 6ec00400 fminnmp v0.8h, v0.8h, v0.8h
[0-9a-f]+: 6ec30441 fminnmp v1.8h, v2.8h, v3.8h
[0-9a-f]+: 4e63cc41 fmla v1.2d, v2.2d, v3.2d
[0-9a-f]+: 0e23cc41 fmla v1.2s, v2.2s, v3.2s
[0-9a-f]+: 4e23cc41 fmla v1.4s, v2.4s, v3.4s
[0-9a-f]+: 0e400c00 fmla v0.4h, v0.4h, v0.4h
[0-9a-f]+: 0e430c41 fmla v1.4h, v2.4h, v3.4h
[0-9a-f]+: 4e400c00 fmla v0.8h, v0.8h, v0.8h
[0-9a-f]+: 4e430c41 fmla v1.8h, v2.8h, v3.8h
[0-9a-f]+: 4ee3cc41 fmls v1.2d, v2.2d, v3.2d
[0-9a-f]+: 0ea3cc41 fmls v1.2s, v2.2s, v3.2s
[0-9a-f]+: 4ea3cc41 fmls v1.4s, v2.4s, v3.4s
[0-9a-f]+: 0ec00c00 fmls v0.4h, v0.4h, v0.4h
[0-9a-f]+: 0ec30c41 fmls v1.4h, v2.4h, v3.4h
[0-9a-f]+: 4ec00c00 fmls v0.8h, v0.8h, v0.8h
[0-9a-f]+: 4ec30c41 fmls v1.8h, v2.8h, v3.8h
[0-9a-f]+: 4e63d441 fadd v1.2d, v2.2d, v3.2d
[0-9a-f]+: 0e23d441 fadd v1.2s, v2.2s, v3.2s
[0-9a-f]+: 4e23d441 fadd v1.4s, v2.4s, v3.4s
[0-9a-f]+: 0e401400 fadd v0.4h, v0.4h, v0.4h
[0-9a-f]+: 0e431441 fadd v1.4h, v2.4h, v3.4h
[0-9a-f]+: 4e401400 fadd v0.8h, v0.8h, v0.8h
[0-9a-f]+: 4e431441 fadd v1.8h, v2.8h, v3.8h
[0-9a-f]+: 6e63d441 faddp v1.2d, v2.2d, v3.2d
[0-9a-f]+: 2e23d441 faddp v1.2s, v2.2s, v3.2s
[0-9a-f]+: 6e23d441 faddp v1.4s, v2.4s, v3.4s
[0-9a-f]+: 2e401400 faddp v0.4h, v0.4h, v0.4h
[0-9a-f]+: 2e431441 faddp v1.4h, v2.4h, v3.4h
[0-9a-f]+: 6e401400 faddp v0.8h, v0.8h, v0.8h
[0-9a-f]+: 6e431441 faddp v1.8h, v2.8h, v3.8h
[0-9a-f]+: 4ee3d441 fsub v1.2d, v2.2d, v3.2d
[0-9a-f]+: 0ea3d441 fsub v1.2s, v2.2s, v3.2s
[0-9a-f]+: 4ea3d441 fsub v1.4s, v2.4s, v3.4s
[0-9a-f]+: 0ec01400 fsub v0.4h, v0.4h, v0.4h
[0-9a-f]+: 0ec31441 fsub v1.4h, v2.4h, v3.4h
[0-9a-f]+: 4ec01400 fsub v0.8h, v0.8h, v0.8h
[0-9a-f]+: 4ec31441 fsub v1.8h, v2.8h, v3.8h
[0-9a-f]+: 4e63dc41 fmulx v1.2d, v2.2d, v3.2d
[0-9a-f]+: 0e23dc41 fmulx v1.2s, v2.2s, v3.2s
[0-9a-f]+: 4e23dc41 fmulx v1.4s, v2.4s, v3.4s
[0-9a-f]+: 0e401c00 fmulx v0.4h, v0.4h, v0.4h
[0-9a-f]+: 0e431c41 fmulx v1.4h, v2.4h, v3.4h
[0-9a-f]+: 4e401c00 fmulx v0.8h, v0.8h, v0.8h
[0-9a-f]+: 4e431c41 fmulx v1.8h, v2.8h, v3.8h
[0-9a-f]+: 6e63dc41 fmul v1.2d, v2.2d, v3.2d
[0-9a-f]+: 2e23dc41 fmul v1.2s, v2.2s, v3.2s
[0-9a-f]+: 6e23dc41 fmul v1.4s, v2.4s, v3.4s
[0-9a-f]+: 2e401c00 fmul v0.4h, v0.4h, v0.4h
[0-9a-f]+: 2e431c41 fmul v1.4h, v2.4h, v3.4h
[0-9a-f]+: 6e401c00 fmul v0.8h, v0.8h, v0.8h
[0-9a-f]+: 6e431c41 fmul v1.8h, v2.8h, v3.8h
[0-9a-f]+: 4e63e441 fcmeq v1.2d, v2.2d, v3.2d
[0-9a-f]+: 0e23e441 fcmeq v1.2s, v2.2s, v3.2s
[0-9a-f]+: 4e23e441 fcmeq v1.4s, v2.4s, v3.4s
[0-9a-f]+: 0e402400 fcmeq v0.4h, v0.4h, v0.4h
[0-9a-f]+: 0e432441 fcmeq v1.4h, v2.4h, v3.4h
[0-9a-f]+: 4e402400 fcmeq v0.8h, v0.8h, v0.8h
[0-9a-f]+: 4e432441 fcmeq v1.8h, v2.8h, v3.8h
[0-9a-f]+: 6e63e441 fcmge v1.2d, v2.2d, v3.2d
[0-9a-f]+: 2e23e441 fcmge v1.2s, v2.2s, v3.2s
[0-9a-f]+: 6e23e441 fcmge v1.4s, v2.4s, v3.4s
[0-9a-f]+: 2e402400 fcmge v0.4h, v0.4h, v0.4h
[0-9a-f]+: 2e432441 fcmge v1.4h, v2.4h, v3.4h
[0-9a-f]+: 6e402400 fcmge v0.8h, v0.8h, v0.8h
[0-9a-f]+: 6e432441 fcmge v1.8h, v2.8h, v3.8h
[0-9a-f]+: 6ee3e441 fcmgt v1.2d, v2.2d, v3.2d
[0-9a-f]+: 2ea3e441 fcmgt v1.2s, v2.2s, v3.2s
[0-9a-f]+: 6ea3e441 fcmgt v1.4s, v2.4s, v3.4s
[0-9a-f]+: 2ec02400 fcmgt v0.4h, v0.4h, v0.4h
[0-9a-f]+: 2ec32441 fcmgt v1.4h, v2.4h, v3.4h
[0-9a-f]+: 6ec02400 fcmgt v0.8h, v0.8h, v0.8h
[0-9a-f]+: 6ec32441 fcmgt v1.8h, v2.8h, v3.8h
[0-9a-f]+: 6e63ec41 facge v1.2d, v2.2d, v3.2d
[0-9a-f]+: 2e23ec41 facge v1.2s, v2.2s, v3.2s
[0-9a-f]+: 6e23ec41 facge v1.4s, v2.4s, v3.4s
[0-9a-f]+: 2e402c00 facge v0.4h, v0.4h, v0.4h
[0-9a-f]+: 2e432c41 facge v1.4h, v2.4h, v3.4h
[0-9a-f]+: 6e402c00 facge v0.8h, v0.8h, v0.8h
[0-9a-f]+: 6e432c41 facge v1.8h, v2.8h, v3.8h
[0-9a-f]+: 6ee3ec41 facgt v1.2d, v2.2d, v3.2d
[0-9a-f]+: 2ea3ec41 facgt v1.2s, v2.2s, v3.2s
[0-9a-f]+: 6ea3ec41 facgt v1.4s, v2.4s, v3.4s
[0-9a-f]+: 2ec02c00 facgt v0.4h, v0.4h, v0.4h
[0-9a-f]+: 2ec32c41 facgt v1.4h, v2.4h, v3.4h
[0-9a-f]+: 6ec02c00 facgt v0.8h, v0.8h, v0.8h
[0-9a-f]+: 6ec32c41 facgt v1.8h, v2.8h, v3.8h
[0-9a-f]+: 4e63f441 fmax v1.2d, v2.2d, v3.2d
[0-9a-f]+: 0e23f441 fmax v1.2s, v2.2s, v3.2s
[0-9a-f]+: 4e23f441 fmax v1.4s, v2.4s, v3.4s
[0-9a-f]+: 0e403400 fmax v0.4h, v0.4h, v0.4h
[0-9a-f]+: 0e433441 fmax v1.4h, v2.4h, v3.4h
[0-9a-f]+: 4e403400 fmax v0.8h, v0.8h, v0.8h
[0-9a-f]+: 4e433441 fmax v1.8h, v2.8h, v3.8h
[0-9a-f]+: 6e63f441 fmaxp v1.2d, v2.2d, v3.2d
[0-9a-f]+: 2e23f441 fmaxp v1.2s, v2.2s, v3.2s
[0-9a-f]+: 6e23f441 fmaxp v1.4s, v2.4s, v3.4s
[0-9a-f]+: 2e403400 fmaxp v0.4h, v0.4h, v0.4h
[0-9a-f]+: 2e433441 fmaxp v1.4h, v2.4h, v3.4h
[0-9a-f]+: 6e403400 fmaxp v0.8h, v0.8h, v0.8h
[0-9a-f]+: 6e433441 fmaxp v1.8h, v2.8h, v3.8h
[0-9a-f]+: 4ee3f441 fmin v1.2d, v2.2d, v3.2d
[0-9a-f]+: 0ea3f441 fmin v1.2s, v2.2s, v3.2s
[0-9a-f]+: 4ea3f441 fmin v1.4s, v2.4s, v3.4s
[0-9a-f]+: 0ec03400 fmin v0.4h, v0.4h, v0.4h
[0-9a-f]+: 0ec33441 fmin v1.4h, v2.4h, v3.4h
[0-9a-f]+: 4ec03400 fmin v0.8h, v0.8h, v0.8h
[0-9a-f]+: 4ec33441 fmin v1.8h, v2.8h, v3.8h
[0-9a-f]+: 6ee3f441 fminp v1.2d, v2.2d, v3.2d
[0-9a-f]+: 2ea3f441 fminp v1.2s, v2.2s, v3.2s
[0-9a-f]+: 6ea3f441 fminp v1.4s, v2.4s, v3.4s
[0-9a-f]+: 2ec03400 fminp v0.4h, v0.4h, v0.4h
[0-9a-f]+: 2ec33441 fminp v1.4h, v2.4h, v3.4h
[0-9a-f]+: 6ec03400 fminp v0.8h, v0.8h, v0.8h
[0-9a-f]+: 6ec33441 fminp v1.8h, v2.8h, v3.8h
[0-9a-f]+: 4e63fc41 frecps v1.2d, v2.2d, v3.2d
[0-9a-f]+: 0e23fc41 frecps v1.2s, v2.2s, v3.2s
[0-9a-f]+: 4e23fc41 frecps v1.4s, v2.4s, v3.4s
[0-9a-f]+: 0e403c00 frecps v0.4h, v0.4h, v0.4h
[0-9a-f]+: 0e433c41 frecps v1.4h, v2.4h, v3.4h
[0-9a-f]+: 4e403c00 frecps v0.8h, v0.8h, v0.8h
[0-9a-f]+: 4e433c41 frecps v1.8h, v2.8h, v3.8h
[0-9a-f]+: 6e63fc41 fdiv v1.2d, v2.2d, v3.2d
[0-9a-f]+: 2e23fc41 fdiv v1.2s, v2.2s, v3.2s
[0-9a-f]+: 6e23fc41 fdiv v1.4s, v2.4s, v3.4s
[0-9a-f]+: 2e403c00 fdiv v0.4h, v0.4h, v0.4h
[0-9a-f]+: 2e433c41 fdiv v1.4h, v2.4h, v3.4h
[0-9a-f]+: 6e403c00 fdiv v0.8h, v0.8h, v0.8h
[0-9a-f]+: 6e433c41 fdiv v1.8h, v2.8h, v3.8h
[0-9a-f]+: 4ee3fc41 frsqrts v1.2d, v2.2d, v3.2d
[0-9a-f]+: 0ea3fc41 frsqrts v1.2s, v2.2s, v3.2s
[0-9a-f]+: 4ea3fc41 frsqrts v1.4s, v2.4s, v3.4s
[0-9a-f]+: 0ec03c00 frsqrts v0.4h, v0.4h, v0.4h
[0-9a-f]+: 0ec33c41 frsqrts v1.4h, v2.4h, v3.4h
[0-9a-f]+: 4ec03c00 frsqrts v0.8h, v0.8h, v0.8h
[0-9a-f]+: 4ec33c41 frsqrts v1.8h, v2.8h, v3.8h

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@ -0,0 +1,40 @@
/* simdhp.s Test file for AArch64 half-precision floating-point
vector instructions. */
/* Vector three-same. */
.macro three_same, op
\op v1.2d, v2.2d, v3.2d
\op v1.2s, v2.2s, v3.2s
\op v1.4s, v2.4s, v3.4s
\op v0.4h, v0.4h, v0.4h
\op v1.4h, v2.4h, v3.4h
\op v0.8h, v0.8h, v0.8h
\op v1.8h, v2.8h, v3.8h
.endm
.text
three_same fmaxnm
three_same fmaxnmp
three_same fminnm
three_same fminnmp
three_same fmla
three_same fmls
three_same fadd
three_same faddp
three_same fsub
three_same fmulx
three_same fmul
three_same fcmeq
three_same fcmge
three_same fcmgt
three_same facge
three_same facgt
three_same fmax
three_same fmaxp
three_same fmin
three_same fminp
three_same frecps
three_same fdiv
three_same frsqrts

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@ -1,3 +1,14 @@
2015-12-14 Matthew Wahab <matthew.wahab@arm.com>
* aarch64-asm-2.c: Regenerate.
* aarch64-dis-2.c: Regenerate.
* aarch64-opc-2.c: Regenerate.
* aarch64-tbl.h (QL_V3SAMEH): New.
(aarch64_opcode_table): Add fp16 versions of fmaxnm, fmla, fadd,
fmulx, fcmeq, fmax, frecps, fminnm, fmls, fsub, fmin, frsqrts,
fmaxnmp, faddp, fmul, fcmge, facge, fmaxp, fdiv, fminnmp, fabd,
fcmgt, facgt and fminp to the vector three same group.
2015-12-14 Matthew Wahab <matthew.wahab@arm.com>
* aarch64-tbl.h (aarch64_feature_simd_f16): New.

View File

@ -87,358 +87,358 @@ aarch64_find_real_opcode (const aarch64_opcode *opcode)
case 205: /* not */
value = 205; /* --> not. */
break;
case 261: /* mov */
case 260: /* orr */
value = 260; /* --> orr. */
break;
case 318: /* sxtl */
case 317: /* sshll */
value = 317; /* --> sshll. */
break;
case 320: /* sxtl2 */
case 319: /* sshll2 */
value = 319; /* --> sshll2. */
break;
case 340: /* uxtl */
case 339: /* ushll */
value = 339; /* --> ushll. */
break;
case 342: /* uxtl2 */
case 341: /* ushll2 */
value = 341; /* --> ushll2. */
break;
case 437: /* mov */
case 436: /* dup */
value = 436; /* --> dup. */
break;
case 506: /* sxtw */
case 505: /* sxth */
case 504: /* sxtb */
case 507: /* asr */
case 503: /* sbfx */
case 502: /* sbfiz */
case 501: /* sbfm */
value = 501; /* --> sbfm. */
break;
case 510: /* bfc */
case 511: /* bfxil */
case 509: /* bfi */
case 508: /* bfm */
value = 508; /* --> bfm. */
break;
case 516: /* uxth */
case 515: /* uxtb */
case 518: /* lsr */
case 517: /* lsl */
case 514: /* ubfx */
case 513: /* ubfiz */
case 512: /* ubfm */
value = 512; /* --> ubfm. */
break;
case 536: /* cset */
case 535: /* cinc */
case 534: /* csinc */
value = 534; /* --> csinc. */
break;
case 539: /* csetm */
case 538: /* cinv */
case 537: /* csinv */
value = 537; /* --> csinv. */
break;
case 541: /* cneg */
case 540: /* csneg */
value = 540; /* --> csneg. */
break;
case 559: /* rev */
case 560: /* rev64 */
value = 559; /* --> rev. */
break;
case 567: /* lsl */
case 566: /* lslv */
value = 566; /* --> lslv. */
break;
case 569: /* lsr */
case 568: /* lsrv */
value = 568; /* --> lsrv. */
break;
case 571: /* asr */
case 570: /* asrv */
value = 570; /* --> asrv. */
break;
case 573: /* ror */
case 572: /* rorv */
value = 572; /* --> rorv. */
break;
case 583: /* mul */
case 582: /* madd */
value = 582; /* --> madd. */
break;
case 585: /* mneg */
case 584: /* msub */
value = 584; /* --> msub. */
break;
case 587: /* smull */
case 586: /* smaddl */
value = 586; /* --> smaddl. */
break;
case 589: /* smnegl */
case 588: /* smsubl */
value = 588; /* --> smsubl. */
break;
case 592: /* umull */
case 591: /* umaddl */
value = 591; /* --> umaddl. */
break;
case 594: /* umnegl */
case 593: /* umsubl */
value = 593; /* --> umsubl. */
break;
case 605: /* ror */
case 604: /* extr */
value = 604; /* --> extr. */
break;
case 812: /* bic */
case 811: /* and */
value = 811; /* --> and. */
break;
case 814: /* mov */
case 813: /* orr */
value = 813; /* --> orr. */
break;
case 817: /* tst */
case 816: /* ands */
value = 816; /* --> ands. */
break;
case 822: /* uxtw */
case 821: /* mov */
case 820: /* orr */
value = 820; /* --> orr. */
break;
case 824: /* mvn */
case 823: /* orn */
value = 823; /* --> orn. */
break;
case 828: /* tst */
case 827: /* ands */
value = 827; /* --> ands. */
break;
case 954: /* staddb */
case 858: /* ldaddb */
value = 858; /* --> ldaddb. */
break;
case 955: /* staddh */
case 859: /* ldaddh */
value = 859; /* --> ldaddh. */
break;
case 956: /* stadd */
case 860: /* ldadd */
value = 860; /* --> ldadd. */
case 273: /* mov */
case 272: /* orr */
value = 272; /* --> orr. */
break;
case 342: /* sxtl */
case 341: /* sshll */
value = 341; /* --> sshll. */
break;
case 344: /* sxtl2 */
case 343: /* sshll2 */
value = 343; /* --> sshll2. */
break;
case 364: /* uxtl */
case 363: /* ushll */
value = 363; /* --> ushll. */
break;
case 366: /* uxtl2 */
case 365: /* ushll2 */
value = 365; /* --> ushll2. */
break;
case 461: /* mov */
case 460: /* dup */
value = 460; /* --> dup. */
break;
case 530: /* sxtw */
case 529: /* sxth */
case 528: /* sxtb */
case 531: /* asr */
case 527: /* sbfx */
case 526: /* sbfiz */
case 525: /* sbfm */
value = 525; /* --> sbfm. */
break;
case 534: /* bfc */
case 535: /* bfxil */
case 533: /* bfi */
case 532: /* bfm */
value = 532; /* --> bfm. */
break;
case 540: /* uxth */
case 539: /* uxtb */
case 542: /* lsr */
case 541: /* lsl */
case 538: /* ubfx */
case 537: /* ubfiz */
case 536: /* ubfm */
value = 536; /* --> ubfm. */
break;
case 560: /* cset */
case 559: /* cinc */
case 558: /* csinc */
value = 558; /* --> csinc. */
break;
case 563: /* csetm */
case 562: /* cinv */
case 561: /* csinv */
value = 561; /* --> csinv. */
break;
case 565: /* cneg */
case 564: /* csneg */
value = 564; /* --> csneg. */
break;
case 583: /* rev */
case 584: /* rev64 */
value = 583; /* --> rev. */
break;
case 591: /* lsl */
case 590: /* lslv */
value = 590; /* --> lslv. */
break;
case 593: /* lsr */
case 592: /* lsrv */
value = 592; /* --> lsrv. */
break;
case 595: /* asr */
case 594: /* asrv */
value = 594; /* --> asrv. */
break;
case 597: /* ror */
case 596: /* rorv */
value = 596; /* --> rorv. */
break;
case 607: /* mul */
case 606: /* madd */
value = 606; /* --> madd. */
break;
case 609: /* mneg */
case 608: /* msub */
value = 608; /* --> msub. */
break;
case 611: /* smull */
case 610: /* smaddl */
value = 610; /* --> smaddl. */
break;
case 613: /* smnegl */
case 612: /* smsubl */
value = 612; /* --> smsubl. */
break;
case 616: /* umull */
case 615: /* umaddl */
value = 615; /* --> umaddl. */
break;
case 618: /* umnegl */
case 617: /* umsubl */
value = 617; /* --> umsubl. */
break;
case 629: /* ror */
case 628: /* extr */
value = 628; /* --> extr. */
break;
case 836: /* bic */
case 835: /* and */
value = 835; /* --> and. */
break;
case 838: /* mov */
case 837: /* orr */
value = 837; /* --> orr. */
break;
case 841: /* tst */
case 840: /* ands */
value = 840; /* --> ands. */
break;
case 846: /* uxtw */
case 845: /* mov */
case 844: /* orr */
value = 844; /* --> orr. */
break;
case 848: /* mvn */
case 847: /* orn */
value = 847; /* --> orn. */
break;
case 852: /* tst */
case 851: /* ands */
value = 851; /* --> ands. */
break;
case 978: /* staddb */
case 882: /* ldaddb */
value = 882; /* --> ldaddb. */
break;
case 979: /* staddh */
case 883: /* ldaddh */
value = 883; /* --> ldaddh. */
break;
case 980: /* stadd */
case 884: /* ldadd */
value = 884; /* --> ldadd. */
break;
case 957: /* staddlb */
case 862: /* ldaddlb */
value = 862; /* --> ldaddlb. */
case 981: /* staddlb */
case 886: /* ldaddlb */
value = 886; /* --> ldaddlb. */
break;
case 958: /* staddlh */
case 865: /* ldaddlh */
value = 865; /* --> ldaddlh. */
case 982: /* staddlh */
case 889: /* ldaddlh */
value = 889; /* --> ldaddlh. */
break;
case 959: /* staddl */
case 868: /* ldaddl */
value = 868; /* --> ldaddl. */
case 983: /* staddl */
case 892: /* ldaddl */
value = 892; /* --> ldaddl. */
break;
case 960: /* stclrb */
case 870: /* ldclrb */
value = 870; /* --> ldclrb. */
case 984: /* stclrb */
case 894: /* ldclrb */
value = 894; /* --> ldclrb. */
break;
case 961: /* stclrh */
case 871: /* ldclrh */
value = 871; /* --> ldclrh. */
case 985: /* stclrh */
case 895: /* ldclrh */
value = 895; /* --> ldclrh. */
break;
case 962: /* stclr */
case 872: /* ldclr */
value = 872; /* --> ldclr. */
case 986: /* stclr */
case 896: /* ldclr */
value = 896; /* --> ldclr. */
break;
case 963: /* stclrlb */
case 874: /* ldclrlb */
value = 874; /* --> ldclrlb. */
case 987: /* stclrlb */
case 898: /* ldclrlb */
value = 898; /* --> ldclrlb. */
break;
case 964: /* stclrlh */
case 877: /* ldclrlh */
value = 877; /* --> ldclrlh. */
case 988: /* stclrlh */
case 901: /* ldclrlh */
value = 901; /* --> ldclrlh. */
break;
case 965: /* stclrl */
case 880: /* ldclrl */
value = 880; /* --> ldclrl. */
case 989: /* stclrl */
case 904: /* ldclrl */
value = 904; /* --> ldclrl. */
break;
case 966: /* steorb */
case 882: /* ldeorb */
value = 882; /* --> ldeorb. */
case 990: /* steorb */
case 906: /* ldeorb */
value = 906; /* --> ldeorb. */
break;
case 967: /* steorh */
case 883: /* ldeorh */
value = 883; /* --> ldeorh. */
case 991: /* steorh */
case 907: /* ldeorh */
value = 907; /* --> ldeorh. */
break;
case 968: /* steor */
case 884: /* ldeor */
value = 884; /* --> ldeor. */
case 992: /* steor */
case 908: /* ldeor */
value = 908; /* --> ldeor. */
break;
case 969: /* steorlb */
case 886: /* ldeorlb */
value = 886; /* --> ldeorlb. */
case 993: /* steorlb */
case 910: /* ldeorlb */
value = 910; /* --> ldeorlb. */
break;
case 970: /* steorlh */
case 889: /* ldeorlh */
value = 889; /* --> ldeorlh. */
case 994: /* steorlh */
case 913: /* ldeorlh */
value = 913; /* --> ldeorlh. */
break;
case 971: /* steorl */
case 892: /* ldeorl */
value = 892; /* --> ldeorl. */
case 995: /* steorl */
case 916: /* ldeorl */
value = 916; /* --> ldeorl. */
break;
case 972: /* stsetb */
case 894: /* ldsetb */
value = 894; /* --> ldsetb. */
case 996: /* stsetb */
case 918: /* ldsetb */
value = 918; /* --> ldsetb. */
break;
case 973: /* stseth */
case 895: /* ldseth */
value = 895; /* --> ldseth. */
case 997: /* stseth */
case 919: /* ldseth */
value = 919; /* --> ldseth. */
break;
case 974: /* stset */
case 896: /* ldset */
value = 896; /* --> ldset. */
case 998: /* stset */
case 920: /* ldset */
value = 920; /* --> ldset. */
break;
case 975: /* stsetlb */
case 898: /* ldsetlb */
value = 898; /* --> ldsetlb. */
case 999: /* stsetlb */
case 922: /* ldsetlb */
value = 922; /* --> ldsetlb. */
break;
case 976: /* stsetlh */
case 901: /* ldsetlh */
value = 901; /* --> ldsetlh. */
case 1000: /* stsetlh */
case 925: /* ldsetlh */
value = 925; /* --> ldsetlh. */
break;
case 977: /* stsetl */
case 904: /* ldsetl */
value = 904; /* --> ldsetl. */
case 1001: /* stsetl */
case 928: /* ldsetl */
value = 928; /* --> ldsetl. */
break;
case 978: /* stsmaxb */
case 906: /* ldsmaxb */
value = 906; /* --> ldsmaxb. */
case 1002: /* stsmaxb */
case 930: /* ldsmaxb */
value = 930; /* --> ldsmaxb. */
break;
case 979: /* stsmaxh */
case 907: /* ldsmaxh */
value = 907; /* --> ldsmaxh. */
case 1003: /* stsmaxh */
case 931: /* ldsmaxh */
value = 931; /* --> ldsmaxh. */
break;
case 980: /* stsmax */
case 908: /* ldsmax */
value = 908; /* --> ldsmax. */
break;
case 981: /* stsmaxlb */
case 910: /* ldsmaxlb */
value = 910; /* --> ldsmaxlb. */
break;
case 982: /* stsmaxlh */
case 913: /* ldsmaxlh */
value = 913; /* --> ldsmaxlh. */
break;
case 983: /* stsmaxl */
case 916: /* ldsmaxl */
value = 916; /* --> ldsmaxl. */
break;
case 984: /* stsminb */
case 918: /* ldsminb */
value = 918; /* --> ldsminb. */
break;
case 985: /* stsminh */
case 919: /* ldsminh */
value = 919; /* --> ldsminh. */
break;
case 986: /* stsmin */
case 920: /* ldsmin */
value = 920; /* --> ldsmin. */
break;
case 987: /* stsminlb */
case 922: /* ldsminlb */
value = 922; /* --> ldsminlb. */
break;
case 988: /* stsminlh */
case 925: /* ldsminlh */
value = 925; /* --> ldsminlh. */
break;
case 989: /* stsminl */
case 928: /* ldsminl */
value = 928; /* --> ldsminl. */
break;
case 990: /* stumaxb */
case 930: /* ldumaxb */
value = 930; /* --> ldumaxb. */
break;
case 991: /* stumaxh */
case 931: /* ldumaxh */
value = 931; /* --> ldumaxh. */
break;
case 992: /* stumax */
case 932: /* ldumax */
value = 932; /* --> ldumax. */
break;
case 993: /* stumaxlb */
case 934: /* ldumaxlb */
value = 934; /* --> ldumaxlb. */
break;
case 994: /* stumaxlh */
case 937: /* ldumaxlh */
value = 937; /* --> ldumaxlh. */
break;
case 995: /* stumaxl */
case 940: /* ldumaxl */
value = 940; /* --> ldumaxl. */
break;
case 996: /* stuminb */
case 942: /* lduminb */
value = 942; /* --> lduminb. */
break;
case 997: /* stuminh */
case 943: /* lduminh */
value = 943; /* --> lduminh. */
break;
case 998: /* stumin */
case 944: /* ldumin */
value = 944; /* --> ldumin. */
break;
case 999: /* stuminlb */
case 946: /* lduminlb */
value = 946; /* --> lduminlb. */
break;
case 1000: /* stuminlh */
case 949: /* lduminlh */
value = 949; /* --> lduminlh. */
break;
case 1001: /* stuminl */
case 952: /* lduminl */
value = 952; /* --> lduminl. */
break;
case 1003: /* mov */
case 1002: /* movn */
value = 1002; /* --> movn. */
break;
case 1005: /* mov */
case 1004: /* movz */
value = 1004; /* --> movz. */
break;
case 1018: /* psb */
case 1017: /* esb */
case 1016: /* sevl */
case 1015: /* sev */
case 1014: /* wfi */
case 1013: /* wfe */
case 1012: /* yield */
case 1011: /* nop */
case 1010: /* hint */
value = 1010; /* --> hint. */
break;
case 1027: /* tlbi */
case 1026: /* ic */
case 1025: /* dc */
case 1024: /* at */
case 1023: /* sys */
value = 1023; /* --> sys. */
case 1004: /* stsmax */
case 932: /* ldsmax */
value = 932; /* --> ldsmax. */
break;
case 1005: /* stsmaxlb */
case 934: /* ldsmaxlb */
value = 934; /* --> ldsmaxlb. */
break;
case 1006: /* stsmaxlh */
case 937: /* ldsmaxlh */
value = 937; /* --> ldsmaxlh. */
break;
case 1007: /* stsmaxl */
case 940: /* ldsmaxl */
value = 940; /* --> ldsmaxl. */
break;
case 1008: /* stsminb */
case 942: /* ldsminb */
value = 942; /* --> ldsminb. */
break;
case 1009: /* stsminh */
case 943: /* ldsminh */
value = 943; /* --> ldsminh. */
break;
case 1010: /* stsmin */
case 944: /* ldsmin */
value = 944; /* --> ldsmin. */
break;
case 1011: /* stsminlb */
case 946: /* ldsminlb */
value = 946; /* --> ldsminlb. */
break;
case 1012: /* stsminlh */
case 949: /* ldsminlh */
value = 949; /* --> ldsminlh. */
break;
case 1013: /* stsminl */
case 952: /* ldsminl */
value = 952; /* --> ldsminl. */
break;
case 1014: /* stumaxb */
case 954: /* ldumaxb */
value = 954; /* --> ldumaxb. */
break;
case 1015: /* stumaxh */
case 955: /* ldumaxh */
value = 955; /* --> ldumaxh. */
break;
case 1016: /* stumax */
case 956: /* ldumax */
value = 956; /* --> ldumax. */
break;
case 1017: /* stumaxlb */
case 958: /* ldumaxlb */
value = 958; /* --> ldumaxlb. */
break;
case 1018: /* stumaxlh */
case 961: /* ldumaxlh */
value = 961; /* --> ldumaxlh. */
break;
case 1019: /* stumaxl */
case 964: /* ldumaxl */
value = 964; /* --> ldumaxl. */
break;
case 1020: /* stuminb */
case 966: /* lduminb */
value = 966; /* --> lduminb. */
break;
case 1021: /* stuminh */
case 967: /* lduminh */
value = 967; /* --> lduminh. */
break;
case 1022: /* stumin */
case 968: /* ldumin */
value = 968; /* --> ldumin. */
break;
case 1023: /* stuminlb */
case 970: /* lduminlb */
value = 970; /* --> lduminlb. */
break;
case 1024: /* stuminlh */
case 973: /* lduminlh */
value = 973; /* --> lduminlh. */
break;
case 1025: /* stuminl */
case 976: /* lduminl */
value = 976; /* --> lduminl. */
break;
case 1027: /* mov */
case 1026: /* movn */
value = 1026; /* --> movn. */
break;
case 1029: /* mov */
case 1028: /* movz */
value = 1028; /* --> movz. */
break;
case 1042: /* psb */
case 1041: /* esb */
case 1040: /* sevl */
case 1039: /* sev */
case 1038: /* wfi */
case 1037: /* wfe */
case 1036: /* yield */
case 1035: /* nop */
case 1034: /* hint */
value = 1034; /* --> hint. */
break;
case 1051: /* tlbi */
case 1050: /* ic */
case 1049: /* dc */
case 1048: /* at */
case 1047: /* sys */
value = 1047; /* --> sys. */
break;
default: return NULL;
}

File diff suppressed because it is too large Load Diff

View File

@ -122,74 +122,74 @@ const struct aarch64_operand aarch64_operands[] =
static const unsigned op_enum_table [] =
{
0,
720,
721,
722,
725,
726,
727,
728,
729,
723,
724,
730,
731,
744,
745,
746,
749,
750,
751,
752,
753,
747,
748,
754,
755,
758,
759,
760,
761,
762,
756,
757,
763,
764,
807,
808,
809,
810,
777,
778,
779,
782,
783,
784,
785,
786,
780,
781,
787,
788,
831,
832,
833,
834,
12,
519,
520,
1002,
1004,
1006,
814,
1005,
1003,
261,
507,
518,
517,
812,
514,
511,
503,
502,
509,
510,
513,
515,
516,
822,
535,
538,
543,
544,
1026,
1028,
1030,
838,
1029,
1027,
273,
531,
542,
541,
536,
836,
538,
535,
527,
526,
533,
534,
537,
539,
664,
540,
846,
559,
562,
565,
560,
563,
688,
162,
163,
164,
165,
426,
605,
318,
320,
340,
450,
629,
342,
344,
364,
366,
};
/* Given the opcode enumerator OP, return the pointer to the corresponding

View File

@ -921,6 +921,13 @@
QLF3(V_2D , V_2D , V_2D ) \
}
/* e.g. FMAXNM <Vd>.<T>, <Vn>.<T>, <Vm>.<T>. */
#define QL_V3SAMEH \
{ \
QLF3 (V_4H , V_4H , V_4H ), \
QLF3 (V_8H , V_8H , V_8H ), \
}
/* e.g. SQDMLAL<Q> <Vd>.<Ta>, <Vn>.<Tb>, <Vm>.<Tb>. */
#define QL_V3LONGHS \
{ \
@ -1584,19 +1591,43 @@ struct aarch64_opcode aarch64_opcode_table[] =
{"sqdmulh", 0xe20b400, 0xbf20fc00, asimdsame, 0, SIMD, OP3 (Vd, Vn, Vm), QL_V3SAMEHS, F_SIZEQ},
{"addp", 0xe20bc00, 0xbf20fc00, asimdsame, 0, SIMD, OP3 (Vd, Vn, Vm), QL_V3SAME, F_SIZEQ},
{"fmaxnm", 0xe20c400, 0xbfa0fc00, asimdsame, 0, SIMD, OP3 (Vd, Vn, Vm), QL_V3SAMESD, F_SIZEQ},
{"fmaxnm", 0xe400400, 0xbfe0fc00, asimdsame, 0, SIMD_F16,
OP3 (Vd, Vn, Vm), QL_V3SAMEH, F_SIZEQ},
{"fmla", 0xe20cc00, 0xbfa0fc00, asimdsame, 0, SIMD, OP3 (Vd, Vn, Vm), QL_V3SAMESD, F_SIZEQ},
{"fmla", 0xe400c00, 0xbfe0fc00, asimdsame, 0, SIMD_F16,
OP3 (Vd, Vn, Vm), QL_V3SAMEH, F_SIZEQ},
{"fadd", 0xe20d400, 0xbfa0fc00, asimdsame, 0, SIMD, OP3 (Vd, Vn, Vm), QL_V3SAMESD, F_SIZEQ},
{"fadd", 0xe401400, 0xbfe0fc00, asimdsame, 0, SIMD_F16,
OP3 (Vd, Vn, Vm), QL_V3SAMEH, F_SIZEQ},
{"fmulx", 0xe20dc00, 0xbfa0fc00, asimdsame, 0, SIMD, OP3 (Vd, Vn, Vm), QL_V3SAMESD, F_SIZEQ},
{"fmulx", 0xe401c00, 0xbfe0fc00, asimdsame, 0, SIMD_F16,
OP3 (Vd, Vn, Vm), QL_V3SAMEH, F_SIZEQ},
{"fcmeq", 0xe20e400, 0xbfa0fc00, asimdsame, 0, SIMD, OP3 (Vd, Vn, Vm), QL_V3SAMESD, F_SIZEQ},
{"fcmeq", 0xe402400, 0xbfe0fc00, asimdsame, 0, SIMD_F16,
OP3 (Vd, Vn, Vm), QL_V3SAMEH, F_SIZEQ},
{"fmax", 0xe20f400, 0xbfa0fc00, asimdsame, 0, SIMD, OP3 (Vd, Vn, Vm), QL_V3SAMESD, F_SIZEQ},
{"fmax", 0xe403400, 0xbfe0fc00, asimdsame, 0, SIMD_F16,
OP3 (Vd, Vn, Vm), QL_V3SAMEH, F_SIZEQ},
{"frecps", 0xe20fc00, 0xbfa0fc00, asimdsame, 0, SIMD, OP3 (Vd, Vn, Vm), QL_V3SAMESD, F_SIZEQ},
{"frecps", 0xe403c00, 0xbfe0fc00, asimdsame, 0, SIMD_F16,
OP3 (Vd, Vn, Vm), QL_V3SAMEH, F_SIZEQ},
{"and", 0xe201c00, 0xbfe0fc00, asimdsame, 0, SIMD, OP3 (Vd, Vn, Vm), QL_V3SAMEB, F_SIZEQ},
{"bic", 0xe601c00, 0xbfe0fc00, asimdsame, 0, SIMD, OP3 (Vd, Vn, Vm), QL_V3SAMEB, F_SIZEQ},
{"fminnm", 0xea0c400, 0xbfa0fc00, asimdsame, 0, SIMD, OP3 (Vd, Vn, Vm), QL_V3SAMESD, F_SIZEQ},
{"fminnm", 0xec00400, 0xbfe0fc00, asimdsame, 0, SIMD_F16,
OP3 (Vd, Vn, Vm), QL_V3SAMEH, F_SIZEQ},
{"fmls", 0xea0cc00, 0xbfa0fc00, asimdsame, 0, SIMD, OP3 (Vd, Vn, Vm), QL_V3SAMESD, F_SIZEQ},
{"fmls", 0xec00c00, 0xbfe0fc00, asimdsame, 0, SIMD_F16,
OP3 (Vd, Vn, Vm), QL_V3SAMEH, F_SIZEQ},
{"fsub", 0xea0d400, 0xbfa0fc00, asimdsame, 0, SIMD, OP3 (Vd, Vn, Vm), QL_V3SAMESD, F_SIZEQ},
{"fsub", 0xec01400, 0xbfe0fc00, asimdsame, 0, SIMD_F16,
OP3 (Vd, Vn, Vm), QL_V3SAMEH, F_SIZEQ},
{"fmin", 0xea0f400, 0xbfa0fc00, asimdsame, 0, SIMD, OP3 (Vd, Vn, Vm), QL_V3SAMESD, F_SIZEQ},
{"fmin", 0xec03400, 0xbfe0fc00, asimdsame, 0, SIMD_F16,
OP3 (Vd, Vn, Vm), QL_V3SAMEH, F_SIZEQ},
{"frsqrts", 0xea0fc00, 0xbfa0fc00, asimdsame, 0, SIMD, OP3 (Vd, Vn, Vm), QL_V3SAMESD, F_SIZEQ},
{"frsqrts", 0xec03c00, 0xbfe0fc00, asimdsame, 0, SIMD_F16,
OP3 (Vd, Vn, Vm), QL_V3SAMEH, F_SIZEQ},
{"orr", 0xea01c00, 0xbfe0fc00, asimdsame, 0, SIMD, OP3 (Vd, Vn, Vm), QL_V3SAMEB, F_HAS_ALIAS | F_SIZEQ},
{"mov", 0xea01c00, 0xbfe0fc00, asimdsame, OP_MOV_V, SIMD, OP2 (Vd, Vn), QL_V2SAMEB, F_ALIAS | F_CONV},
{"orn", 0xee01c00, 0xbfe0fc00, asimdsame, 0, SIMD, OP3 (Vd, Vn, Vm), QL_V3SAMEB, F_SIZEQ},
@ -1623,19 +1654,43 @@ struct aarch64_opcode aarch64_opcode_table[] =
{"uminp", 0x2e20ac00, 0xbf20fc00, asimdsame, 0, SIMD, OP3 (Vd, Vn, Vm), QL_V3SAMEBHS, F_SIZEQ},
{"sqrdmulh", 0x2e20b400, 0xbf20fc00, asimdsame, 0, SIMD, OP3 (Vd, Vn, Vm), QL_V3SAMEHS, F_SIZEQ},
{"fmaxnmp", 0x2e20c400, 0xbfa0fc00, asimdsame, 0, SIMD, OP3 (Vd, Vn, Vm), QL_V3SAMESD, F_SIZEQ},
{"fmaxnmp", 0x2e400400, 0xbfe0fc00, asimdsame, 0, SIMD_F16,
OP3 (Vd, Vn, Vm), QL_V3SAMEH, F_SIZEQ},
{"faddp", 0x2e20d400, 0xbfa0fc00, asimdsame, 0, SIMD, OP3 (Vd, Vn, Vm), QL_V3SAMESD, F_SIZEQ},
{"faddp", 0x2e401400, 0xbfe0fc00, asimdsame, 0, SIMD_F16,
OP3 (Vd, Vn, Vm), QL_V3SAMEH, F_SIZEQ},
{"fmul", 0x2e20dc00, 0xbfa0fc00, asimdsame, 0, SIMD, OP3 (Vd, Vn, Vm), QL_V3SAMESD, F_SIZEQ},
{"fmul", 0x2e401c00, 0xbfe0fc00, asimdsame, 0, SIMD_F16,
OP3 (Vd, Vn, Vm), QL_V3SAMEH, F_SIZEQ},
{"fcmge", 0x2e20e400, 0xbfa0fc00, asimdsame, 0, SIMD, OP3 (Vd, Vn, Vm), QL_V3SAMESD, F_SIZEQ},
{"fcmge", 0x2e402400, 0xbfe0fc00, asimdsame, 0, SIMD_F16,
OP3 (Vd, Vn, Vm), QL_V3SAMEH, F_SIZEQ},
{"facge", 0x2e20ec00, 0xbfa0fc00, asimdsame, 0, SIMD, OP3 (Vd, Vn, Vm), QL_V3SAMESD, F_SIZEQ},
{"facge", 0x2e402c00, 0xbfe0fc00, asimdsame, 0, SIMD_F16,
OP3 (Vd, Vn, Vm), QL_V3SAMEH, F_SIZEQ},
{"fmaxp", 0x2e20f400, 0xbfa0fc00, asimdsame, 0, SIMD, OP3 (Vd, Vn, Vm), QL_V3SAMESD, F_SIZEQ},
{"fmaxp", 0x2e403400, 0xbfe0fc00, asimdsame, 0, SIMD_F16,
OP3 (Vd, Vn, Vm), QL_V3SAMEH, F_SIZEQ},
{"fdiv", 0x2e20fc00, 0xbfa0fc00, asimdsame, 0, SIMD, OP3 (Vd, Vn, Vm), QL_V3SAMESD, F_SIZEQ},
{"fdiv", 0x2e403c00, 0xbfe0fc00, asimdsame, 0, SIMD_F16,
OP3 (Vd, Vn, Vm), QL_V3SAMEH, F_SIZEQ},
{"eor", 0x2e201c00, 0xbfe0fc00, asimdsame, 0, SIMD, OP3 (Vd, Vn, Vm), QL_V3SAMEB, F_SIZEQ},
{"bsl", 0x2e601c00, 0xbfe0fc00, asimdsame, 0, SIMD, OP3 (Vd, Vn, Vm), QL_V3SAMEB, F_SIZEQ},
{"fminnmp", 0x2ea0c400, 0xbfa0fc00, asimdsame, 0, SIMD, OP3 (Vd, Vn, Vm), QL_V3SAMESD, F_SIZEQ},
{"fminnmp", 0x2ec00400, 0xbfe0fc00, asimdsame, 0, SIMD_F16,
OP3 (Vd, Vn, Vm), QL_V3SAMEH, F_SIZEQ},
{"fabd", 0x2ea0d400, 0xbfa0fc00, asimdsame, 0, SIMD, OP3 (Vd, Vn, Vm), QL_V3SAMESD, F_SIZEQ},
{"fabd", 0x2ec01400, 0xbfe0fc00, asimdsame, 0, SIMD_F16,
OP3 (Vd, Vn, Vm), QL_V3SAMEH, F_SIZEQ},
{"fcmgt", 0x2ea0e400, 0xbfa0fc00, asimdsame, 0, SIMD, OP3 (Vd, Vn, Vm), QL_V3SAMESD, F_SIZEQ},
{"fcmgt", 0x2ec02400, 0xbfe0fc00, asimdsame, 0, SIMD_F16,
OP3 (Vd, Vn, Vm), QL_V3SAMEH, F_SIZEQ},
{"facgt", 0x2ea0ec00, 0xbfa0fc00, asimdsame, 0, SIMD, OP3 (Vd, Vn, Vm), QL_V3SAMESD, F_SIZEQ},
{"facgt", 0x2ec02c00, 0xbfe0fc00, asimdsame, 0, SIMD_F16,
OP3 (Vd, Vn, Vm), QL_V3SAMEH, F_SIZEQ},
{"fminp", 0x2ea0f400, 0xbfa0fc00, asimdsame, 0, SIMD, OP3 (Vd, Vn, Vm), QL_V3SAMESD, F_SIZEQ},
{"fminp", 0x2ec03400, 0xbfe0fc00, asimdsame, 0, SIMD_F16,
OP3 (Vd, Vn, Vm), QL_V3SAMEH, F_SIZEQ},
{"bit", 0x2ea01c00, 0xbfe0fc00, asimdsame, 0, SIMD, OP3 (Vd, Vn, Vm), QL_V3SAMEB, F_SIZEQ},
{"bif", 0x2ee01c00, 0xbfe0fc00, asimdsame, 0, SIMD, OP3 (Vd, Vn, Vm), QL_V3SAMEB, F_SIZEQ},
/* AdvSIMD three same extension. */