Fix sparc testcases when building with 64-bit default.

gas/testsuite/

	* gas/sparc/imm-plus-rreg.d: Fix address regex for 64-bit.
	* gas/sparc/save-args.d: Likewise.
	* gas/sparc/ticc-imm-reg.d: Likewise, add -32 to options.
	* gas/sparc/v8-movwr-imm.d: Likewise.

gas/testsuite/ChangeLog

@@ -3,6 +3,11 @@
 	* gas/sparc/hpcvis3.s: Update for fixed fchksum16 mnemonic.
 	* gas/sparc/hpcvis3.d: Likewise.
 
+	* gas/sparc/imm-plus-rreg.d: Fix address regex for 64-bit.
+	* gas/sparc/save-args.d: Likewise.
+	* gas/sparc/ticc-imm-reg.d: Likewise, add -32 to options.
+	* gas/sparc/v8-movwr-imm.d: Likewise.
+
 2011-09-08  Mark Fortescue <mark@mtfhpc.demon.co.uk>
 
 	* gas/sparc/imm-plus-rreg.[sd]: New test.

gas/testsuite/gas/sparc/imm-plus-rreg.d

@@ -6,7 +6,7 @@
 
 Disassembly of section .text:
 
-00000000 <foo>:
+0+ <foo>:
    0:	c2 02 20 0a 	ld  \[ %o0 \+ 0xa \], %g1
    4:	c4 04 a0 0a 	ld  \[ %l2 \+ 0xa \], %g2
    8:	c4 22 20 0a 	st  %g2, \[ %o0 \+ 0xa \]

gas/testsuite/gas/sparc/save-args.d

@@ -6,7 +6,7 @@
 
 Disassembly of section .text:
 
-00000000 <foo>:
+0+ <foo>:
    0:	81 e0 00 00 	save 
    4:	9d e3 bf a0 	save  %sp, -96, %sp
    8:	9d e3 bf a0 	save  %sp, -96, %sp

gas/testsuite/gas/sparc/ticc-imm-reg.d

@@ -1,4 +1,4 @@
-#as: -Av8
+#as: -32 -Av8
 #objdump: -dr
 #name: software traps
 
@@ -6,7 +6,7 @@
 
 Disassembly of section .text:
 
-00000000 <foo>:
+0+ <foo>:
    0:	91 d2 00 00 	ta  %o0
    4:	91 d2 00 0a 	ta  %o0 \+ %o2
    8:	91 d4 20 0a 	ta  %l0 \+ 0xa

gas/testsuite/gas/sparc/v8-movwr-imm.d

@@ -1,4 +1,4 @@
-#as: -Av8
+#as: -32 -Av8
 #objdump: -dr
 #name: V8 mov/wr aliases
 
@@ -6,7 +6,7 @@
 
 Disassembly of section .text:
 
-00000000 <foo>:
+0+ <foo>:
    0:	83 80 00 10 	mov  %l0, %asr1
    4:	81 80 00 10 	mov  %l0, %y
    8:	81 88 00 10 	mov  %l0, %psr