2006-04-07 Paul Brook <paul@codesourcery.com>

gas/
	* config/tc-arm.c (THUMB2_LOAD_BIT): Define.
	(move_or_literal_pool): Handle Thumb-2 instructions.
	(do_t_ldst): Call move_or_literal_pool for =N addressing modes.
gas/testsuite/
	* gas/arm/thumb2_pool.d: New test.
	* gas/arm/thumb2_pool.s: New test.
This commit is contained in:
Paul Brook 2006-04-07 15:03:45 +00:00
parent 235ecfbc5e
commit 53365c0d76
5 changed files with 57 additions and 3 deletions

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@ -1,3 +1,9 @@
2006-04-07 Paul Brook <paul@codesourcery.com>
* config/tc-arm.c (THUMB2_LOAD_BIT): Define.
(move_or_literal_pool): Handle Thumb-2 instructions.
(do_t_ldst): Call move_or_literal_pool for =N addressing modes.
2006-04-07 Alan Modra <amodra@bigpond.net.au>
PR 2512.

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@ -560,6 +560,7 @@ struct asm_opcode
#define THUMB_SIZE 2 /* Size of thumb instruction. */
#define THUMB_PP_PC_LR 0x0100
#define THUMB_LOAD_BIT 0x0800
#define THUMB2_LOAD_BIT 0x00100000
#define BAD_ARGS _("bad arguments to instruction")
#define BAD_PC _("r15 not allowed here")
@ -4443,7 +4444,14 @@ encode_arm_cp_address (int i, int wb_ok, int unind_ok, int reloc_override)
static int
move_or_literal_pool (int i, bfd_boolean thumb_p, bfd_boolean mode_3)
{
if ((inst.instruction & (thumb_p ? THUMB_LOAD_BIT : LOAD_BIT)) == 0)
unsigned long tbit;
if (thumb_p)
tbit = (inst.instruction > 0xffff) ? THUMB2_LOAD_BIT : THUMB_LOAD_BIT;
else
tbit = LOAD_BIT;
if ((inst.instruction & tbit) == 0)
{
inst.error = _("invalid pseudo operation");
return 1;
@ -4457,7 +4465,7 @@ move_or_literal_pool (int i, bfd_boolean thumb_p, bfd_boolean mode_3)
{
if (thumb_p)
{
if ((inst.reloc.exp.X_add_number & ~0xFF) == 0)
if (!unified_syntax && (inst.reloc.exp.X_add_number & ~0xFF) == 0)
{
/* This can be done with a mov(1) instruction. */
inst.instruction = T_OPCODE_MOV_I8 | (inst.operands[i].reg << 8);
@ -5965,7 +5973,7 @@ encode_thumb32_addr_mode (int i, bfd_boolean is_t, bfd_boolean is_d)
bfd_boolean is_pc = (inst.operands[i].reg == REG_PC);
constraint (!inst.operands[i].isreg,
_("Thumb does not support the ldr =N pseudo-operation"));
_("Instruction does not support =N addresses"));
inst.instruction |= inst.operands[i].reg << 16;
if (inst.operands[i].immisreg)
@ -6979,6 +6987,13 @@ do_t_ldst (void)
opcode = inst.instruction;
if (unified_syntax)
{
if (!inst.operands[1].isreg)
{
if (opcode <= 0xffff)
inst.instruction = THUMB_OP32 (opcode);
if (move_or_literal_pool (0, /*thumb_p=*/TRUE, /*mode_3=*/FALSE))
return;
}
if (inst.operands[1].isreg
&& !inst.operands[1].writeback
&& !inst.operands[1].shifted && !inst.operands[1].postind

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@ -1,3 +1,8 @@
2006-04-07 Paul Brook <paul@codesourcery.com>
* gas/arm/thumb2_pool.d: New test.
* gas/arm/thumb2_pool.s: New test.
2006-04-05 Richard Sandiford <richard@codesourcery.com>
* gas/sparc/vxworks-pic.s, gas/sparc/vxworks-pic.d: New test.

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@ -0,0 +1,15 @@
# as: -march=armv6t2
# objdump: -dr --prefix-addresses --show-raw-insn
.*: +file format .*arm.*
Disassembly of section .text:
0+000 <[^>]+> 4e04 ldr r6, \[pc, #16\] \(00+14 <[^>]+>\)
0+002 <[^>]+> 4904 ldr r1, \[pc, #16\] \(00+14 <[^>]+>\)
0+004 <[^>]+> f8df 600c ldr\.w r6, \[pc, #12\] ; 00+14 <[^>]+>
0+008 <[^>]+> f8df 9008 ldr\.w r9, \[pc, #8\] ; 00+14 <[^>]+>
0+00c <[^>]+> bf00 nop
0+00e <[^>]+> f8df 5004 ldr\.w r5, \[pc, #4\] ; 00+14 <[^>]+>
0+012 <[^>]+> 4900 ldr r1, \[pc, #0\] \(00+14 <[^>]+>\)
0+014 <[^>]+> (5678|1234) .*
0+016 <[^>]+> (1234|5678) .*

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@ -0,0 +1,13 @@
.text
.thumb
.syntax unified
.thumb_func
thumb2_ldr:
ldr r6, =0x12345678
ldr.n r1, =0x12345678
ldr.w r6, =0x12345678
ldr r9, =0x12345678
nop
ldr.w r5, =0x12345678
ldr r1, =0x12345678
.pool