2006-04-07 Paul Brook <paul@codesourcery.com>
gas/ * config/tc-arm.c (THUMB2_LOAD_BIT): Define. (move_or_literal_pool): Handle Thumb-2 instructions. (do_t_ldst): Call move_or_literal_pool for =N addressing modes. gas/testsuite/ * gas/arm/thumb2_pool.d: New test. * gas/arm/thumb2_pool.s: New test.
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@ -1,3 +1,9 @@
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2006-04-07 Paul Brook <paul@codesourcery.com>
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* config/tc-arm.c (THUMB2_LOAD_BIT): Define.
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(move_or_literal_pool): Handle Thumb-2 instructions.
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(do_t_ldst): Call move_or_literal_pool for =N addressing modes.
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2006-04-07 Alan Modra <amodra@bigpond.net.au>
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PR 2512.
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@ -560,6 +560,7 @@ struct asm_opcode
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#define THUMB_SIZE 2 /* Size of thumb instruction. */
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#define THUMB_PP_PC_LR 0x0100
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#define THUMB_LOAD_BIT 0x0800
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#define THUMB2_LOAD_BIT 0x00100000
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#define BAD_ARGS _("bad arguments to instruction")
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#define BAD_PC _("r15 not allowed here")
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@ -4443,7 +4444,14 @@ encode_arm_cp_address (int i, int wb_ok, int unind_ok, int reloc_override)
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static int
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move_or_literal_pool (int i, bfd_boolean thumb_p, bfd_boolean mode_3)
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{
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if ((inst.instruction & (thumb_p ? THUMB_LOAD_BIT : LOAD_BIT)) == 0)
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unsigned long tbit;
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if (thumb_p)
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tbit = (inst.instruction > 0xffff) ? THUMB2_LOAD_BIT : THUMB_LOAD_BIT;
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else
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tbit = LOAD_BIT;
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if ((inst.instruction & tbit) == 0)
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{
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inst.error = _("invalid pseudo operation");
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return 1;
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@ -4457,7 +4465,7 @@ move_or_literal_pool (int i, bfd_boolean thumb_p, bfd_boolean mode_3)
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{
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if (thumb_p)
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{
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if ((inst.reloc.exp.X_add_number & ~0xFF) == 0)
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if (!unified_syntax && (inst.reloc.exp.X_add_number & ~0xFF) == 0)
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{
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/* This can be done with a mov(1) instruction. */
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inst.instruction = T_OPCODE_MOV_I8 | (inst.operands[i].reg << 8);
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@ -5965,7 +5973,7 @@ encode_thumb32_addr_mode (int i, bfd_boolean is_t, bfd_boolean is_d)
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bfd_boolean is_pc = (inst.operands[i].reg == REG_PC);
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constraint (!inst.operands[i].isreg,
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_("Thumb does not support the ldr =N pseudo-operation"));
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_("Instruction does not support =N addresses"));
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inst.instruction |= inst.operands[i].reg << 16;
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if (inst.operands[i].immisreg)
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@ -6979,6 +6987,13 @@ do_t_ldst (void)
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opcode = inst.instruction;
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if (unified_syntax)
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{
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if (!inst.operands[1].isreg)
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{
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if (opcode <= 0xffff)
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inst.instruction = THUMB_OP32 (opcode);
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if (move_or_literal_pool (0, /*thumb_p=*/TRUE, /*mode_3=*/FALSE))
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return;
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}
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if (inst.operands[1].isreg
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&& !inst.operands[1].writeback
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&& !inst.operands[1].shifted && !inst.operands[1].postind
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@ -1,3 +1,8 @@
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2006-04-07 Paul Brook <paul@codesourcery.com>
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* gas/arm/thumb2_pool.d: New test.
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* gas/arm/thumb2_pool.s: New test.
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2006-04-05 Richard Sandiford <richard@codesourcery.com>
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* gas/sparc/vxworks-pic.s, gas/sparc/vxworks-pic.d: New test.
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@ -0,0 +1,15 @@
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# as: -march=armv6t2
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# objdump: -dr --prefix-addresses --show-raw-insn
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.*: +file format .*arm.*
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Disassembly of section .text:
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0+000 <[^>]+> 4e04 ldr r6, \[pc, #16\] \(00+14 <[^>]+>\)
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0+002 <[^>]+> 4904 ldr r1, \[pc, #16\] \(00+14 <[^>]+>\)
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0+004 <[^>]+> f8df 600c ldr\.w r6, \[pc, #12\] ; 00+14 <[^>]+>
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0+008 <[^>]+> f8df 9008 ldr\.w r9, \[pc, #8\] ; 00+14 <[^>]+>
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0+00c <[^>]+> bf00 nop
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0+00e <[^>]+> f8df 5004 ldr\.w r5, \[pc, #4\] ; 00+14 <[^>]+>
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0+012 <[^>]+> 4900 ldr r1, \[pc, #0\] \(00+14 <[^>]+>\)
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0+014 <[^>]+> (5678|1234) .*
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0+016 <[^>]+> (1234|5678) .*
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@ -0,0 +1,13 @@
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.text
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.thumb
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.syntax unified
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.thumb_func
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thumb2_ldr:
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ldr r6, =0x12345678
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ldr.n r1, =0x12345678
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ldr.w r6, =0x12345678
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ldr r9, =0x12345678
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nop
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ldr.w r5, =0x12345678
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ldr r1, =0x12345678
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.pool
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