* gdb.disasm/am33.s: New disassembler testfile for the am33.

* gdb.disasm/am33.exp: Run it.
This commit is contained in:
Jeff Law 1998-06-24 19:07:51 +00:00
parent 1c2a961d56
commit 54977a6833
5 changed files with 1334 additions and 0 deletions

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@ -49,4 +49,38 @@ Things-to-lose:
Do-last:
am33_files="ChangeLog"
if ( echo $* | grep keep\-am33 > /dev/null ) ; then
for i in $am33_files ; do
if test ! -d $i && (grep sanitize-am33 $i > /dev/null) ; then
if [ -n "${verbose}" ] ; then
echo Keeping am33 stuff in $i
fi
fi
done
else
for i in $am33_files ; do
if test ! -d $i && (grep sanitize-am33 $i > /dev/null) ; then
if [ -n "${verbose}" ] ; then
echo Removing traces of \"am33\" from $i...
fi
cp $i new
sed '/start\-sanitize\-am33/,/end-\sanitize\-am33/d' < $i > new
if [ -n "${safe}" -a ! -f .Recover/$i ] ; then
if [ -n "${verbose}" ] ; then
echo Caching $i in .Recover...
fi
mv $i .Recover
fi
mv new $i
fi
done
fi
for i in * ; do
if test ! -d $i && (grep sanitize $i > /dev/null) ; then
echo '***' Some mentions of Sanitize are still left in $i! 1>&2
fi
done
# eof

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@ -1,3 +1,10 @@
start-sanitize-am33
Wed Jun 24 13:03:15 1998 Jeffrey A Law (law@cygnus.com)
* gdb.disasm/am33.s: New disassembler testfile for the am33.
* gdb.disasm/am33.exp: Run it.
end-sanitize-am33
Tue Jun 23 11:45:01 1998 Michael Snyder <msnyder@cleaver.cygnus.com>
* gdb.base/funcargs.exp: simplify expect strings to ease pattern

View File

@ -15,6 +15,14 @@
Do-first:
am33_files="am33.s am33.exp"
if ( echo $* | grep keep\-am33 > /dev/null ) ; then
keep_these_too="${am33_files} ${keep_these_too}"
else
lose_these_too="${am33_files} ${lose_these_too}"
fi
# All files listed between the "Things-to-keep:" line and the
# "Do-last:" line will be kept. All other files will be removed.
# Directories listed in this section will have their own Sanitize

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@ -0,0 +1,780 @@
# Copyright (C) 1997 Free Software Foundation, Inc.
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; either version 2 of the License, or
# (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
# Please email any bugs, comments, and/or additions to this file to:
# bug-gdb@prep.ai.mit.edu
# This file was written by Jeff Law. (law@cygnus.com)
if $tracelevel then {
strace $tracelevel
}
if ![istarget "mn10300*-*-*"] {
verbose "Tests ignored for all but mn10300 based targets."
return
}
global exec_output
set prms_id 0
set bug_id 0
set testfile "am33"
set srcfile ${srcdir}/${subdir}/${testfile}.s
set binfile ${objdir}/${subdir}/${testfile}
if { [gdb_compile "${srcfile}" "${binfile}" executable ""] != "" } {
gdb_suppress_entire_file "Testcase compile failed, so all tests in this file will automatically fail."
}
proc call_tests { } {
global gdb_prompt
global hex
global decimal
send_gdb "x/8i call_tests\n"
gdb_expect {
-re "
.*call .*,.a2,a3,exreg0.,9.*
.*call .*,.a2,a3,exreg1.,9.*
.*call .*,.a2,a3,exother.,9.*
.*call .*,.d2,d3,a2,a3,other,exreg0,exreg1,exother.,9.*
.*call .*,.a2,a3,exreg0.,9.*
.*call .*,.a2,a3,exreg1.,9.*
.*call .*,.a2,a3,exother.,9.*
.*call .*,.d2,d3,a2,a3,other,exreg0,exreg1,exother.,9.*
.*$gdb_prompt $" { pass "call tests" }
-re "$gdb_prompt $" { fail "call tests" }
timeout { fail "(timeout) call tests" }
}
}
proc movm_tests { } {
global gdb_prompt
global hex
global decimal
send_gdb "x/16i movm_tests\n"
gdb_expect {
-re "
.*movm \\(sp\\),.a2,a3,exreg0.*
.*movm \\(sp\\),.a2,a3,exreg1.*
.*movm \\(sp\\),.a2,a3,exother.*
.*movm \\(sp\\),.d2,d3,a2,a3,other,exreg0,exreg1,exother.*
.*movm .a2,a3,exreg0.,\\(sp\\).*
.*movm .a2,a3,exreg1.,\\(sp\\).*
.*movm .a2,a3,exother.,\\(sp\\).*
.*movm .d2,d3,a2,a3,other,exreg0,exreg1,exother.,\\(sp\\).*
.*movm \\(usp\\),.a2,a3,exreg0.*
.*movm \\(usp\\),.a2,a3,exreg1.*
.*movm \\(usp\\),.a2,a3,exother.*
.*movm \\(usp\\),.d2,d3,a2,a3,other,exreg0,exreg1,exother.*
.*movm .a2,a3,exreg0.,\\(usp\\).*
.*movm .a2,a3,exreg1.,\\(usp\\).*
.*movm .a2,a3,exother.,\\(usp\\).*
.*movm .d2,d3,a2,a3,other,exreg0,exreg1,exother.,\\(usp\\).*
.*$gdb_prompt $" { pass "movm tests" }
-re "$gdb_prompt $" { fail "movm tests" }
timeout { fail "(timeout) movm tests" }
}
}
proc misc_tests { } {
global gdb_prompt
global hex
global decimal
send_gdb "x/11i misc_tests\n"
gdb_expect {
-re "
.*syscall 4.*
.*mcst9 d0.*
.*mcst48 d1.*
.*getchx d0.*
.*getclx d1.*
.*clr r9.*
.*sat16 r9,r8.*
.*mcste r7,r6.*
.*swap r5,r4.*
.*swaph r3,r2.*
.*swhw r1,r0.*
.*$gdb_prompt $" { pass "misc tests" }
-re "$gdb_prompt $" { fail "misc tests" }
timeout { fail "(timeout) misc tests" }
}
}
proc mov_tests { } {
global gdb_prompt
global hex
global decimal
send_gdb "x/45i mov_tests\n"
gdb_expect {
-re "
.*mov r0,r1.*
.*mov xr0,r1.*
.*mov r1,xr2.*
.*mov \\(r1\\),r2.*
.*mov r3,\\(r4\\).*
.*mov \\(sp\\),r5.*
.*mov r6,\\(sp\\).*
.*mov 16,r1.*
.*mov 16,xr1.*
.*mov \\(16,r1\\),r2.*
.*mov r2,\\(16,r1\\).*
.*mov \\(16,sp\\),r2.*
.*mov r2,\\(16,sp\\).*
.*mov 2096895,r2.*
.*mov 2096895,xr2.*
.*mov \\(2096895,r1\\),r2.*
.*mov r2,\\(2096895,r1\\).*
.*mov \\(2096895,sp\\),r2.*
.*mov r2,\\(2096895,sp\\).*
.*mov \\(0x1ffeff\\),r2.*
.*mov r2,\\(0x1ffeff\\).*
.*mov 2147417596,r2.*
.*mov 2147417596,xr2.*
.*mov \\(2147417596,r1\\),r2.*
.*mov r2,\\(2147417596,r1\\).*
.*mov \\(2147417596,sp\\),r2.*
.*mov r2,\\(2147417596,sp\\).*
.*mov \\(0x7ffefdfc\\),r2.*
.*mov r2,\\(0x7ffefdfc\\).*
.*movu 16,r1.*
.*movu 2096895,r2.*
.*movu 2147417596,r2.*
.*mov usp,a0.*
.*mov ssp,a1.*
.*mov msp,a2.*
.*mov pc,a3.*
.*mov a0,usp.*
.*mov a1,ssp.*
.*mov a2,msp.*
.*mov epsw,d0.*
.*mov d1,epsw.*
.*mov a0,r1.*
.*mov d2,r3.*
.*mov r5,a1.*
.*mov r7,d3.*
.*$gdb_prompt $" { pass "mov tests" }
-re "$gdb_prompt $" { fail "mov tests" }
timeout { fail "(timeout) mov tests" }
}
}
proc ext_tests { } {
global gdb_prompt
global hex
global decimal
send_gdb "x/5i ext_tests\n"
gdb_expect {
-re "
.*ext r2.*
.*extb r3,r4.*
.*extbu r4,r5.*
.*exth r6,r7.*
.*exthu r7,r8.*
.*$gdb_prompt $" { pass "ext tests" }
-re "$gdb_prompt $" { fail "ext tests" }
timeout { fail "(timeout) ext tests" }
}
}
proc add_tests { } {
global gdb_prompt
global hex
global decimal
send_gdb "x/11i add_tests\n"
gdb_expect {
-re "
.*add r10,r11.*
.*add 16,r1.*
.*add 2096895,r2.*
.*add 2147417596,r2.*
.*add r1,r2,r3.*
.*addc r12,r13.*
.*addc 16,r1.*
.*addc 2096895,r2.*
.*addc 2147417596,r2.*
.*inc r13.*
.*inc4 r12.*
.*$gdb_prompt $" { pass "add tests" }
-re "$gdb_prompt $" { fail "add tests" }
timeout { fail "(timeout) add tests" }
}
}
proc sub_tests { } {
global gdb_prompt
global hex
global decimal
send_gdb "x/8i sub_tests\n"
gdb_expect {
-re "
.*sub r14,r15.*
.*sub 16,r1.*
.*sub 2096895,r2.*
.*sub 2147417596,r2.*
.*subc r15,r14.*
.*subc 16,r1.*
.*subc 2096895,r2.*
.*subc 2147417596,r2.*
.*$gdb_prompt $" { pass "sub tests" }
-re "$gdb_prompt $" { fail "sub tests" }
timeout { fail "(timeout) sub tests" }
}
}
proc cmp_tests { } {
global gdb_prompt
global hex
global decimal
send_gdb "x/4i cmp_tests\n"
gdb_expect {
-re "
.*cmp r11,r10.*
.*cmp 16,r1.*
.*cmp 2096895,r2.*
.*cmp 2147417596,r2.*
.*$gdb_prompt $" { pass "cmp tests" }
-re "$gdb_prompt $" { fail "cmp tests" }
timeout { fail "(timeout) cmp tests" }
}
}
proc logical_tests { } {
global gdb_prompt
global hex
global decimal
send_gdb "x/15i logical_tests\n"
gdb_expect {
-re "
.*and r0,r1.*
.*or r2,r3.*
.*xor r4,r5.*
.*not r6.*
.*and 16,r1.*
.*or 16,r1.*
.*xor 16,r1.*
.*and 2096895,r2.*
.*or 2096895,r2.*
.*xor 2096895,r2.*
.*and 2147417596,r2.*
.*or 2147417596,r2.*
.*xor 2147417596,r2.*
.*and 131072,epsw.*
.*or 65535,epsw.*
.*$gdb_prompt $" { pass "logical tests" }
-re "$gdb_prompt $" { fail "logical tests" }
timeout { fail "(timeout) logical tests" }
}
}
proc shift_tests { } {
global gdb_prompt
global hex
global decimal
send_gdb "x/15i shift_tests\n"
gdb_expect {
-re "
.*asr r7,r8.*
.*lsr r9,r10.*
.*asl r11,r12.*
.*asl2 r13.*
.*ror r14.*
.*rol r15.*
.*asr 16,r1.*
.*lsr 16,r1.*
.*asl 16,r1.*
.*asr 2096895,r2.*
.*lsr 2096895,r2.*
.*asl 2096895,r2.*
.*asr 2147417596,r2.*
.*lsr 2147417596,r2.*
.*asl 2147417596,r2.*
.*$gdb_prompt $" { pass "shift tests" }
-re "$gdb_prompt $" { fail "shift tests" }
timeout { fail "(timeout) shift tests" }
}
}
proc muldiv_tests { } {
global gdb_prompt
global hex
global decimal
send_gdb "x/14i muldiv_tests\n"
gdb_expect {
-re "
.*mul r1,r2.*
.*mulu r3,r4.*
.*mul 16,r1.*
.*mulu 16,r1.*
.*mul 2096895,r2.*
.*mulu 2096895,r2.*
.*mul 2147417596,r2.*
.*mulu 2147417596,r2.*
.*div r5,r6.*
.*divu r7,r8.*
.*dmulh r13,r12.*
.*dmulhu r11,r10.*
.*dmulh 2147417596,r2.*
.*dmulhu 2147417596,r2.*
.*$gdb_prompt $" { pass "muldiv tests" }
-re "$gdb_prompt $" { fail "muldiv tests" }
timeout { fail "(timeout) muldiv tests" }
}
}
proc movbu_tests { } {
global gdb_prompt
global hex
global decimal
send_gdb "x/20i movbu_tests\n"
gdb_expect {
-re "
.*movbu \\(r5\\),r6.*
.*movbu r7,\\(r8\\).*
.*movbu \\(sp\\),r7.*
.*movbu r8,\\(sp\\).*
.*movbu \\(16,r1\\),r2.*
.*movbu r2,\\(16,r1\\).*
.*movbu \\(16,sp\\),r2.*
.*movbu r2,\\(16,sp\\).*
.*movbu \\(2096895,r1\\),r2.*
.*movbu r2,\\(2096895,r1\\).*
.*movbu \\(2096895,sp\\),r2.*
.*movbu r2,\\(2096895,sp\\).*
.*movbu \\(0x1ffeff\\),r2.*
.*movbu r2,\\(0x1ffeff\\).*
.*movbu \\(2147417596,r1\\),r2.*
.*movbu r2,\\(2147417596,r1\\).*
.*movbu \\(2147417596,sp\\),r2.*
.*movbu r2,\\(2147417596,sp\\).*
.*movbu \\(0x7ffefdfc\\),r2.*
.*movbu r2,\\(0x7ffefdfc\\).*
.*$gdb_prompt $" { pass "movbu tests" }
-re "$gdb_prompt $" { fail "movbu tests" }
timeout { fail "(timeout) movbu tests" }
}
}
proc movhu_tests { } {
global gdb_prompt
global hex
global decimal
send_gdb "x/20i movhu_tests\n"
gdb_expect {
-re "
.*movhu \\(r9\\),r10.*
.*movhu r11,\\(r12\\).*
.*movhu \\(sp\\),r9.*
.*movhu r10,\\(sp\\).*
.*movhu \\(16,r1\\),r2.*
.*movhu r2,\\(16,r1\\).*
.*movhu \\(16,sp\\),r2.*
.*movhu r2,\\(16,sp\\).*
.*movhu \\(2096895,r1\\),r2.*
.*movhu r2,\\(2096895,r1\\).*
.*movhu \\(2096895,sp\\),r2.*
.*movhu r2,\\(2096895,sp\\).*
.*movhu \\(0x1ffeff\\),r2.*
.*movhu r2,\\(0x1ffeff\\).*
.*movhu \\(2147417596,r1\\),r2.*
.*movhu r2,\\(2147417596,r1\\).*
.*movhu \\(2147417596,sp\\),r2.*
.*movhu r2,\\(2147417596,sp\\).*
.*movhu \\(0x7ffefdfc\\),r2.*
.*movhu r2,\\(0x7ffefdfc\\).*
.*$gdb_prompt $" { pass "movhu tests" }
-re "$gdb_prompt $" { fail "movhu tests" }
timeout { fail "(timeout) movhu tests" }
}
}
proc mac_tests { } {
global gdb_prompt
global hex
global decimal
send_gdb "x/28i mac_tests\n"
gdb_expect {
-re "
.*mac r1,r2.*
.*macu r3,r4.*
.*macb r5,r6.*
.*macbu r7,r8.*
.*mach r9,r10.*
.*machu r11,r12.*
.*dmach r13,r14.*
.*dmachu r15,r14.*
.*mac 16,r1.*
.*macu 16,r1.*
.*macb 16,r1.*
.*macbu 16,r1.*
.*mach 16,r1.*
.*machu 16,r1.*
.*mac 2096895,r2.*
.*macu 2096895,r2.*
.*macb 2096895,r2.*
.*macbu 2096895,r2.*
.*mach 2096895,r2.*
.*machu 2096895,r2.*
.*mac 2147417596,r2.*
.*macu 2147417596,r2.*
.*macb 2147417596,r2.*
.*macbu 2147417596,r2.*
.*mach 2147417596,r2.*
.*machu 2147417596,r2.*
.*dmach 2147417596,r2.*
.*dmachu 2147417596,r2.*
.*$gdb_prompt $" { pass "mac tests" }
-re "$gdb_prompt $" { fail "mac tests" }
timeout { fail "(timeout) mac tests" }
}
}
proc bit_tests { } {
global gdb_prompt
global hex
global decimal
send_gdb "x/4i bit_tests\n"
gdb_expect {
-re "
.*bsch r1,r2.*
.*btst 16,r1.*
.*btst 2096895,r2.*
.*btst 2147417596,r2.*
.*$gdb_prompt $" { pass "bit tests" }
-re "$gdb_prompt $" { fail "bit tests" }
timeout { fail "(timeout) bit tests" }
}
}
proc dsp_add_tests { } {
global gdb_prompt
global hex
global decimal
send_gdb "x/28i dsp_add_tests\n"
gdb_expect {
-re "
.*add_add r4,r1,r2,r3.*
.*add_add r4,r1,2,r3.*
.*add_sub r4,r1,r2,r3.*
.*add_sub r4,r1,2,r3.*
.*add_cmp r4,r1,r2,r3.*
.*add_cmp r4,r1,2,r3.*
.*add_mov r4,r1,r2,r3.*
.*add_mov r4,r1,2,r3.*
.*add_asr r4,r1,r2,r3.*
.*add_asr r4,r1,2,r3.*
.*add_lsr r4,r1,r2,r3.*
.*add_lsr r4,r1,2,r3.*
.*add_asl r4,r1,r2,r3.*
.*add_asl r4,r1,2,r3.*
.*add_add 4,r1,r2,r3.*
.*add_add 4,r1,2,r3.*
.*add_sub 4,r1,r2,r3.*
.*add_sub 4,r1,2,r3.*
.*add_cmp 4,r1,r2,r3.*
.*add_cmp 4,r1,2,r3.*
.*add_mov 4,r1,r2,r3.*
.*add_mov 4,r1,2,r3.*
.*add_asr 4,r1,r2,r3.*
.*add_asr 4,r1,2,r3.*
.*add_lsr 4,r1,r2,r3.*
.*add_lsr 4,r1,2,r3.*
.*add_asl 4,r1,r2,r3.*
.*add_asl 4,r1,2,r3.*
.*$gdb_prompt $" { pass "dsp_add tests" }
-re "$gdb_prompt $" { fail "dsp_add tests" }
timeout { fail "(timeout) dsp_add tests" }
}
}
proc dsp_cmp_tests { } {
global gdb_prompt
global hex
global decimal
send_gdb "x/24i dsp_cmp_tests\n"
gdb_expect {
-re "
.*cmp_add r4,r1,r2,r3.*
.*cmp_add r4,r1,2,r3.*
.*cmp_sub r4,r1,r2,r3.*
.*cmp_sub r4,r1,2,r3.*
.*cmp_mov r4,r1,r2,r3.*
.*cmp_mov r4,r1,2,r3.*
.*cmp_asr r4,r1,r2,r3.*
.*cmp_asr r4,r1,2,r3.*
.*cmp_lsr r4,r1,r2,r3.*
.*cmp_lsr r4,r1,2,r3.*
.*cmp_asl r4,r1,r2,r3.*
.*cmp_asl r4,r1,2,r3.*
.*cmp_add 4,r1,r2,r3.*
.*cmp_add 4,r1,2,r3.*
.*cmp_sub 4,r1,r2,r3.*
.*cmp_sub 4,r1,2,r3.*
.*cmp_mov 4,r1,r2,r3.*
.*cmp_mov 4,r1,2,r3.*
.*cmp_asr 4,r1,r2,r3.*
.*cmp_asr 4,r1,2,r3.*
.*cmp_lsr 4,r1,r2,r3.*
.*cmp_lsr 4,r1,2,r3.*
.*cmp_asl 4,r1,r2,r3.*
.*cmp_asl 4,r1,2,r3.*
.*$gdb_prompt $" { pass "dsp_cmp tests" }
-re "$gdb_prompt $" { fail "dsp_cmp tests" }
timeout { fail "(timeout) dsp_cmp tests" }
}
}
proc dsp_sub_tests { } {
global gdb_prompt
global hex
global decimal
send_gdb "x/28i dsp_sub_tests\n"
gdb_expect {
-re "
.*sub_add r4,r1,r2,r3.*
.*sub_add r4,r1,2,r3.*
.*sub_sub r4,r1,r2,r3.*
.*sub_sub r4,r1,2,r3.*
.*sub_cmp r4,r1,r2,r3.*
.*sub_cmp r4,r1,2,r3.*
.*sub_mov r4,r1,r2,r3.*
.*sub_mov r4,r1,2,r3.*
.*sub_asr r4,r1,r2,r3.*
.*sub_asr r4,r1,2,r3.*
.*sub_lsr r4,r1,r2,r3.*
.*sub_lsr r4,r1,2,r3.*
.*sub_asl r4,r1,r2,r3.*
.*sub_asl r4,r1,2,r3.*
.*sub_add 4,r1,r2,r3.*
.*sub_add 4,r1,2,r3.*
.*sub_sub 4,r1,r2,r3.*
.*sub_sub 4,r1,2,r3.*
.*sub_cmp 4,r1,r2,r3.*
.*sub_cmp 4,r1,2,r3.*
.*sub_mov 4,r1,r2,r3.*
.*sub_mov 4,r1,2,r3.*
.*sub_asr 4,r1,r2,r3.*
.*sub_asr 4,r1,2,r3.*
.*sub_lsr 4,r1,r2,r3.*
.*sub_lsr 4,r1,2,r3.*
.*sub_asl 4,r1,r2,r3.*
.*sub_asl 4,r1,2,r3.*
.*$gdb_prompt $" { pass "dsp_sub tests" }
-re "$gdb_prompt $" { fail "dsp_sub tests" }
timeout { fail "(timeout) dsp_sub tests" }
}
}
proc dsp_mov_tests { } {
global gdb_prompt
global hex
global decimal
send_gdb "x/28i dsp_mov_tests\n"
gdb_expect {
-re "
.*mov_add r4,r1,r2,r3.*
.*mov_add r4,r1,2,r3.*
.*mov_sub r4,r1,r2,r3.*
.*mov_sub r4,r1,2,r3.*
.*mov_cmp r4,r1,r2,r3.*
.*mov_cmp r4,r1,2,r3.*
.*mov_mov r4,r1,r2,r3.*
.*mov_mov r4,r1,2,r3.*
.*mov_asr r4,r1,r2,r3.*
.*mov_asr r4,r1,2,r3.*
.*mov_lsr r4,r1,r2,r3.*
.*mov_lsr r4,r1,2,r3.*
.*mov_asl r4,r1,r2,r3.*
.*mov_asl r4,r1,2,r3.*
.*mov_add 4,r1,r2,r3.*
.*mov_add 4,r1,2,r3.*
.*mov_sub 4,r1,r2,r3.*
.*mov_sub 4,r1,2,r3.*
.*mov_cmp 4,r1,r2,r3.*
.*mov_cmp 4,r1,2,r3.*
.*mov_mov 4,r1,r2,r3.*
.*mov_mov 4,r1,2,r3.*
.*mov_asr 4,r1,r2,r3.*
.*mov_asr 4,r1,2,r3.*
.*mov_lsr 4,r1,r2,r3.*
.*mov_lsr 4,r1,2,r3.*
.*mov_asl 4,r1,r2,r3.*
.*mov_asl 4,r1,2,r3.*
.*$gdb_prompt $" { pass "dsp_mov tests" }
-re "$gdb_prompt $" { fail "dsp_mov tests" }
timeout { fail "(timeout) dsp_mov tests" }
}
}
proc dsp_logical_tests { } {
global gdb_prompt
global hex
global decimal
send_gdb "x/42i dsp_logical_tests\n"
gdb_expect {
-re "
.*and_add r4,r1,r2,r3.*
.*and_add r4,r1,2,r3.*
.*and_sub r4,r1,r2,r3.*
.*and_sub r4,r1,2,r3.*
.*and_cmp r4,r1,r2,r3.*
.*and_cmp r4,r1,2,r3.*
.*and_mov r4,r1,r2,r3.*
.*and_mov r4,r1,2,r3.*
.*and_asr r4,r1,r2,r3.*
.*and_asr r4,r1,2,r3.*
.*and_lsr r4,r1,r2,r3.*
.*and_lsr r4,r1,2,r3.*
.*and_asl r4,r1,r2,r3.*
.*and_asl r4,r1,2,r3.*
.*xor_add r4,r1,r2,r3.*
.*xor_add r4,r1,2,r3.*
.*xor_sub r4,r1,r2,r3.*
.*xor_sub r4,r1,2,r3.*
.*xor_cmp r4,r1,r2,r3.*
.*xor_cmp r4,r1,2,r3.*
.*xor_mov r4,r1,r2,r3.*
.*xor_mov r4,r1,2,r3.*
.*xor_asr r4,r1,r2,r3.*
.*xor_asr r4,r1,2,r3.*
.*xor_lsr r4,r1,r2,r3.*
.*xor_lsr r4,r1,2,r3.*
.*xor_asl r4,r1,r2,r3.*
.*xor_asl r4,r1,2,r3.*
.*or_add r4,r1,r2,r3.*
.*or_add r4,r1,2,r3.*
.*or_sub r4,r1,r2,r3.*
.*or_sub r4,r1,2,r3.*
.*or_cmp r4,r1,r2,r3.*
.*or_cmp r4,r1,2,r3.*
.*or_mov r4,r1,r2,r3.*
.*or_mov r4,r1,2,r3.*
.*or_asr r4,r1,r2,r3.*
.*or_asr r4,r1,2,r3.*
.*or_lsr r4,r1,r2,r3.*
.*or_lsr r4,r1,2,r3.*
.*or_asl r4,r1,r2,r3.*
.*or_asl r4,r1,2,r3.*
.*$gdb_prompt $" { pass "dsp_logical tests" }
-re "$gdb_prompt $" { fail "dsp_logical tests" }
timeout { fail "(timeout) dsp_logical tests" }
}
}
proc dsp_misc_tests { } {
global gdb_prompt
global hex
global decimal
send_gdb "x/42i dsp_misc_tests\n"
gdb_expect {
-re "
.*dmach_add r4,r1,r2,r3.*
.*dmach_add r4,r1,2,r3.*
.*dmach_sub r4,r1,r2,r3.*
.*dmach_sub r4,r1,2,r3.*
.*dmach_cmp r4,r1,r2,r3.*
.*dmach_cmp r4,r1,2,r3.*
.*dmach_mov r4,r1,r2,r3.*
.*dmach_mov r4,r1,2,r3.*
.*dmach_asr r4,r1,r2,r3.*
.*dmach_asr r4,r1,2,r3.*
.*dmach_lsr r4,r1,r2,r3.*
.*dmach_lsr r4,r1,2,r3.*
.*dmach_asl r4,r1,r2,r3.*
.*dmach_asl r4,r1,2,r3.*
.*swhw_add r4,r1,r2,r3.*
.*swhw_add r4,r1,2,r3.*
.*swhw_sub r4,r1,r2,r3.*
.*swhw_sub r4,r1,2,r3.*
.*swhw_cmp r4,r1,r2,r3.*
.*swhw_cmp r4,r1,2,r3.*
.*swhw_mov r4,r1,r2,r3.*
.*swhw_mov r4,r1,2,r3.*
.*swhw_asr r4,r1,r2,r3.*
.*swhw_asr r4,r1,2,r3.*
.*swhw_lsr r4,r1,r2,r3.*
.*swhw_lsr r4,r1,2,r3.*
.*swhw_asl r4,r1,r2,r3.*
.*swhw_asl r4,r1,2,r3.*
.*sat16_add r4,r1,r2,r3.*
.*sat16_add r4,r1,2,r3.*
.*sat16_sub r4,r1,r2,r3.*
.*sat16_sub r4,r1,2,r3.*
.*sat16_cmp r4,r1,r2,r3.*
.*sat16_cmp r4,r1,2,r3.*
.*sat16_mov r4,r1,r2,r3.*
.*sat16_mov r4,r1,2,r3.*
.*sat16_asr r4,r1,r2,r3.*
.*sat16_asr r4,r1,2,r3.*
.*sat16_lsr r4,r1,r2,r3.*
.*sat16_lsr r4,r1,2,r3.*
.*sat16_asl r4,r1,r2,r3.*
.*sat16_asl r4,r1,2,r3.*
.*$gdb_prompt $" { pass "dsp_misc tests" }
-re "$gdb_prompt $" { fail "dsp_misc tests" }
timeout { fail "(timeout) dsp_misc tests" }
}
}
# Start with a fresh gdb.
gdb_exit
gdb_start
gdb_reinitialize_dir $srcdir/$subdir
gdb_load $binfile
call_tests
movm_tests
misc_tests
mov_tests
ext_tests
add_tests
sub_tests
cmp_tests
logical_tests
shift_tests
muldiv_tests
movbu_tests
movhu_tests
mac_tests
bit_tests
dsp_add_tests
dsp_cmp_tests
dsp_sub_tests
dsp_mov_tests
dsp_logical_tests

View File

@ -0,0 +1,505 @@
.globl _main
.globl call_tests
.globl movm_tests
.globl misc_tests
.globl mov_tests
.globl ext_tests
.globl add_tests
.globl sub_tests
.globl cmp_tests
.globl logical_tests
.globl shift_tests
.globl muldiv_tests
.globl movbu_tests
.globl movhu_tests
.globl mac_tests
.globl bit_tests
.globl dsp_add_tests
.globl dsp_cmp_tests
.globl dsp_sub_tests
.globl dsp_mov_tests
.globl dsp_logical_tests
.globl dsp_misc_tests
.text
_main:
call_tests:
call 256,[a2,a3,exreg0],9
call 256,[a2,a3,exreg1],9
call 256,[a2,a3,exother],9
call 256,[a2,a3,all],9
call 131071,[a2,a3,exreg0],9
call 131071,[a2,a3,exreg1],9
call 131071,[a2,a3,exother],9
call 131071,[a2,a3,all],9
movm_tests:
movm (sp),[a2,a3,exreg0]
movm (sp),[a2,a3,exreg1]
movm (sp),[a2,a3,exother]
movm (sp),[a2,a3,all]
movm [a2,a3,exreg0],(sp)
movm [a2,a3,exreg1],(sp)
movm [a2,a3,exother],(sp)
movm [a2,a3,all],(sp)
movm (usp),[a2,a3,exreg0]
movm (usp),[a2,a3,exreg1]
movm (usp),[a2,a3,exother]
movm (usp),[a2,a3,all]
movm [a2,a3,exreg0],(usp)
movm [a2,a3,exreg1],(usp)
movm [a2,a3,exother],(usp)
movm [a2,a3,all],(usp)
misc_tests:
syscall 0x4
mcst9 d0
mcst48 d1
getchx d0
getclx d1
clr r9
sat16 r9,r8
mcste r7,r6
swap r5,r4
swaph r3,r2
swhw r1,r0
mov_tests:
mov r0,r1
mov xr0, r1
mov r1, xr2
mov (r1),r2
mov r3,(r4)
mov (sp),r5
mov r6,(sp)
mov 16,r1
mov 16,xr1
mov (16,r1),r2
mov r2,(16,r1)
mov (16,sp),r2
mov r2,(16,sp)
mov 0x1ffeff,r2
mov 0x1ffeff,xr2
mov (0x1ffeff,r1),r2
mov r2,(0x1ffeff,r1)
mov (0x1ffeff,sp),r2
mov r2,(0x1ffeff,sp)
mov (0x1ffeff),r2
mov r2,(0x1ffeff)
mov 0x7ffefdfc,r2
mov 0x7ffefdfc,xr2
mov (0x7ffefdfc,r1),r2
mov r2,(0x7ffefdfc,r1)
mov (0x7ffefdfc,sp),r2
mov r2,(0x7ffefdfc,sp)
mov (0x7ffefdfc),r2
mov r2,(0x7ffefdfc)
movu 16,r1
movu 0x1ffeff,r2
movu 0x7ffefdfc,r2
mov usp,a0
mov ssp,a1
mov msp,a2
mov pc,a3
mov a0,usp
mov a1,ssp
mov a2,msp
mov epsw,d0
mov d1,epsw
mov a0,r1
mov d2,r3
mov r5,a1
mov r7,d3
ext_tests:
ext r2
extb r3,r4
extbu r4,r5
exth r6,r7
exthu r7,r8
add_tests:
add r10,r11
add 16,r1
add 0x1ffeff,r2
add 0x7ffefdfc,r2
add r1,r2,r3
addc r12,r13
addc 16,r1
addc 0x1ffeff,r2
addc 0x7ffefdfc,r2
inc r13
inc4 r12
sub_tests:
sub r14,r15
sub 16,r1
sub 0x1ffeff,r2
sub 0x7ffefdfc,r2
subc r15,r14
subc 16,r1
subc 0x1ffeff,r2
subc 0x7ffefdfc,r2
cmp_tests:
cmp r11,r10
cmp 16,r1
cmp 0x1ffeff,r2
cmp 0x7ffefdfc,r2
logical_tests:
and r0,r1
or r2,r3
xor r4,r5
not r6
and 16,r1
or 16,r1
xor 16,r1
and 0x1ffeff,r2
or 0x1ffeff,r2
xor 0x1ffeff,r2
and 0x7ffefdfc,r2
or 0x7ffefdfc,r2
xor 0x7ffefdfc,r2
and 131072,epsw
or 65535,epsw
shift_tests:
asr r7,r8
lsr r9,r10
asl r11,r12
asl2 r13
ror r14
rol r15
asr 16,r1
lsr 16,r1
asl 16,r1
asr 0x1ffeff,r2
lsr 0x1ffeff,r2
asl 0x1ffeff,r2
asr 0x7ffefdfc,r2
lsr 0x7ffefdfc,r2
asl 0x7ffefdfc,r2
muldiv_tests:
mul r1,r2
mulu r3,r4
mul 16,r1
mulu 16,r1
mul 0x1ffeff,r2
mulu 0x1ffeff,r2
mul 0x7ffefdfc,r2
mulu 0x7ffefdfc,r2
div r5,r6
divu r7,r8
dmulh r13,r12
dmulhu r11,r10
dmulh 0x7ffefdfc,r2
dmulhu 0x7ffefdfc,r2
movbu_tests:
movbu (r5),r6
movbu r7,(r8)
movbu (sp),r7
movbu r8,(sp)
movbu (16,r1),r2
movbu r2,(16,r1)
movbu (16,sp),r2
movbu r2,(16,sp)
movbu (0x1ffeff,r1),r2
movbu r2,(0x1ffeff,r1)
movbu (0x1ffeff,sp),r2
movbu r2,(0x1ffeff,sp)
movbu (0x1ffeff),r2
movbu r2,(0x1ffeff)
movbu (0x7ffefdfc,r1),r2
movbu r2,(0x7ffefdfc,r1)
movbu (0x7ffefdfc,sp),r2
movbu r2,(0x7ffefdfc,sp)
movbu (0x7ffefdfc),r2
movbu r2,(0x7ffefdfc)
movhu_tests:
movhu (r9),r10
movhu r11,(r12)
movhu (sp),r9
movhu r10,(sp)
movhu (16,r1),r2
movhu r2,(16,r1)
movhu (16,sp),r2
movhu r2,(16,sp)
movhu (0x1ffeff,r1),r2
movhu r2,(0x1ffeff,r1)
movhu (0x1ffeff,sp),r2
movhu r2,(0x1ffeff,sp)
movhu (0x1ffeff),r2
movhu r2,(0x1ffeff)
movhu (0x7ffefdfc,r1),r2
movhu r2,(0x7ffefdfc,r1)
movhu (0x7ffefdfc,sp),r2
movhu r2,(0x7ffefdfc,sp)
movhu (0x7ffefdfc),r2
movhu r2,(0x7ffefdfc)
mac_tests:
mac r1,r2
macu r3,r4
macb r5,r6
macbu r7,r8
mach r9,r10
machu r11,r12
dmach r13,r14
dmachu r15,r14
mac 16,r1
macu 16,r1
macb 16,r1
macbu 16,r1
mach 16,r1
machu 16,r1
mac 0x1ffeff,r2
macu 0x1ffeff,r2
macb 0x1ffeff,r2
macbu 0x1ffeff,r2
mach 0x1ffeff,r2
machu 0x1ffeff,r2
mac 0x7ffefdfc,r2
macu 0x7ffefdfc,r2
macb 0x7ffefdfc,r2
macbu 0x7ffefdfc,r2
mach 0x7ffefdfc,r2
machu 0x7ffefdfc,r2
dmach 0x7ffefdfc,r2
dmachu 0x7ffefdfc,r2
bit_tests:
bsch r1,r2
btst 16,r1
btst 0x1ffeff,r2
btst 0x7ffefdfc,r2
dsp_add_tests:
add_add r4,r1,r2,r3
add_add r4,r1,2,r3
add_sub r4,r1,r2,r3
add_sub r4,r1,2,r3
add_cmp r4,r1,r2,r3
add_cmp r4,r1,2,r3
add_mov r4,r1,r2,r3
add_mov r4,r1,2,r3
add_asr r4,r1,r2,r3
add_asr r4,r1,2,r3
add_lsr r4,r1,r2,r3
add_lsr r4,r1,2,r3
add_asl r4,r1,r2,r3
add_asl r4,r1,2,r3
add_add 4,r1,r2,r3
add_add 4,r1,2,r3
add_sub 4,r1,r2,r3
add_sub 4,r1,2,r3
add_cmp 4,r1,r2,r3
add_cmp 4,r1,2,r3
add_mov 4,r1,r2,r3
add_mov 4,r1,2,r3
add_asr 4,r1,r2,r3
add_asr 4,r1,2,r3
add_lsr 4,r1,r2,r3
add_lsr 4,r1,2,r3
add_asl 4,r1,r2,r3
add_asl 4,r1,2,r3
dsp_cmp_tests:
cmp_add r4,r1,r2,r3
cmp_add r4,r1,2,r3
cmp_sub r4,r1,r2,r3
cmp_sub r4,r1,2,r3
cmp_mov r4,r1,r2,r3
cmp_mov r4,r1,2,r3
cmp_asr r4,r1,r2,r3
cmp_asr r4,r1,2,r3
cmp_lsr r4,r1,r2,r3
cmp_lsr r4,r1,2,r3
cmp_asl r4,r1,r2,r3
cmp_asl r4,r1,2,r3
cmp_add 4,r1,r2,r3
cmp_add 4,r1,2,r3
cmp_sub 4,r1,r2,r3
cmp_sub 4,r1,2,r3
cmp_mov 4,r1,r2,r3
cmp_mov 4,r1,2,r3
cmp_asr 4,r1,r2,r3
cmp_asr 4,r1,2,r3
cmp_lsr 4,r1,r2,r3
cmp_lsr 4,r1,2,r3
cmp_asl 4,r1,r2,r3
cmp_asl 4,r1,2,r3
dsp_sub_tests:
sub_add r4,r1,r2,r3
sub_add r4,r1,2,r3
sub_sub r4,r1,r2,r3
sub_sub r4,r1,2,r3
sub_cmp r4,r1,r2,r3
sub_cmp r4,r1,2,r3
sub_mov r4,r1,r2,r3
sub_mov r4,r1,2,r3
sub_asr r4,r1,r2,r3
sub_asr r4,r1,2,r3
sub_lsr r4,r1,r2,r3
sub_lsr r4,r1,2,r3
sub_asl r4,r1,r2,r3
sub_asl r4,r1,2,r3
sub_add 4,r1,r2,r3
sub_add 4,r1,2,r3
sub_sub 4,r1,r2,r3
sub_sub 4,r1,2,r3
sub_cmp 4,r1,r2,r3
sub_cmp 4,r1,2,r3
sub_mov 4,r1,r2,r3
sub_mov 4,r1,2,r3
sub_asr 4,r1,r2,r3
sub_asr 4,r1,2,r3
sub_lsr 4,r1,r2,r3
sub_lsr 4,r1,2,r3
sub_asl 4,r1,r2,r3
sub_asl 4,r1,2,r3
dsp_mov_tests:
mov_add r4,r1,r2,r3
mov_add r4,r1,2,r3
mov_sub r4,r1,r2,r3
mov_sub r4,r1,2,r3
mov_cmp r4,r1,r2,r3
mov_cmp r4,r1,2,r3
mov_mov r4,r1,r2,r3
mov_mov r4,r1,2,r3
mov_asr r4,r1,r2,r3
mov_asr r4,r1,2,r3
mov_lsr r4,r1,r2,r3
mov_lsr r4,r1,2,r3
mov_asl r4,r1,r2,r3
mov_asl r4,r1,2,r3
mov_add 4,r1,r2,r3
mov_add 4,r1,2,r3
mov_sub 4,r1,r2,r3
mov_sub 4,r1,2,r3
mov_cmp 4,r1,r2,r3
mov_cmp 4,r1,2,r3
mov_mov 4,r1,r2,r3
mov_mov 4,r1,2,r3
mov_asr 4,r1,r2,r3
mov_asr 4,r1,2,r3
mov_lsr 4,r1,r2,r3
mov_lsr 4,r1,2,r3
mov_asl 4,r1,r2,r3
mov_asl 4,r1,2,r3
dsp_logical_tests:
and_add r4,r1,r2,r3
and_add r4,r1,2,r3
and_sub r4,r1,r2,r3
and_sub r4,r1,2,r3
and_cmp r4,r1,r2,r3
and_cmp r4,r1,2,r3
and_mov r4,r1,r2,r3
and_mov r4,r1,2,r3
and_asr r4,r1,r2,r3
and_asr r4,r1,2,r3
and_lsr r4,r1,r2,r3
and_lsr r4,r1,2,r3
and_asl r4,r1,r2,r3
and_asl r4,r1,2,r3
xor_add r4,r1,r2,r3
xor_add r4,r1,2,r3
xor_sub r4,r1,r2,r3
xor_sub r4,r1,2,r3
xor_cmp r4,r1,r2,r3
xor_cmp r4,r1,2,r3
xor_mov r4,r1,r2,r3
xor_mov r4,r1,2,r3
xor_asr r4,r1,r2,r3
xor_asr r4,r1,2,r3
xor_lsr r4,r1,r2,r3
xor_lsr r4,r1,2,r3
xor_asl r4,r1,r2,r3
xor_asl r4,r1,2,r3
or_add r4,r1,r2,r3
or_add r4,r1,2,r3
or_sub r4,r1,r2,r3
or_sub r4,r1,2,r3
or_cmp r4,r1,r2,r3
or_cmp r4,r1,2,r3
or_mov r4,r1,r2,r3
or_mov r4,r1,2,r3
or_asr r4,r1,r2,r3
or_asr r4,r1,2,r3
or_lsr r4,r1,r2,r3
or_lsr r4,r1,2,r3
or_asl r4,r1,r2,r3
or_asl r4,r1,2,r3
dsp_misc_tests:
dmach_add r4,r1,r2,r3
dmach_add r4,r1,2,r3
dmach_sub r4,r1,r2,r3
dmach_sub r4,r1,2,r3
dmach_cmp r4,r1,r2,r3
dmach_cmp r4,r1,2,r3
dmach_mov r4,r1,r2,r3
dmach_mov r4,r1,2,r3
dmach_asr r4,r1,r2,r3
dmach_asr r4,r1,2,r3
dmach_lsr r4,r1,r2,r3
dmach_lsr r4,r1,2,r3
dmach_asl r4,r1,r2,r3
dmach_asl r4,r1,2,r3
swhw_add r4,r1,r2,r3
swhw_add r4,r1,2,r3
swhw_sub r4,r1,r2,r3
swhw_sub r4,r1,2,r3
swhw_cmp r4,r1,r2,r3
swhw_cmp r4,r1,2,r3
swhw_mov r4,r1,r2,r3
swhw_mov r4,r1,2,r3
swhw_asr r4,r1,r2,r3
swhw_asr r4,r1,2,r3
swhw_lsr r4,r1,r2,r3
swhw_lsr r4,r1,2,r3
swhw_asl r4,r1,r2,r3
swhw_asl r4,r1,2,r3
sat16_add r4,r1,r2,r3
sat16_add r4,r1,2,r3
sat16_sub r4,r1,r2,r3
sat16_sub r4,r1,2,r3
sat16_cmp r4,r1,r2,r3
sat16_cmp r4,r1,2,r3
sat16_mov r4,r1,r2,r3
sat16_mov r4,r1,2,r3
sat16_asr r4,r1,r2,r3
sat16_asr r4,r1,2,r3
sat16_lsr r4,r1,r2,r3
sat16_lsr r4,r1,2,r3
sat16_asl r4,r1,r2,r3
sat16_asl r4,r1,2,r3
# mov (r1+),r2
# mov r3,(r4+)
# movhu (r6+),r7
# movhu r8,(r9+)
# mov (rm+,imm8),rn
# mov rn,(rm+,imm8)
# movhu (rm+,imm8),rn
# movhu rn,(rm+,imm8)
# mov (rm+,imm24),rn
# mov rn,(rm+,imm24)
# movhu (rm+,imm24),rn
# movhu rn,(rm+,imm24)
# mov (rm+,imm32),rn
# mov rn,(rm+,imm32)
# movhu (rm+,imm32),rn
# movhu rn,(rm+,imm32)