(enum bfd_reloc_code_real): Add some Alpha relocation types. Reorganized some
of the existing ones.
This commit is contained in:
parent
5802eb8f93
commit
563eb766b1
85
bfd/reloc.c
85
bfd/reloc.c
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@ -1032,6 +1032,7 @@ _bfd_relocate_contents (howto, input_bfd, relocation, location)
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bfd_vma check;
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bfd_signed_vma signed_check;
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bfd_vma add;
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bfd_signed_vma signed_add;
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if (howto->rightshift == 0)
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{
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@ -1056,18 +1057,24 @@ _bfd_relocate_contents (howto, input_bfd, relocation, location)
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/* Add in the value from the object file, shifted down so that
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it is a straight number. */
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add = x & howto->src_mask;
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if ((add & (((~ howto->src_mask) >> 1) & howto->src_mask)) == 0)
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signed_add = add;
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else
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signed_add = add | ((bfd_vma) -1 &~ howto->src_mask);
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if (howto->bitpos == 0)
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{
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check += add;
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signed_check += add;
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signed_check += signed_add;
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}
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else
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{
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add >>= howto->bitpos;
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check += add;
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signed_check += (add
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| ((bfd_vma) -1
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&~ ((bfd_vma) -1 >> howto->bitpos)));
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check += add >> howto->bitpos;
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if (signed_add >= 0)
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signed_check += signed_add >> howto->bitpos;
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else
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signed_check += ((signed_add >> howto->bitpos)
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| ((bfd_vma) -1
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&~ ((bfd_vma) -1 >> howto->bitpos)));
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}
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switch (howto->complain_on_overflow)
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@ -1184,6 +1191,7 @@ CODE_FRAGMENT
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. BFD_RELOC_64,
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. BFD_RELOC_32,
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. BFD_RELOC_16,
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. BFD_RELOC_14,
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. BFD_RELOC_8,
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.
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. {* PC-relative relocations *}
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@ -1208,6 +1216,10 @@ CODE_FRAGMENT
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. {* 32-bit pc-relative, shifted right 2 bits (i.e., 30-bit
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. word displacement, e.g. for SPARC) *}
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. BFD_RELOC_32_PCREL_S2,
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. {* signed 16-bit pc-relative, shifted right 2 bits (e.g. for MIPS) *}
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. BFD_RELOC_16_PCREL_S2,
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. {* this is used on the Alpha *}
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. BFD_RELOC_23_PCREL_S2,
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.
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. {* High 22 bits of 32-bit value, placed into lower 22 bits of
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. target word; simple reloc. *}
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@ -1215,6 +1227,13 @@ CODE_FRAGMENT
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. {* Low 10 bits. *}
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. BFD_RELOC_LO10,
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.
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. {* For systems that allocate a Global Pointer register, these are
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. displacements off that register. These relocation types are
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. handled specially, because the value the register will have is
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. decided relatively late. *}
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. BFD_RELOC_GPREL16,
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. BFD_RELOC_GPREL32,
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.
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. {* Reloc types used for i960/b.out. *}
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. BFD_RELOC_I960_CALLJ,
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.
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@ -1256,13 +1275,50 @@ CODE_FRAGMENT
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. BFD_RELOC_SPARC_LO7,
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. {* end-sanitize-v9 *}
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.
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. {* Alpha ECOFF relocations. Some of these treat the symbol or "addend"
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. in some special way. *}
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. {* For GPDISP_HI16 ("gpdisp") relocations, the symbol is ignored when
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. writing; when reading, it will be the absolute section symbol. The
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. addend is the displacement in bytes of the "lda" instruction from
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. the "ldah" instruction (which is at the address of this reloc). *}
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. BFD_RELOC_ALPHA_GPDISP_HI16,
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. {* For GPDISP_LO16 ("ignore") relocations, the symbol is handled as
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. with GPDISP_HI16 relocs. The addend is ignored when writing the
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. relocations out, and is filled in with the file's GP value on
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. reading, for convenience. *}
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. BFD_RELOC_ALPHA_GPDISP_LO16,
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.
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. {* The Alpha LITERAL/LITUSE relocs are produced by a symbol reference;
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. the assembler turns it into a LDQ instruction to load the address of
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. the symbol, and then fills in a register in the real instruction.
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.
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. The LITERAL reloc, at the LDQ instruction, refers to the .lita
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. section symbol. The addend is ignored when writing, but is filled
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. in with the file's GP value on reading, for convenience, as with the
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. GPDISP_LO16 reloc.
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.
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. The LITUSE reloc, on the instruction using the loaded address, gives
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. information to the linker that it might be able to use to optimize
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. away some literal section references. The symbol is ignored (read
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. as the absolute section symbol), and the "addend" indicates the type
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. of instruction using the register:
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. 1 - "memory" fmt insn
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. 2 - byte-manipulation (byte offset reg)
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. 3 - jsr (target of branch)
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.
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. The GNU linker currently doesn't do any of this optimizing. *}
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. BFD_RELOC_ALPHA_LITERAL,
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. BFD_RELOC_ALPHA_LITUSE,
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.
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. {* The HINT relocation indicates a value that should be filled into the
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. "hint" field of a jmp/jsr/ret instruction, for possible branch-
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. prediction logic which may be provided on some processors. *}
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. BFD_RELOC_ALPHA_HINT,
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.
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. {* Bits 27..2 of the relocation address shifted right 2 bits;
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. simple reloc otherwise. *}
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. BFD_RELOC_MIPS_JMP,
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.
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. {* signed 16-bit pc-relative, shifted right 2 bits (e.g. for MIPS) *}
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. BFD_RELOC_16_PCREL_S2,
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.
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. {* High 16 bits of 32-bit value; simple reloc. *}
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. BFD_RELOC_HI16,
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. {* High 16 bits of 32-bit value but the low 16 bits will be sign
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@ -1273,8 +1329,8 @@ CODE_FRAGMENT
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. {* Low 16 bits. *}
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. BFD_RELOC_LO16,
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.
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. {* 16 bit relocation relative to the global pointer. *}
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. BFD_RELOC_MIPS_GPREL,
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. {* relocation relative to the global pointer. *}
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.#define BFD_RELOC_MIPS_GPREL BFD_RELOC_GPREL16
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.
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. {* Relocation against a MIPS literal section. *}
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. BFD_RELOC_MIPS_LITERAL,
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@ -1282,7 +1338,7 @@ CODE_FRAGMENT
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. {* MIPS ELF relocations. *}
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. BFD_RELOC_MIPS_GOT16,
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. BFD_RELOC_MIPS_CALL16,
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. BFD_RELOC_MIPS_GPREL32,
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.#define BFD_RELOC_MIPS_GPREL32 BFD_RELOC_GPREL32
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.
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. {* These are, so far, specific to HPPA processors. I'm not sure that some
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. don't duplicate other reloc types, such as BFD_RELOC_32 and _32_PCREL.
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@ -1483,6 +1539,7 @@ DESCRIPTION
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don't do relaxing -- i.e., does nothing.
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*/
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/*ARGSUSED*/
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boolean
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bfd_generic_relax_section (abfd, section, link_info, symbols)
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bfd *abfd;
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@ -1534,7 +1591,7 @@ bfd_generic_get_relocated_section_contents (abfd, link_info, link_order, data,
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/* read in the section */
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bfd_get_section_contents(input_bfd,
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input_section,
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data,
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(PTR) data,
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0,
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input_section->_raw_size);
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@ -1556,7 +1613,7 @@ bfd_generic_get_relocated_section_contents (abfd, link_info, link_order, data,
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bfd_reloc_status_type r=
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bfd_perform_relocation(input_bfd,
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*parent,
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data,
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(PTR) data,
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input_section,
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relocateable ? abfd : (bfd *) NULL,
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&error_message);
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