sim/ppc/*: Change immediatly to immediately
sim/ppc/ChangeLog: * ChangeLog, ChangeLog.00, hw_com.c, ld-cache.h, ppc-instructions: Change immediatly to immediately.
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@ -1,3 +1,8 @@
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2014-11-23 Joel Sherrill <joel.sherrill@oarcorp.com>
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* ChangeLog, ChangeLog.00, hw_com.c, ld-cache.h, ppc-instructions:
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Change immediatly to immediately.
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2014-08-27 Joel Sherrill <joel.sherrill@oarcorp.com>
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* basics.h, device.c, device.h, hw_htab.c, hw_memory.c:
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@ -3983,7 +3988,7 @@ Wed Jan 17 19:46:07 1996 Andrew Cagney <cagney@highland.com.au>
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device tree load from file code.
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* psim.c (psim_create): Dump device tree if enabled. If nump
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selected, exit psim immediatly.
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selected, exit psim immediately.
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Wed Jan 17 19:36:52 1996 Andrew Cagney <cagney@highland.com.au>
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@ -505,7 +505,7 @@ Mon Dec 4 17:12:13 1995 Andrew Cagney <cagney@highland.com.au>
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* sim-endian.h,c (SIM_ENDIAN_INLINE) bits.h,c (BITS_INLINE):
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Change to use the updated inline definitions. If enabled
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immediatly include the corresponding c-code so that it will inline
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immediately include the corresponding c-code so that it will inline
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for all modules.
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* inline.h, inline.c (SIM_ENDIAN_INLINE, BITS_INLINE): Remove
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@ -103,14 +103,14 @@
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input-buffering = "unbuffered" (optional)
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Specifying "unbuffered" buffering disables buffering on the serial
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devices input stream (all data is immediatly read). In the future,
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devices input stream (all data is immediately read). In the future,
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this option may be used to provide input buffering alternatives.
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output-buffering = "unbuffered" (optional)
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Specifying "unbuffered" buffering disables buffering on the serial
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devices output stream (all data is immediatly written). In the future,
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devices output stream (all data is immediately written). In the future,
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this option may be extended to include other buffering alternatives.
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@ -24,7 +24,7 @@
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The table that follows determines how each field should be treated.
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Importantly it considers the case where the extracted field is to
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be used immediatly or stored in an instruction cache.
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be used immediately or stored in an instruction cache.
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<type>
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@ -3355,7 +3355,7 @@ void::function::invalid_zero_divide_operation:cpu *processor, unsigned_word cia,
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spreg new_val = (spr_length(n) == 64
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? *rS
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: MASKED(*rS, 32, 63));
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/* HACK - time base registers need to be updated immediatly */
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/* HACK - time base registers need to be updated immediately */
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if (WITH_TIME_BASE) {
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switch (n) {
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case spr_tbu:
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