Fix PR gas/19217

2015-11-11  Matthew Wahab  <matthew.wahab@arm.com>

	PR gas/19217
	* config/tc-arm.c (move_or_literal_pool): Remove redundant feature
	check.  Fix some code formatting.  Drop use of MOVT.  Add some
	comments.

2015-11-11  Matthew Wahab  <matthew.wahab@arm.com>

	PR gas/19217
        * gas/arm/thumb2_ldr_immediate_armv6t2.d: Update expected output.
This commit is contained in:
Ramana Radhakrishnan 2015-11-12 10:50:22 +00:00
parent df3b6708fe
commit 582cfe03cb
4 changed files with 26 additions and 23 deletions

View File

@ -1,3 +1,10 @@
2015-11-11 Matthew Wahab <matthew.wahab@arm.com>
PR gas/19217
* config/tc-arm.c (move_or_literal_pool): Remove redundant feature
check. Fix some code formatting. Drop use of MOVT. Add some
comments.
2015-11-11 Alan Modra <amodra@gmail.com>
Peter Bergner <bergner@vnet.ibm.com>

View File

@ -7847,10 +7847,10 @@ move_or_literal_pool (int i, enum lit_type t, bfd_boolean mode_3)
return TRUE;
}
if (ARM_CPU_HAS_FEATURE (cpu_variant, arm_arch_t2)
&& ARM_CPU_HAS_FEATURE (cpu_variant, arm_ext_v6t2))
if (ARM_CPU_HAS_FEATURE (cpu_variant, arm_arch_t2))
{
/* Check if on thumb2 it can be done with a mov.w or mvn.w instruction. */
/* Check if on thumb2 it can be done with a mov.w or mvn.w
instruction. */
unsigned int newimm;
bfd_boolean isNegated;
@ -7859,36 +7859,27 @@ move_or_literal_pool (int i, enum lit_type t, bfd_boolean mode_3)
isNegated = FALSE;
else
{
newimm = encode_thumb32_immediate (~ v);
newimm = encode_thumb32_immediate (~v);
if (newimm != (unsigned int) FAIL)
isNegated = TRUE;
}
if (newimm != (unsigned int) FAIL)
{
inst.instruction = 0xf04f0000 | (inst.operands[i].reg << 8);
inst.instruction |= (isNegated?0x200000:0);
inst.instruction = (0xf04f0000
| (inst.operands[i].reg << 8));
inst.instruction |= (isNegated ? 0x200000 : 0);
inst.instruction |= (newimm & 0x800) << 15;
inst.instruction |= (newimm & 0x700) << 4;
inst.instruction |= (newimm & 0x0ff);
return TRUE;
}
else if ((v & ~0xFFFF) == 0 || (v & ~0xFFFF0000) == 0)
else if ((v & ~0xFFFF) == 0)
{
/* The number may be loaded with a movw/movt instruction. */
int imm;
if ((inst.reloc.exp.X_add_number & ~0xFFFF) == 0)
{
inst.instruction= 0xf2400000;
imm = v;
}
else
{
inst.instruction = 0xf2c00000;
imm = v >> 16;
}
/* The number can be loaded with a mov.w instruction. */
int imm = v & 0xFFFF;
inst.instruction = 0xf2400000; /* MOVW. */
inst.instruction |= (inst.operands[i].reg << 8);
inst.instruction |= (imm & 0xf000) << 4;
inst.instruction |= (imm & 0x0800) << 15;

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@ -1,3 +1,8 @@
2015-11-11 Matthew Wahab <matthew.wahab@arm.com>
PR gas/19217
* gas/arm/thumb2_ldr_immediate_armv6t2.d: Update expected output.
2015-11-11 Alan Modra <amodra@gmail.com>
Peter Bergner <bergner@vnet.ibm.com>

View File

@ -9,7 +9,7 @@ Disassembly of section .text:
0[0-9a-f]+ <[^>]+> f04f 2163 mov.w r1, #1660969728 .*
0[0-9a-f]+ <[^>]+> f04f 1151 mov.w r1, #5308497 .*
0[0-9a-f]+ <[^>]+> f44f 228e mov.w r2, #290816 .*
0[0-9a-f]+ <[^>]+> f6cf 7232 movt r2, #65330 .*
0[0-9a-f]+ <[^>]+> 4a01 ldr r2, \[pc, #4\] .*
0[0-9a-f]+ <[^>]+> f241 32f1 movw r2, #5105 .*
0[0-9a-f]+ <[^>]+> 0000 .short 0x0000
0[0-9a-f]+ <[^>]+> ff320000 .word 0xff320000