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Remove CR16C support

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I think it is past time to remove CR16C support.  CR16C was added in
2004, and only for ld.  gas and binutils support is lacking, and there
have been no commits to bfd/elf32-cr16c.c other than warning fixes or
global maintainers making changes to all targets.  I see no maintainer
listed for CR16C, and no commits from anyone at NSC supporting the
target.  Furthermore, at the time the CR16 support was added in 2007,
config.sub was changed upstream to no longer recognise cr16c as a
valid cpu.  That means the CR16C ld support is only available as a
secondary target by configuring with, for example,
--enable-targets=all or --enable-targets=cr16c-unknown-elf.  No
testing of the CR16C target is possible.

include/
	* elf/cr16c.h: Delete.
bfd/
	* cpu-cr16c.c: Delete.
	* elf32-cr16c.c: Delete.
	* Makefile.am,
	* archures.c,
	* config.bfd,
	* configure.ac,
	* reloc.c,
	* targets.c: Remove cr16c support.
	* Makefile.in,
	* bfd-in2.h,
	* configure,
	* libbfd.h,
	* po/SRC-POTFILES.in: Regenerate.
ld/
	* emulparams/elf32cr16c.sh: Delete.
	* scripttempl/elf32cr16c.sc: Delete.
	* Makefile.am,
	* configure.tgt: Remove cr16c support.
	* NEWS: Mention removal of cr16c.
	* Makefile.in,
	* po/BLD-POTFILES.in: Regenerate.
This commit is contained in:
Alan Modra 2019-11-07 13:32:16 +10:30
parent 984b909a23
commit 595d3787e9
24 changed files with 33 additions and 1532 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

16
bfd/ChangeLog
View File

@ -1,3 +1,19 @@
2019-11-07 Alan Modra <amodra@gmail.com>
* cpu-cr16c.c: Delete.
* elf32-cr16c.c: Delete.
* Makefile.am,
* archures.c,
* config.bfd,
* configure.ac,
* reloc.c,
* targets.c: Remove cr16c support.
* Makefile.in,
* bfd-in2.h,
* configure,
* libbfd.h,
* po/SRC-POTFILES.in: Regenerate.
2019-11-05 Tim Rühsen <tim.ruehsen@gmx.de>
* doc/chew.c (add_to_definition): Use correct type when

4
bfd/Makefile.am
View File

@ -98,7 +98,6 @@ ALL_MACHINES = \
cpu-bfin.lo \
cpu-bpf.lo \
cpu-cr16.lo \
cpu-cr16c.lo \
cpu-cris.lo \
cpu-crx.lo \
cpu-csky.lo \
@ -185,7 +184,6 @@ ALL_MACHINES_CFILES = \
cpu-bfin.c \
cpu-bpf.c \
cpu-cr16.c \
cpu-cr16c.c \
cpu-cris.c \
cpu-crx.c \
cpu-csky.c \
@ -304,7 +302,6 @@ BFD32_BACKENDS = \
elf32-avr.lo \
elf32-bfin.lo \
elf32-cr16.lo \
elf32-cr16c.lo \
elf32-cris.lo \
elf32-crx.lo \
elf32-csky.lo \
@ -441,7 +438,6 @@ BFD32_BACKENDS_CFILES = \
elf32-avr.c \
elf32-bfin.c \
elf32-cr16.c \
elf32-cr16c.c \
elf32-cris.c \
elf32-crx.c \
elf32-csky.c \

6
bfd/Makefile.in
View File

@ -522,7 +522,6 @@ ALL_MACHINES = \
cpu-bfin.lo \
cpu-bpf.lo \
cpu-cr16.lo \
cpu-cr16c.lo \
cpu-cris.lo \
cpu-crx.lo \
cpu-csky.lo \
@ -609,7 +608,6 @@ ALL_MACHINES_CFILES = \
cpu-bfin.c \
cpu-bpf.c \
cpu-cr16.c \
cpu-cr16c.c \
cpu-cris.c \
cpu-crx.c \
cpu-csky.c \
@ -729,7 +727,6 @@ BFD32_BACKENDS = \
elf32-avr.lo \
elf32-bfin.lo \
elf32-cr16.lo \
elf32-cr16c.lo \
elf32-cris.lo \
elf32-crx.lo \
elf32-csky.lo \
@ -866,7 +863,6 @@ BFD32_BACKENDS_CFILES = \
elf32-avr.c \
elf32-bfin.c \
elf32-cr16.c \
elf32-cr16c.c \
elf32-cris.c \
elf32-crx.c \
elf32-csky.c \
@ -1344,7 +1340,6 @@ distclean-compile:
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-bfin.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-bpf.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-cr16.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-cr16c.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-cris.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-crx.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-csky.Plo@am__quote@
@ -1442,7 +1437,6 @@ distclean-compile:
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-avr.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-bfin.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-cr16.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-cr16c.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-cris.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-crx.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-csky.Plo@am__quote@

4
bfd/archures.c
View File

@ -448,8 +448,6 @@ DESCRIPTION
.#define bfd_mach_bfin 1
. bfd_arch_cr16, {* National Semiconductor CompactRISC (ie CR16). *}
.#define bfd_mach_cr16 1
. bfd_arch_cr16c, {* National Semiconductor CompactRISC. *}
.#define bfd_mach_cr16c 1
. bfd_arch_crx, {* National Semiconductor CRX. *}
.#define bfd_mach_crx 1
. bfd_arch_cris, {* Axis CRIS. *}
@ -606,7 +604,6 @@ extern const bfd_arch_info_type bfd_arm_arch;
extern const bfd_arch_info_type bfd_avr_arch;
extern const bfd_arch_info_type bfd_bfin_arch;
extern const bfd_arch_info_type bfd_cr16_arch;
extern const bfd_arch_info_type bfd_cr16c_arch;
extern const bfd_arch_info_type bfd_cris_arch;
extern const bfd_arch_info_type bfd_crx_arch;
extern const bfd_arch_info_type bfd_csky_arch;
@ -698,7 +695,6 @@ static const bfd_arch_info_type * const bfd_archures_list[] =
&bfd_avr_arch,
&bfd_bfin_arch,
&bfd_cr16_arch,
&bfd_cr16c_arch,
&bfd_cris_arch,
&bfd_crx_arch,
&bfd_csky_arch,

44
bfd/bfd-in2.h
View File

@ -1826,8 +1826,6 @@ enum bfd_architecture
#define bfd_mach_bfin 1
bfd_arch_cr16, /* National Semiconductor CompactRISC (ie CR16). */
#define bfd_mach_cr16 1
bfd_arch_cr16c, /* National Semiconductor CompactRISC. */
#define bfd_mach_cr16c 1
bfd_arch_crx, /* National Semiconductor CRX. */
#define bfd_mach_crx 1
bfd_arch_cris, /* Axis CRIS. */
@ -4859,48 +4857,6 @@ This is a 15 bit relative address. If the most significant bits are all zero
then it may be truncated to 8 bits. */
BFD_RELOC_S12Z_15_PCREL,
/* NS CR16C Relocations. */
BFD_RELOC_16C_NUM08,
BFD_RELOC_16C_NUM08_C,
BFD_RELOC_16C_NUM16,
BFD_RELOC_16C_NUM16_C,
BFD_RELOC_16C_NUM32,
BFD_RELOC_16C_NUM32_C,
BFD_RELOC_16C_DISP04,
BFD_RELOC_16C_DISP04_C,
BFD_RELOC_16C_DISP08,
BFD_RELOC_16C_DISP08_C,
BFD_RELOC_16C_DISP16,
BFD_RELOC_16C_DISP16_C,
BFD_RELOC_16C_DISP24,
BFD_RELOC_16C_DISP24_C,
BFD_RELOC_16C_DISP24a,
BFD_RELOC_16C_DISP24a_C,
BFD_RELOC_16C_REG04,
BFD_RELOC_16C_REG04_C,
BFD_RELOC_16C_REG04a,
BFD_RELOC_16C_REG04a_C,
BFD_RELOC_16C_REG14,
BFD_RELOC_16C_REG14_C,
BFD_RELOC_16C_REG16,
BFD_RELOC_16C_REG16_C,
BFD_RELOC_16C_REG20,
BFD_RELOC_16C_REG20_C,
BFD_RELOC_16C_ABS20,
BFD_RELOC_16C_ABS20_C,
BFD_RELOC_16C_ABS24,
BFD_RELOC_16C_ABS24_C,
BFD_RELOC_16C_IMM04,
BFD_RELOC_16C_IMM04_C,
BFD_RELOC_16C_IMM16,
BFD_RELOC_16C_IMM16_C,
BFD_RELOC_16C_IMM20,
BFD_RELOC_16C_IMM20_C,
BFD_RELOC_16C_IMM24,
BFD_RELOC_16C_IMM24_C,
BFD_RELOC_16C_IMM32,
BFD_RELOC_16C_IMM32_C,
/* NS CR16 Relocations. */
BFD_RELOC_CR16_NUM8,
BFD_RELOC_CR16_NUM16,

6
bfd/config.bfd
View File

@ -85,6 +85,7 @@ case $targ in
arm-*-oabi | \
arm-*-riscix* | \
arm-epoc-pe* | \
cr16c-*-* | \
h8300*-*-coff | \
h8500*-*-coff | \
hppa*-*-rtems* | \
@ -436,11 +437,6 @@ case "${targ}" in
targ_underscore=yes
;;
cr16c-*-elf*)
targ_defvec=cr16c_elf32_vec
targ_underscore=yes
;;
#ifdef BFD64
cris-*-* | crisv32-*-*)
targ_defvec=cris_aout_vec

1
bfd/configure vendored
View File

@ -14722,7 +14722,6 @@ do
bfin_elf32_vec) tb="$tb elf32-bfin.lo elf32.lo $elf" ;;
bfin_elf32_fdpic_vec) tb="$tb elf32-bfin.lo elf32.lo $elf" ;;
cr16_elf32_vec) tb="$tb elf32-cr16.lo elf32.lo $elf" ;;
cr16c_elf32_vec) tb="$tb elf32-cr16c.lo elf32.lo $elf" ;;
cris_aout_vec) tb="$tb aout-cris.lo" ;;
cris_elf32_vec) tb="$tb elf32-cris.lo elf32.lo $elf" ;;
cris_elf32_us_vec) tb="$tb elf32-cris.lo elf32.lo $elf" ;;

1
bfd/configure.ac
View File

@ -458,7 +458,6 @@ do
bfin_elf32_vec) tb="$tb elf32-bfin.lo elf32.lo $elf" ;;
bfin_elf32_fdpic_vec) tb="$tb elf32-bfin.lo elf32.lo $elf" ;;
cr16_elf32_vec) tb="$tb elf32-cr16.lo elf32.lo $elf" ;;
cr16c_elf32_vec) tb="$tb elf32-cr16c.lo elf32.lo $elf" ;;
cris_aout_vec) tb="$tb aout-cris.lo" ;;
cris_elf32_vec) tb="$tb elf32-cris.lo elf32.lo $elf" ;;
cris_elf32_us_vec) tb="$tb elf32-cris.lo elf32.lo $elf" ;;

41
bfd/cpu-cr16c.c
View File

@ -1,41 +0,0 @@
/* BFD support for the CR16C processor.
Copyright (C) 2004-2019 Free Software Foundation, Inc.
This file is part of BFD, the Binary File Descriptor library.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
#include "sysdep.h"
#include "bfd.h"
#include "libbfd.h"
const bfd_arch_info_type bfd_cr16c_arch =
{
16, /* Bits in a word. */
32, /* Bits in an address. */
8, /* Bits in a byte. */
bfd_arch_cr16c,
bfd_mach_cr16c,
"cr16c",
"cr16c",
1,
TRUE, /* The one and only. */
bfd_default_compatible,
bfd_default_scan,
bfd_arch_default_fill,
NULL,
0 /* Maximum offset of a reloc from the start of an insn. */
};

963
bfd/elf32-cr16c.c
View File

@ -1,963 +0,0 @@
/* BFD back-end for National Semiconductor's CR16C ELF
Copyright (C) 2004-2019 Free Software Foundation, Inc.
This file is part of BFD, the Binary File Descriptor library.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
#include "sysdep.h"
#include "bfd.h"
#include "libbfd.h"
#include "bfdlink.h"
#include "elf/cr16c.h"
#include "elf-bfd.h"
#define USE_REL 1 /* CR16C uses REL relocations instead of RELA. */
/* The following definition is based on EMPTY_HOWTO macro,
but also initiates the "name" field in HOWTO struct. */
#define ONLY_NAME_HOWTO(C) \
HOWTO ((C), 0, 0, 0, FALSE, 0, complain_overflow_dont, NULL, \
STRINGX(C), FALSE, 0, 0, FALSE)
/* reloc_map_index array maps CRASM relocation type into a BFD
relocation enum. The array's indices are synchronized with
RINDEX_16C_* indices, created in include/elf/cr16c.h.
The array is used in:
1. elf32-cr16c.c : elf_cr16c_reloc_type_lookup().
2. asreloc.c : find_reloc_type(). */
RELOC_MAP reloc_map_index[RINDEX_16C_MAX] =
{
{R_16C_NUM08, BFD_RELOC_16C_NUM08},
{R_16C_NUM08_C, BFD_RELOC_16C_NUM08_C},
{R_16C_NUM16, BFD_RELOC_16C_NUM16},
{R_16C_NUM16_C, BFD_RELOC_16C_NUM16_C},
{R_16C_NUM32, BFD_RELOC_16C_NUM32},
{R_16C_NUM32_C, BFD_RELOC_16C_NUM32_C},
{R_16C_DISP04, BFD_RELOC_16C_DISP04},
{R_16C_DISP04_C, BFD_RELOC_16C_DISP04_C},
{R_16C_DISP08, BFD_RELOC_16C_DISP08},
{R_16C_DISP08_C, BFD_RELOC_16C_DISP08_C},
{R_16C_DISP16, BFD_RELOC_16C_DISP16},
{R_16C_DISP16_C, BFD_RELOC_16C_DISP16_C},
{R_16C_DISP24, BFD_RELOC_16C_DISP24},
{R_16C_DISP24_C, BFD_RELOC_16C_DISP24_C},
{R_16C_DISP24a, BFD_RELOC_16C_DISP24a},
{R_16C_DISP24a_C, BFD_RELOC_16C_DISP24a_C},
{R_16C_REG04, BFD_RELOC_16C_REG04},
{R_16C_REG04_C, BFD_RELOC_16C_REG04_C},
{R_16C_REG04a, BFD_RELOC_16C_REG04a},
{R_16C_REG04a_C, BFD_RELOC_16C_REG04a_C},
{R_16C_REG14, BFD_RELOC_16C_REG14},
{R_16C_REG14_C, BFD_RELOC_16C_REG14_C},
{R_16C_REG16, BFD_RELOC_16C_REG16},
{R_16C_REG16_C, BFD_RELOC_16C_REG16_C},
{R_16C_REG20, BFD_RELOC_16C_REG20},
{R_16C_REG20_C, BFD_RELOC_16C_REG20_C},
{R_16C_ABS20, BFD_RELOC_16C_ABS20},
{R_16C_ABS20_C, BFD_RELOC_16C_ABS20_C},
{R_16C_ABS24, BFD_RELOC_16C_ABS24},
{R_16C_ABS24_C, BFD_RELOC_16C_ABS24_C},
{R_16C_IMM04, BFD_RELOC_16C_IMM04},
{R_16C_IMM04_C, BFD_RELOC_16C_IMM04_C},
{R_16C_IMM16, BFD_RELOC_16C_IMM16},
{R_16C_IMM16_C, BFD_RELOC_16C_IMM16_C},
{R_16C_IMM20, BFD_RELOC_16C_IMM20},
{R_16C_IMM20_C, BFD_RELOC_16C_IMM20_C},
{R_16C_IMM24, BFD_RELOC_16C_IMM24},
{R_16C_IMM24_C, BFD_RELOC_16C_IMM24_C},
{R_16C_IMM32, BFD_RELOC_16C_IMM32},
{R_16C_IMM32_C, BFD_RELOC_16C_IMM32_C}
};
static reloc_howto_type elf_howto_table[] =
{
/* 00 */ ONLY_NAME_HOWTO (RINDEX_16C_NUM08),
/* 01 */ ONLY_NAME_HOWTO (RINDEX_16C_NUM08_C),
/* 02 */ ONLY_NAME_HOWTO (RINDEX_16C_NUM16),
/* 03 */ ONLY_NAME_HOWTO (RINDEX_16C_NUM16_C),
/* 04 */ ONLY_NAME_HOWTO (RINDEX_16C_NUM32),
/* 05 */ ONLY_NAME_HOWTO (RINDEX_16C_NUM32_C),
/* 06 */ ONLY_NAME_HOWTO (RINDEX_16C_DISP04),
/* 07 */ ONLY_NAME_HOWTO (RINDEX_16C_DISP04_C),
/* 08 */ ONLY_NAME_HOWTO (RINDEX_16C_DISP08),
/* 09 */ ONLY_NAME_HOWTO (RINDEX_16C_DISP08_C),
/* 10 */ ONLY_NAME_HOWTO (RINDEX_16C_DISP16),
/* 11 */ ONLY_NAME_HOWTO (RINDEX_16C_DISP16_C),
/* 12 */ ONLY_NAME_HOWTO (RINDEX_16C_DISP24),
/* 13 */ ONLY_NAME_HOWTO (RINDEX_16C_DISP24_C),
/* 14 */ ONLY_NAME_HOWTO (RINDEX_16C_DISP24a),
/* 15 */ ONLY_NAME_HOWTO (RINDEX_16C_DISP24a_C),
/* 16 */ ONLY_NAME_HOWTO (RINDEX_16C_REG04),
/* 17 */ ONLY_NAME_HOWTO (RINDEX_16C_REG04_C),
/* 18 */ ONLY_NAME_HOWTO (RINDEX_16C_REG04a),
/* 19 */ ONLY_NAME_HOWTO (RINDEX_16C_REG04a_C),
/* 20 */ ONLY_NAME_HOWTO (RINDEX_16C_REG14),
/* 21 */ ONLY_NAME_HOWTO (RINDEX_16C_REG14_C),
/* 22 */ ONLY_NAME_HOWTO (RINDEX_16C_REG16),
/* 23 */ ONLY_NAME_HOWTO (RINDEX_16C_REG16_C),
/* 24 */ ONLY_NAME_HOWTO (RINDEX_16C_REG20),
/* 25 */ ONLY_NAME_HOWTO (RINDEX_16C_REG20_C),
/* 26 */ ONLY_NAME_HOWTO (RINDEX_16C_ABS20),
/* 27 */ ONLY_NAME_HOWTO (RINDEX_16C_ABS20_C),
/* 28 */ ONLY_NAME_HOWTO (RINDEX_16C_ABS24),
/* 29 */ ONLY_NAME_HOWTO (RINDEX_16C_ABS24_C),
/* 30 */ ONLY_NAME_HOWTO (RINDEX_16C_IMM04),
/* 31 */ ONLY_NAME_HOWTO (RINDEX_16C_IMM04_C),
/* 32 */ ONLY_NAME_HOWTO (RINDEX_16C_IMM16),
/* 33 */ ONLY_NAME_HOWTO (RINDEX_16C_IMM16_C),
/* 34 */ ONLY_NAME_HOWTO (RINDEX_16C_IMM20),
/* 35 */ ONLY_NAME_HOWTO (RINDEX_16C_IMM20_C),
/* 36 */ ONLY_NAME_HOWTO (RINDEX_16C_IMM24),
/* 37 */ ONLY_NAME_HOWTO (RINDEX_16C_IMM24_C),
/* 38 */ ONLY_NAME_HOWTO (RINDEX_16C_IMM32),
/* 39 */ ONLY_NAME_HOWTO (RINDEX_16C_IMM32_C)
};
/* Code to turn a code_type into a howto ptr, uses the above howto table. */
static reloc_howto_type *
elf_cr16c_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
bfd_reloc_code_real_type code)
{
unsigned int i;
for (i = 0; i < RINDEX_16C_MAX; i++)
{
if (code == reloc_map_index[i].bfd_reloc_enum)
{
/* printf ("CR16C Relocation Type is - %x\n", code); */
return & elf_howto_table[i];
}
}
/* printf ("This relocation Type is not supported - %x\n", code); */
return 0;
}
static reloc_howto_type *
elf_cr16c_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
const char *r_name)
{
unsigned int i;
for (i = 0; i < sizeof (elf_howto_table) / sizeof (elf_howto_table[0]); i++)
if (elf_howto_table[i].name != NULL
&& strcasecmp (elf_howto_table[i].name, r_name) == 0)
return &elf_howto_table[i];
return NULL;
}
static bfd_boolean
elf_cr16c_info_to_howto (bfd *abfd ATTRIBUTE_UNUSED,
arelent *cache_ptr ATTRIBUTE_UNUSED,
Elf_Internal_Rela *dst ATTRIBUTE_UNUSED)
{
return FALSE;
}
static bfd_boolean
elf_cr16c_info_to_howto_rel (bfd *abfd ATTRIBUTE_UNUSED,
arelent *cache_ptr,
Elf_Internal_Rela *dst)
{
unsigned int r_type = ELF32_R_TYPE (dst->r_info);
if (r_type >= RINDEX_16C_MAX)
{
/* xgettext:c-format */
_bfd_error_handler (_("%pB: unsupported relocation type %#x"),
abfd, r_type);
bfd_set_error (bfd_error_bad_value);
return FALSE;
}
cache_ptr->howto = &elf_howto_table[r_type];
return TRUE;
}
/* Perform a relocation as part of a final link. */
static bfd_reloc_status_type
cr16c_elf_final_link_relocate (reloc_howto_type *howto,
bfd *abfd,
bfd *output_bfd ATTRIBUTE_UNUSED,
asection *input_section,
bfd_byte *data,
bfd_vma octets,
bfd_vma Rvalue,
bfd_vma addend ATTRIBUTE_UNUSED,
struct bfd_link_info *info ATTRIBUTE_UNUSED,
asection *sym_sec ATTRIBUTE_UNUSED,
int is_local ATTRIBUTE_UNUSED)
{
long value;
short sword; /* Extracted from the hole and put back. */
unsigned long format, addr_type, code_factor;
unsigned short size;
unsigned short r_type;
unsigned long disp20_opcod;
char neg = 0;
char neg2pos = 0;
long left_val = 0;
long plus_factor = 0; /* To be added to the hole. */
#define MIN_BYTE ((int) 0xFFFFFF80)
#define MIN_WORD ((int) 0xFFFF8000)
#define MAX_UWORD ((unsigned) 0x0000FFFF)
#define MAX_UBYTE ((unsigned) 0x000000FF)
r_type = reloc_map_index[howto->type].cr_reloc_type;
format = r_type & R_FORMAT;
size = r_type & R_SIZESP;
addr_type = r_type & R_ADDRTYPE;
code_factor = ((addr_type == R_CODE_ADDR) ? 1 : 0);
switch (format)
{
case R_NUMBER:
switch (size)
{
case R_S_16C_08: /* One byte. */
value = bfd_get_8 (abfd, (char *) data + octets);
break;
case R_S_16C_16: /* Two bytes. */
sword = bfd_get_16 (abfd, (bfd_byte *) data + octets);
value = sword;
break;
case R_S_16C_32: /* Four bytes. */
value = bfd_get_32 (abfd, (bfd_byte *) data + octets);
break;
default:
return bfd_reloc_notsupported;
}
break;
case R_16C_DISPL:
switch (size)
{
case R_S_16C_04: /* word1(4-7). */
value = bfd_get_8 (abfd, (char *) data + octets);
left_val = value & 0xF;
value = (value & 0xF0) >> 4;
value++;
value <<= 1;
break;
case R_S_16C_08: /* word1(0-3,8-11). */
sword = bfd_get_16 (abfd, (char *) data + octets);
value = sword & 0x000F;
value |= ((sword & 0x0F00) >> 4);
left_val = sword & 0xF0F0;
value <<= 1;
if (value & 0x100)
value |= 0xFFFFFF00;
break;
case R_S_16C_16: /* word2. */
sword = bfd_get_16 (abfd, (bfd_byte *) data + octets);
value = sword;
value = ((value & 0xFFFE) >> 1) | ((value & 0x1) << 15);
value <<= 1;
if (value & 0x10000)
value |= 0xFFFF0000;
break;
case R_S_16C_24_a: /* word1(0-7),word2. */
value = bfd_get_32 (abfd, (bfd_byte *) data + octets);
left_val = value & 0x0000FF00;
value = ((value & 0xFFFE0000) >> 17) |
((value & 0x00010000) << 7) | ((value & 0x000000FF) << 15);
value <<= 1;
if (value & 0x1000000)
value |= 0xFE000000;
break;
case R_S_16C_24: /* word2(0-3,8-11),word3. */
value = bfd_get_32 (abfd, (bfd_byte *) data + octets);
left_val = value & 0x0000F0F0;
value = ((value >> 16) & 0x0000FFFF) |
((value & 0x00000F00) << 8) | ((value & 0x0000000F) << 20);
value = ((value & 0x00FFFFFE) >> 1) | ((value & 0x00000001) << 23);
value <<= 1;
if (value & 0x1000000)
value |= 0xFE000000;
break;
default:
return bfd_reloc_notsupported;
}
break;
case R_16C_REGREL:
switch (size)
{
case R_S_16C_04: /* word1(12-15) not scaled. */
value = bfd_get_8 (abfd, (char *) data + octets);
left_val = value & 0xF0;
value = value & 0xF;
break;
case R_S_16C_04_a: /* word1(12-15) scaled by 2. */
value = bfd_get_8 (abfd, (char *) data + octets);
left_val = value & 0xF0;
value = value & 0xF;
value <<= 1;
break;
case R_S_16C_14: /* word1(4-5),word2(0-3,8-15). */
value = bfd_get_32 (abfd, (bfd_byte *) data + octets);
left_val = value & 0x00F0FFCF;
value = ((value & 0xc0000000) >> 24) |
((value & 0x3F000000) >> 16) |
((value & 0x000F0000) >> 16) | (value & 0x00000030);
break;
case R_S_16C_16: /* word2. */
sword = bfd_get_16 (abfd, (bfd_byte *) data + octets);
value = sword;
break;
case R_S_16C_20: /* word2(8-11),word3. */
value = bfd_get_32 (abfd, (bfd_byte *) data + octets);
left_val = value & 0xF0;
value = (value & 0xF) << 16;
sword = bfd_get_16 (abfd, (bfd_byte *) data + octets + 1);
value = value | (unsigned short) sword;
disp20_opcod = bfd_get_32 (abfd, (bfd_byte *) data + octets - 3);
disp20_opcod |= 0x0FFF0000;
if ((disp20_opcod == 0x4FFF0018) || /* loadb -disp20(reg) */
(disp20_opcod == 0x5FFF0018) || /* loadb -disp20(rp) */
(disp20_opcod == 0x8FFF0018) || /* loadd -disp20(reg) */
(disp20_opcod == 0x9FFF0018) || /* loadd -disp20(rp) */
(disp20_opcod == 0xCFFF0018) || /* loadw -disp20(reg) */
(disp20_opcod == 0xDFFF0018) || /* loadw -disp20(rp) */
(disp20_opcod == 0x4FFF0019) || /* storb -disp20(reg) */
(disp20_opcod == 0x5FFF0019) || /* storb -disp20(rp) */
(disp20_opcod == 0x8FFF0019) || /* stord -disp20(reg) */
(disp20_opcod == 0x9FFF0019) || /* stord -disp20(rp) */
(disp20_opcod == 0xCFFF0019) || /* storw -disp20(reg) */
(disp20_opcod == 0xDFFF0019))
{ /* storw -disp20(rp). */
neg = 1;
value |= 0xFFF00000;
}
break;
default:
return bfd_reloc_notsupported;
}
break;
case R_16C_ABS:
switch (size)
{
case R_S_16C_20: /* word1(0-3),word2. */
value = bfd_get_32 (abfd, (bfd_byte *) data + octets);
left_val = value & 0x0000FFF0;
value = ((value & 0xFFFF0000) >> 16) |
((value & 0x0000000F) << 16);
break;
case R_S_16C_24: /* word2(0-3,8-11),word3. */
value = bfd_get_32 (abfd, (bfd_byte *) data + octets);
left_val = value & 0x0000F0F0;
value = ((value & 0xFFFF0000) >> 16) |
((value & 0x00000F00) << 8) | ((value & 0x0000000F) << 20);
break;
default:
return bfd_reloc_notsupported;
}
break;
case R_16C_IMMED:
switch (size)
{
case R_S_16C_04: /* word1/2(4-7). */
value = bfd_get_8 (abfd, (char *) data + octets);
left_val = value & 0xF;
value = (value & 0xF0) >> 4;
break;
case R_S_16C_16: /* word2. */
sword = bfd_get_16 (abfd, (bfd_byte *) data + octets);
value = sword;
break;
case R_S_16C_20: /* word1(0-3),word2. */
value = bfd_get_32 (abfd, (bfd_byte *) data + octets);
left_val = value & 0x0000FFF0;
value = ((value & 0xFFFF0000) >> 16) |
((value & 0x0000000F) << 16);
break;
case R_S_16C_32: /* word2, word3. */
value = bfd_get_32 (abfd, (bfd_byte *) data + octets);
value = ((value & 0x0000FFFF) << 16) |
((value & 0xFFFF0000) >> 16);
break;
default:
return bfd_reloc_notsupported;
}
break;
default:
return bfd_reloc_notsupported;
}
switch ((r_type & R_RELTO) >> 4)
{
case 0: /* R_ABS. */
plus_factor = Rvalue;
break;
case 1: /* R_PCREL. */
plus_factor = Rvalue -
(input_section->output_section->vma + input_section->output_offset);
break;
default:
return bfd_reloc_notsupported;
}
if (neg)
{
if (plus_factor >= -value)
neg2pos = 1;
/* We need to change load/stor with negative
displ opcode to positive disp opcode (CR16C). */
}
value = value + (plus_factor >> code_factor);
switch (format)
{
case R_NUMBER:
switch (size)
{
case R_S_16C_08: /* One byte. */
if (value > (int) MAX_UBYTE || value < MIN_BYTE)
return bfd_reloc_overflow;
value &= 0xFF;
bfd_put_8 (abfd, (bfd_vma) value, (unsigned char *) data + octets);
break;
case R_S_16C_16: /* Two bytes. */
if (value > (int) MAX_UWORD || value < MIN_WORD)
return bfd_reloc_overflow;
value &= 0xFFFF;
sword = value;
bfd_put_16 (abfd, (bfd_vma) sword,
(unsigned char *) data + octets);
break;
case R_S_16C_32: /* Four bytes. */
value &= 0xFFFFFFFF;
bfd_put_32 (abfd, (bfd_vma) value, (bfd_byte *) data + octets);
break;
default:
return bfd_reloc_notsupported;
}
break;
case R_16C_DISPL:
switch (size)
{
case R_S_16C_04: /* word1(4-7). */
if ((value - 32) > 32 || value < 2)
return bfd_reloc_overflow;
value >>= 1;
value--;
value &= 0xF;
value <<= 4;
value |= left_val;
bfd_put_8 (abfd, (bfd_vma) value, (unsigned char *) data + octets);
break;
case R_S_16C_08: /* word1(0-3,8-11). */
if (value > 255 || value < -256 || value == 0x80)
return bfd_reloc_overflow;
value &= 0x1FF;
value >>= 1;
sword = value & 0x000F;
sword |= (value & 0x00F0) << 4;
sword |= left_val;
bfd_put_16 (abfd, (bfd_vma) sword,
(unsigned char *) data + octets);
break;
case R_S_16C_16: /* word2. */
if (value > 65535 || value < -65536)
return bfd_reloc_overflow;
value >>= 1;
value &= 0xFFFF;
value = ((value & 0x8000) >> 15) | ((value & 0x7FFF) << 1);
sword = value;
bfd_put_16 (abfd, (bfd_vma) sword,
(unsigned char *) data + octets);
break;
case R_S_16C_24_a: /* word1(0-7),word2. */
if (value > 16777215 || value < -16777216)
return bfd_reloc_overflow;
value &= 0x1FFFFFF;
value >>= 1;
value = ((value & 0x00007FFF) << 17) |
((value & 0x00800000) >> 7) | ((value & 0x007F8000) >> 15);
value |= left_val;
bfd_put_32 (abfd, (bfd_vma) value, (bfd_byte *) data + octets);
break;
case R_S_16C_24: /* word2(0-3,8-11),word3. */
if (value > 16777215 || value < -16777216)
return bfd_reloc_overflow;
value &= 0x1FFFFFF;
value >>= 1;
value = ((value & 0x007FFFFF) << 1) | ((value & 0x00800000) >> 23);
value = ((value & 0x0000FFFF) << 16) |
((value & 0x000F0000) >> 8) | ((value & 0x00F00000) >> 20);
value |= left_val;
bfd_put_32 (abfd, (bfd_vma) value, (bfd_byte *) data + octets);
break;
default:
return bfd_reloc_notsupported;
}
break;
case R_16C_REGREL:
switch (size)
{
case R_S_16C_04: /* word1(12-15) not scaled. */
if (value > 13 || value < 0)
return bfd_reloc_overflow;
value &= 0xF;
value |= left_val;
bfd_put_8 (abfd, (bfd_vma) value, (unsigned char *) data + octets);
break;
case R_S_16C_04_a: /* word1(12-15) not scaled. */
if (value > 26 || value < 0)
return bfd_reloc_overflow;
value &= 0x1F;
value >>= 1;
value |= left_val;
bfd_put_8 (abfd, (bfd_vma) value, (unsigned char *) data + octets);
break;
case R_S_16C_14: /* word1(4-5),word2(0-3,8-15). */
if (value < 0 || value > 16383)
return bfd_reloc_overflow;
value &= 0x3FFF;
value = ((value & 0x000000c0) << 24) |
((value & 0x00003F00) << 16) |
((value & 0x0000000F) << 16) | (value & 0x00000030);
value |= left_val;
bfd_put_32 (abfd, (bfd_vma) value, (bfd_byte *) data + octets);
break;
case R_S_16C_16: /* word2. */
if (value > 65535 || value < 0)
return bfd_reloc_overflow;
value &= 0xFFFF;
sword = value;
bfd_put_16 (abfd, (bfd_vma) sword,
(unsigned char *) data + octets);
break;
case R_S_16C_20: /* word2(8-11),word3. */
/* if (value > 1048575 || value < 0) RELOC_ERROR(1); */
value &= 0xFFFFF;
sword = value & 0x0000FFFF;
value = (value & 0x000F0000) >> 16;
value |= left_val;
bfd_put_8 (abfd, (bfd_vma) value, (unsigned char *) data + octets);
bfd_put_16 (abfd, (bfd_vma) sword,
(unsigned char *) data + octets + 1);
if (neg2pos)
{
/* Change load/stor negative displ opcode
to load/stor positive displ opcode. */
value = bfd_get_8 (abfd, (char *) data + octets - 3);
value &= 0xF7;
value |= 0x2;
bfd_put_8 (abfd, (bfd_vma) value,
(unsigned char *) data + octets - 3);
}
break;
default:
return bfd_reloc_notsupported;
}
break;
case R_16C_ABS:
switch (size)
{
case R_S_16C_20: /* word1(0-3),word2. */
if (value > 1048575 || value < 0)
return bfd_reloc_overflow;
value &= 0xFFFFF;
value = ((value & 0x0000FFFF) << 16) |
((value & 0x000F0000) >> 16);
value |= left_val;
bfd_put_32 (abfd, (bfd_vma) value, (bfd_byte *) data + octets);
break;
case R_S_16C_24: /* word2(0-3,8-11),word3. */
/* if (value > 16777215 || value < 0) RELOC_ERROR(1); */
value &= 0xFFFFFF;
value = ((value & 0x0000FFFF) << 16) |
((value & 0x000F0000) >> 8) | ((value & 0x00F00000) >> 20);
value |= left_val;
bfd_put_32 (abfd, (bfd_vma) value, (bfd_byte *) data + octets);
break;
default:
return bfd_reloc_notsupported;
}
break;
case R_16C_IMMED:
switch (size)
{
case R_S_16C_04: /* word1/2(4-7). */
if (value > 15 || value < -1)
return bfd_reloc_overflow;
value &= 0xF;
value <<= 4;
value |= left_val;
bfd_put_8 (abfd, (bfd_vma) value, (unsigned char *) data + octets);
break;
case R_S_16C_16: /* word2. */
if (value > 32767 || value < -32768)
return bfd_reloc_overflow;
value &= 0xFFFF;
sword = value;
bfd_put_16 (abfd, (bfd_vma) sword,
(unsigned char *) data + octets);
break;
case R_S_16C_20: /* word1(0-3),word2. */
if (value > 1048575 || value < 0)
return bfd_reloc_overflow;
value &= 0xFFFFF;
value = ((value & 0x0000FFFF) << 16) |
((value & 0x000F0000) >> 16);
value |= left_val;
bfd_put_32 (abfd, (bfd_vma) value, (bfd_byte *) data + octets);
break;
case R_S_16C_32: /* word2, word3. */
value &= 0xFFFFFFFF;
value = ((value & 0x0000FFFF) << 16) |
((value & 0xFFFF0000) >> 16);
bfd_put_32 (abfd, (bfd_vma) value, (bfd_byte *) data + octets);
break;
default:
return bfd_reloc_notsupported;
}
break;
default:
return bfd_reloc_notsupported;
}
return bfd_reloc_ok;
}
/* Relocate a CR16C ELF section. */
static bfd_boolean
elf32_cr16c_relocate_section (bfd *output_bfd,
struct bfd_link_info *info,
bfd *input_bfd,
asection *input_section,
bfd_byte *contents,
Elf_Internal_Rela *relocs,
Elf_Internal_Sym *local_syms,
asection **local_sections)
{
Elf_Internal_Shdr *symtab_hdr;
struct elf_link_hash_entry **sym_hashes;
Elf_Internal_Rela *rel, *relend;
symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
sym_hashes = elf_sym_hashes (input_bfd);
rel = relocs;
relend = relocs + input_section->reloc_count;
for (; rel < relend; rel++)
{
int r_type;
reloc_howto_type *howto;
unsigned long r_symndx;
Elf_Internal_Sym *sym;
asection *sec;
struct elf_link_hash_entry *h;
bfd_vma relocation;
bfd_reloc_status_type r;
r_symndx = ELF32_R_SYM (rel->r_info);
r_type = ELF32_R_TYPE (rel->r_info);
howto = elf_howto_table + r_type;
h = NULL;
sym = NULL;
sec = NULL;
if (r_symndx < symtab_hdr->sh_info)
{
sym = local_syms + r_symndx;
sec = local_sections[r_symndx];
relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
}
else
{
bfd_boolean unresolved_reloc, warned, ignored;
RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
r_symndx, symtab_hdr, sym_hashes,
h, sec, relocation,
unresolved_reloc, warned, ignored);
}
if (sec != NULL && discarded_section (sec))
RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
rel, 1, relend, howto, 0, contents);
if (bfd_link_relocatable (info))
{
/* This is a relocatable link. We don't have to change
anything, unless the reloc is against a section symbol,
in which case we have to adjust according to where the
section symbol winds up in the output section. */
if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
rel->r_addend += sec->output_offset;
continue;
}
r = cr16c_elf_final_link_relocate (howto, input_bfd, output_bfd,
input_section,
contents, rel->r_offset,
relocation, rel->r_addend,
info, sec, h == NULL);
if (r != bfd_reloc_ok)
{
const char *name;
const char *msg = (const char *) 0;
if (h != NULL)
name = h->root.root.string;
else
{
name = (bfd_elf_string_from_elf_section
(input_bfd, symtab_hdr->sh_link, sym->st_name));
if (name == NULL || *name == '\0')
name = bfd_section_name (sec);
}
switch (r)
{
case bfd_reloc_overflow:
(*info->callbacks->reloc_overflow)
(info, (h ? &h->root : NULL), name, howto->name,
(bfd_vma) 0, input_bfd, input_section, rel->r_offset);
break;
case bfd_reloc_undefined:
(*info->callbacks->undefined_symbol)
(info, name, input_bfd, input_section, rel->r_offset, TRUE);
break;
case bfd_reloc_outofrange:
msg = _("internal error: out of range error");
goto common_error;
case bfd_reloc_notsupported:
msg = _("internal error: unsupported relocation error");
goto common_error;
case bfd_reloc_dangerous:
msg = _("internal error: dangerous error");
goto common_error;
default:
msg = _("internal error: unknown error");
/* fall through */
common_error:
(*info->callbacks->warning) (info, msg, name, input_bfd,
input_section, rel->r_offset);
break;
}
}
}
return TRUE;
}
/* CR16C ELF uses three common sections:
One is for default common symbols (placed in usual common section).
Second is for near common symbols (placed in "ncommon" section).
Third is for far common symbols (placed in "fcommon" section).
The following implementation is based on elf32-mips architecture */
static asection cr16c_elf_fcom_section;
static asymbol cr16c_elf_fcom_symbol;
static asymbol * cr16c_elf_fcom_symbol_ptr;
static asection cr16c_elf_ncom_section;
static asymbol cr16c_elf_ncom_symbol;
static asymbol * cr16c_elf_ncom_symbol_ptr;
/* Given a BFD section, try to locate the
corresponding ELF section index. */
static bfd_boolean
elf32_cr16c_section_from_bfd_section (bfd *abfd ATTRIBUTE_UNUSED,
asection *sec,
int *retval)
{
if (strcmp (bfd_section_name (sec), ".fcommon") == 0)
*retval = SHN_CR16C_FCOMMON;
else if (strcmp (bfd_section_name (sec), ".ncommon") == 0)
*retval = SHN_CR16C_NCOMMON;
else
return FALSE;
return TRUE;
}
/* Handle the special CR16C section numbers that a symbol may use. */
static void
elf32_cr16c_symbol_processing (bfd *abfd ATTRIBUTE_UNUSED,
asymbol *asym)
{
elf_symbol_type *elfsym = (elf_symbol_type *) asym;
unsigned int indx;
indx = elfsym->internal_elf_sym.st_shndx;
switch (indx)
{
case SHN_CR16C_FCOMMON:
if (cr16c_elf_fcom_section.name == NULL)
{
/* Initialize the far common section. */
cr16c_elf_fcom_section.name = ".fcommon";
cr16c_elf_fcom_section.flags = SEC_IS_COMMON | SEC_ALLOC;
cr16c_elf_fcom_section.output_section = &cr16c_elf_fcom_section;
cr16c_elf_fcom_section.symbol = &cr16c_elf_fcom_symbol;
cr16c_elf_fcom_section.symbol_ptr_ptr = &cr16c_elf_fcom_symbol_ptr;
cr16c_elf_fcom_symbol.name = ".fcommon";
cr16c_elf_fcom_symbol.flags = BSF_SECTION_SYM;
cr16c_elf_fcom_symbol.section = &cr16c_elf_fcom_section;
cr16c_elf_fcom_symbol_ptr = &cr16c_elf_fcom_symbol;
}
asym->section = &cr16c_elf_fcom_section;
asym->value = elfsym->internal_elf_sym.st_size;
break;
case SHN_CR16C_NCOMMON:
if (cr16c_elf_ncom_section.name == NULL)
{
/* Initialize the far common section. */
cr16c_elf_ncom_section.name = ".ncommon";
cr16c_elf_ncom_section.flags = SEC_IS_COMMON | SEC_ALLOC;
cr16c_elf_ncom_section.output_section = &cr16c_elf_ncom_section;
cr16c_elf_ncom_section.symbol = &cr16c_elf_ncom_symbol;
cr16c_elf_ncom_section.symbol_ptr_ptr = &cr16c_elf_ncom_symbol_ptr;
cr16c_elf_ncom_symbol.name = ".ncommon";
cr16c_elf_ncom_symbol.flags = BSF_SECTION_SYM;
cr16c_elf_ncom_symbol.section = &cr16c_elf_ncom_section;
cr16c_elf_ncom_symbol_ptr = &cr16c_elf_ncom_symbol;
}
asym->section = &cr16c_elf_ncom_section;
asym->value = elfsym->internal_elf_sym.st_size;
break;
}
}
/* Hook called by the linker routine which adds symbols from an object
file. We must handle the special cr16c section numbers here. */
static bfd_boolean
elf32_cr16c_add_symbol_hook (bfd *abfd,
struct bfd_link_info *info ATTRIBUTE_UNUSED,
Elf_Internal_Sym *sym,
const char **namep ATTRIBUTE_UNUSED,
flagword *flagsp ATTRIBUTE_UNUSED,
asection **secp,
bfd_vma *valp)
{
unsigned int indx = sym->st_shndx;
switch (indx)
{
case SHN_CR16C_FCOMMON:
*secp = bfd_make_section_old_way (abfd, ".fcommon");
(*secp)->flags |= SEC_IS_COMMON;
*valp = sym->st_size;
break;
case SHN_CR16C_NCOMMON:
*secp = bfd_make_section_old_way (abfd, ".ncommon");
(*secp)->flags |= SEC_IS_COMMON;
*valp = sym->st_size;
break;
}
return TRUE;
}
static int
elf32_cr16c_link_output_symbol_hook (struct bfd_link_info *info ATTRIBUTE_UNUSED,
const char *name ATTRIBUTE_UNUSED,
Elf_Internal_Sym *sym,
asection *input_sec,
struct elf_link_hash_entry *h ATTRIBUTE_UNUSED)
{
/* If we see a common symbol, which implies a relocatable link, then
if a symbol was in a special common section in an input file, mark
it as a special common in the output file. */
if (sym->st_shndx == SHN_COMMON)
{
if (strcmp (input_sec->name, ".fcommon") == 0)
sym->st_shndx = SHN_CR16C_FCOMMON;
else if (strcmp (input_sec->name, ".ncommon") == 0)
sym->st_shndx = SHN_CR16C_NCOMMON;
}
return 1;
}
/* Definitions for setting CR16C target vector. */
#define TARGET_LITTLE_SYM cr16c_elf32_vec
#define TARGET_LITTLE_NAME "elf32-cr16c"
#define ELF_ARCH bfd_arch_cr16c
#define ELF_MACHINE_CODE EM_CR
#define ELF_MAXPAGESIZE 0x1
#define elf_symbol_leading_char '_'
#define bfd_elf32_bfd_reloc_type_lookup elf_cr16c_reloc_type_lookup
#define bfd_elf32_bfd_reloc_name_lookup elf_cr16c_reloc_name_lookup
#define elf_info_to_howto elf_cr16c_info_to_howto
#define elf_info_to_howto_rel elf_cr16c_info_to_howto_rel
#define elf_backend_relocate_section elf32_cr16c_relocate_section
#define elf_backend_symbol_processing elf32_cr16c_symbol_processing
#define elf_backend_section_from_bfd_section elf32_cr16c_section_from_bfd_section
#define elf_backend_add_symbol_hook elf32_cr16c_add_symbol_hook
#define elf_backend_link_output_symbol_hook elf32_cr16c_link_output_symbol_hook
#define elf_backend_can_gc_sections 1
#include "elf32-target.h"

40
bfd/libbfd.h
View File

@ -2579,46 +2579,6 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
"BFD_RELOC_M68HC12_LO8XG",
"BFD_RELOC_M68HC12_HI8XG",
"BFD_RELOC_S12Z_15_PCREL",
"BFD_RELOC_16C_NUM08",
"BFD_RELOC_16C_NUM08_C",
"BFD_RELOC_16C_NUM16",
"BFD_RELOC_16C_NUM16_C",
"BFD_RELOC_16C_NUM32",
"BFD_RELOC_16C_NUM32_C",
"BFD_RELOC_16C_DISP04",
"BFD_RELOC_16C_DISP04_C",
"BFD_RELOC_16C_DISP08",
"BFD_RELOC_16C_DISP08_C",
"BFD_RELOC_16C_DISP16",
"BFD_RELOC_16C_DISP16_C",
"BFD_RELOC_16C_DISP24",
"BFD_RELOC_16C_DISP24_C",
"BFD_RELOC_16C_DISP24a",
"BFD_RELOC_16C_DISP24a_C",
"BFD_RELOC_16C_REG04",
"BFD_RELOC_16C_REG04_C",
"BFD_RELOC_16C_REG04a",
"BFD_RELOC_16C_REG04a_C",
"BFD_RELOC_16C_REG14",
"BFD_RELOC_16C_REG14_C",
"BFD_RELOC_16C_REG16",
"BFD_RELOC_16C_REG16_C",
"BFD_RELOC_16C_REG20",
"BFD_RELOC_16C_REG20_C",
"BFD_RELOC_16C_ABS20",
"BFD_RELOC_16C_ABS20_C",
"BFD_RELOC_16C_ABS24",
"BFD_RELOC_16C_ABS24_C",
"BFD_RELOC_16C_IMM04",
"BFD_RELOC_16C_IMM04_C",
"BFD_RELOC_16C_IMM16",
"BFD_RELOC_16C_IMM16_C",
"BFD_RELOC_16C_IMM20",
"BFD_RELOC_16C_IMM20_C",
"BFD_RELOC_16C_IMM24",
"BFD_RELOC_16C_IMM24_C",
"BFD_RELOC_16C_IMM32",
"BFD_RELOC_16C_IMM32_C",
"BFD_RELOC_CR16_NUM8",
"BFD_RELOC_CR16_NUM16",
"BFD_RELOC_CR16_NUM32",

2
bfd/po/SRC-POTFILES.in
View File

@ -53,7 +53,6 @@ cpu-avr.c
cpu-bfin.c
cpu-bpf.c
cpu-cr16.c
cpu-cr16c.c
cpu-cris.c
cpu-crx.c
cpu-csky.c
@ -165,7 +164,6 @@ elf32-bfin.c
elf32-bfin.h
elf32-cr16.c
elf32-cr16.h
elf32-cr16c.c
elf32-cris.c
elf32-crx.c
elf32-csky.c

82
bfd/reloc.c
View File

@ -5945,88 +5945,6 @@ ENUMDOC
Freescale S12Z reloc.
This is a 15 bit relative address. If the most significant bits are all zero
then it may be truncated to 8 bits.
ENUM
BFD_RELOC_16C_NUM08
ENUMX
BFD_RELOC_16C_NUM08_C
ENUMX
BFD_RELOC_16C_NUM16
ENUMX
BFD_RELOC_16C_NUM16_C
ENUMX
BFD_RELOC_16C_NUM32
ENUMX
BFD_RELOC_16C_NUM32_C
ENUMX
BFD_RELOC_16C_DISP04
ENUMX
BFD_RELOC_16C_DISP04_C
ENUMX
BFD_RELOC_16C_DISP08
ENUMX
BFD_RELOC_16C_DISP08_C
ENUMX
BFD_RELOC_16C_DISP16
ENUMX
BFD_RELOC_16C_DISP16_C
ENUMX
BFD_RELOC_16C_DISP24
ENUMX
BFD_RELOC_16C_DISP24_C
ENUMX
BFD_RELOC_16C_DISP24a
ENUMX
BFD_RELOC_16C_DISP24a_C
ENUMX
BFD_RELOC_16C_REG04
ENUMX
BFD_RELOC_16C_REG04_C
ENUMX
BFD_RELOC_16C_REG04a
ENUMX
BFD_RELOC_16C_REG04a_C
ENUMX
BFD_RELOC_16C_REG14
ENUMX
BFD_RELOC_16C_REG14_C
ENUMX
BFD_RELOC_16C_REG16
ENUMX
BFD_RELOC_16C_REG16_C
ENUMX
BFD_RELOC_16C_REG20
ENUMX
BFD_RELOC_16C_REG20_C
ENUMX
BFD_RELOC_16C_ABS20
ENUMX
BFD_RELOC_16C_ABS20_C
ENUMX
BFD_RELOC_16C_ABS24
ENUMX
BFD_RELOC_16C_ABS24_C
ENUMX
BFD_RELOC_16C_IMM04
ENUMX
BFD_RELOC_16C_IMM04_C
ENUMX
BFD_RELOC_16C_IMM16
ENUMX
BFD_RELOC_16C_IMM16_C
ENUMX
BFD_RELOC_16C_IMM20
ENUMX
BFD_RELOC_16C_IMM20_C
ENUMX
BFD_RELOC_16C_IMM24
ENUMX
BFD_RELOC_16C_IMM24_C
ENUMX
BFD_RELOC_16C_IMM32
ENUMX
BFD_RELOC_16C_IMM32_C
ENUMDOC
NS CR16C Relocations.
ENUM
BFD_RELOC_CR16_NUM8

2
bfd/targets.c
View File

@ -697,7 +697,6 @@ extern const bfd_target avr_elf32_vec;
extern const bfd_target bfin_elf32_vec;
extern const bfd_target bfin_elf32_fdpic_vec;
extern const bfd_target cr16_elf32_vec;
extern const bfd_target cr16c_elf32_vec;
extern const bfd_target cris_aout_vec;
extern const bfd_target cris_elf32_vec;
extern const bfd_target cris_elf32_us_vec;
@ -1029,7 +1028,6 @@ static const bfd_target * const _bfd_target_vector[] =
&bfin_elf32_fdpic_vec,
&cr16_elf32_vec,
&cr16c_elf32_vec,
&cris_aout_vec,
&cris_elf32_vec,

4
include/ChangeLog
View File

@ -1,3 +1,7 @@
2019-11-07 Alan Modra <amodra@gmail.com>
* elf/cr16c.h: Delete.
2019-10-29 Andrew Eikum <aeikum@codeweavers.com>
* coff/internal.h (struct internal_extra_pe_filehdr): Use ints

258
include/elf/cr16c.h
View File

@ -1,258 +0,0 @@
/* CR16C ELF support for BFD.
Copyright (C) 2004-2019 Free Software Foundation, Inc.
This file is part of BFD, the Binary File Descriptor library.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software Foundation,
Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
#ifndef _ELF_CR16C_H
#define _ELF_CR16C_H
#include "bfd.h"
#include "elf/reloc-macros.h"
/* Creating indices for reloc_map_index array. */
START_RELOC_NUMBERS (elf_cr16c_reloc_type)
RELOC_NUMBER (RINDEX_16C_NUM08, 0)
RELOC_NUMBER (RINDEX_16C_NUM08_C, 1)
RELOC_NUMBER (RINDEX_16C_NUM16, 2)
RELOC_NUMBER (RINDEX_16C_NUM16_C, 3)
RELOC_NUMBER (RINDEX_16C_NUM32, 4)
RELOC_NUMBER (RINDEX_16C_NUM32_C, 5)
RELOC_NUMBER (RINDEX_16C_DISP04, 6)
RELOC_NUMBER (RINDEX_16C_DISP04_C, 7)
RELOC_NUMBER (RINDEX_16C_DISP08, 8)
RELOC_NUMBER (RINDEX_16C_DISP08_C, 9)
RELOC_NUMBER (RINDEX_16C_DISP16, 10)
RELOC_NUMBER (RINDEX_16C_DISP16_C, 11)
RELOC_NUMBER (RINDEX_16C_DISP24, 12)
RELOC_NUMBER (RINDEX_16C_DISP24_C, 13)
RELOC_NUMBER (RINDEX_16C_DISP24a, 14)
RELOC_NUMBER (RINDEX_16C_DISP24a_C, 15)
RELOC_NUMBER (RINDEX_16C_REG04, 16)
RELOC_NUMBER (RINDEX_16C_REG04_C, 17)
RELOC_NUMBER (RINDEX_16C_REG04a, 18)
RELOC_NUMBER (RINDEX_16C_REG04a_C, 19)
RELOC_NUMBER (RINDEX_16C_REG14, 20)
RELOC_NUMBER (RINDEX_16C_REG14_C, 21)
RELOC_NUMBER (RINDEX_16C_REG16, 22)
RELOC_NUMBER (RINDEX_16C_REG16_C, 23)
RELOC_NUMBER (RINDEX_16C_REG20, 24)
RELOC_NUMBER (RINDEX_16C_REG20_C, 25)
RELOC_NUMBER (RINDEX_16C_ABS20, 26)
RELOC_NUMBER (RINDEX_16C_ABS20_C, 27)
RELOC_NUMBER (RINDEX_16C_ABS24, 28)
RELOC_NUMBER (RINDEX_16C_ABS24_C, 29)
RELOC_NUMBER (RINDEX_16C_IMM04, 30)
RELOC_NUMBER (RINDEX_16C_IMM04_C, 31)
RELOC_NUMBER (RINDEX_16C_IMM16, 32)
RELOC_NUMBER (RINDEX_16C_IMM16_C, 33)
RELOC_NUMBER (RINDEX_16C_IMM20, 34)
RELOC_NUMBER (RINDEX_16C_IMM20_C, 35)
RELOC_NUMBER (RINDEX_16C_IMM24, 36)
RELOC_NUMBER (RINDEX_16C_IMM24_C, 37)
RELOC_NUMBER (RINDEX_16C_IMM32, 38)
RELOC_NUMBER (RINDEX_16C_IMM32_C, 39)
END_RELOC_NUMBERS (RINDEX_16C_MAX)
/* CR16C Relocation Types ('cr_reloc_type' entry in the reloc_map structure).
The relocation constant name is determined as follows :
R_16C_<format><size>[_C]
Where :
<format> is one of the following:
NUM - R_NUMBER mnemonic,
DISP - R_16C_DISPL mnemonic,
REG - R_16C_REGREL mnemonic,
ABS - R_16C_ABS mnemonic,
IMM - R_16C_IMMED mnemonic,
<size> stands for R_S_16C_<size>
_C means 'code label' and is only added when R_ADDRTYPE subfield
is of type R_CODE_ADDR. */
/* The table below shows what the hex digits in the definition of the
relocation type constants correspond to.
------------------------------------------------------------------
R_SIZESP R_FORMAT R_RELTO R_ADDRTYPE
------------------------------------------------------------------ */
/* R_S_16C_08 R_NUMBER R_ABS R_ADDRESS */
#define R_16C_NUM08 0X0001
/* R_S_16C_08 R_NUMBER R_ABS R_CODE_ADDR */
#define R_16C_NUM08_C 0X0006
/* R_S_16C_16 R_NUMBER R_ABS R_ADDRESS */
#define R_16C_NUM16 0X1001
/* R_S_16C_16 R_NUMBER R_ABS R_CODE_ADDR */
#define R_16C_NUM16_C 0X1006
/* R_S_16C_32 R_NUMBER R_ABS R_ADDRESS */
#define R_16C_NUM32 0X2001
/* R_S_16C_32 R_NUMBER R_ABS R_CODE_ADDR */
#define R_16C_NUM32_C 0X2006
/* R_S_16C_04 R_16C_DISPL R_PCREL R_ADDRESS */
#define R_16C_DISP04 0X5411
/* R_S_16C_04 R_16C_DISPL R_PCREL R_CODE_ADDR */
#define R_16C_DISP04_C 0X5416
/* R_S_16C_08 R_16C_DISPL R_PCREL R_ADDRESS */
#define R_16C_DISP08 0X0411
/* R_S_16C_08 R_16C_DISPL R_PCREL R_CODE_ADDR */
#define R_16C_DISP08_C 0X0416
/* R_S_16C_16 R_16C_DISPL R_PCREL R_ADDRESS */
#define R_16C_DISP16 0X1411
/* R_S_16C_16 R_16C_DISPL R_PCREL R_CODE_ADDR */
#define R_16C_DISP16_C 0X1416
/* R_S_16C_24 R_16C_DISPL R_PCREL R_ADDRESS */
#define R_16C_DISP24 0X7411
/* R_S_16C_24 R_16C_DISPL R_PCREL R_CODE_ADDR */
#define R_16C_DISP24_C 0X7416
/* R_S_16C_24a R_16C_DISPL R_PCREL R_ADDRESS */
#define R_16C_DISP24a 0X6411
/* R_S_16C_24a R_16C_DISPL R_PCREL R_CODE_ADDR */
#define R_16C_DISP24a_C 0X6416
/* R_S_16C_04 R_16C_REGREL R_ABS R_ADDRESS */
#define R_16C_REG04 0X5201
/* R_S_16C_04 R_16C_REGREL R_ABS R_CODE_ADDR */
#define R_16C_REG04_C 0X5206
/* R_S_16C_04_a R_16C_REGREL R_ABS R_ADDRESS */
#define R_16C_REG04a 0X4201
/* R_S_16C_04_a R_16C_REGREL R_ABS R_CODE_ADDR */
#define R_16C_REG04a_C 0X4206
/* R_S_16C_14 R_16C_REGREL R_ABS R_ADDRESS */
#define R_16C_REG14 0X3201
/* R_S_16C_14 R_16C_REGREL R_ABS R_CODE_ADDR */
#define R_16C_REG14_C 0X3206
/* R_S_16C_16 R_16C_REGREL R_ABS R_ADDRESS */
#define R_16C_REG16 0X1201
/* R_S_16C_16 R_16C_REGREL R_ABS R_CODE_ADDR */
#define R_16C_REG16_C 0X1206
/* R_S_16C_20 R_16C_REGREL R_ABS R_ADDRESS */
#define R_16C_REG20 0X8201
/* R_S_16C_20 R_16C_REGREL R_ABS R_CODE_ADDR */
#define R_16C_REG20_C 0X8206
/* R_S_16C_20 R_16C_ABS R_ABS R_ADDRESS */
#define R_16C_ABS20 0X8101
/* R_S_16C_20 R_16C_ABS R_ABS R_CODE_ADDR */
#define R_16C_ABS20_C 0X8106
/* R_S_16C_24 R_16C_ABS R_ABS R_ADDRESS */
#define R_16C_ABS24 0X7101
/* R_S_16C_24 R_16C_ABS R_ABS R_CODE_ADDR */
#define R_16C_ABS24_C 0X7106
/* R_S_16C_04 R_16C_IMMED R_ABS R_ADDRESS */
#define R_16C_IMM04 0X5301
/* R_S_16C_04 R_16C_IMMED R_ABS R_CODE_ADDR */
#define R_16C_IMM04_C 0X5306
/* R_S_16C_16 R_16C_IMMED R_ABS R_ADDRESS */
#define R_16C_IMM16 0X1301
/* R_S_16C_16 R_16C_IMMED R_ABS R_CODE_ADDR */
#define R_16C_IMM16_C 0X1306
/* R_S_16C_20 R_16C_IMMED R_ABS R_ADDRESS */
#define R_16C_IMM20 0X8301
/* R_S_16C_20 R_16C_IMMED R_ABS R_CODE_ADDR */
#define R_16C_IMM20_C 0X8306
/* R_S_16C_24 R_16C_IMMED R_ABS R_ADDRESS */
#define R_16C_IMM24 0X7301
/* R_S_16C_24 R_16C_IMMED R_ABS R_CODE_ADDR */
#define R_16C_IMM24_C 0X7306
/* R_S_16C_32 R_16C_IMMED R_ABS R_ADDRESS */
#define R_16C_IMM32 0X2301
/* R_S_16C_32 R_16C_IMMED R_ABS R_CODE_ADDR */
#define R_16C_IMM32_C 0X2306
/* Relocation item type. */
#define R_ADDRTYPE 0x000f
#define R_ADDRESS 0x0001 /* Take address of symbol. */
#define R_CODE_ADDR 0x0006 /* Take address of symbol divided by 2. */
/* Relocation action. */
#define R_RELTO 0x00f0
#define R_ABS 0x0000 /* Keep symbol's address as such. */
#define R_PCREL 0x0010 /* Subtract the pc address of hole. */
/* Relocation item data format. */
#define R_FORMAT 0x0f00
#define R_NUMBER 0x0000 /* Retain as two's complement value. */
#define R_16C_DISPL 0x0400 /* CR16C displacement type. */
#define R_16C_ABS 0x0100 /* CR16C absolute type. */
#define R_16C_REGREL 0x0200 /* CR16C register-relative type. */
#define R_16C_IMMED 0x0300 /* CR16C immediate type. */
/* Relocation item size. */
#define R_SIZESP 0xf000
#define R_S_16C_04 0x5000
#define R_S_16C_04_a 0x4000
#define R_S_16C_08 0x0000
#define R_S_16C_14 0x3000
#define R_S_16C_16 0x1000
#define R_S_16C_20 0x8000
#define R_S_16C_24_a 0x6000
#define R_S_16C_24 0x7000
#define R_S_16C_32 0x2000
/* Processor specific section indices. These sections do not actually
exist. Symbols with a st_shndx field corresponding to one of these
values have a special meaning. */
/* Far common symbol. */
#define SHN_CR16C_FCOMMON SHN_LORESERVE
#define SHN_CR16C_NCOMMON (SHN_LORESERVE + 1)
typedef struct reloc_map
{
unsigned short cr_reloc_type; /* CR relocation type. */
bfd_reloc_code_real_type bfd_reloc_enum; /* BFD relocation enum. */
} RELOC_MAP;
#endif /* _ELF_CR16C_H */

10
ld/ChangeLog
View File

@ -1,3 +1,13 @@
2019-11-07 Alan Modra <amodra@gmail.com>
* emulparams/elf32cr16c.sh: Delete.
* scripttempl/elf32cr16c.sc: Delete.
* Makefile.am,
* configure.tgt: Remove cr16c support.
* NEWS: Mention removal of cr16c.
* Makefile.in,
* po/BLD-POTFILES.in: Regenerate.
2019-11-07 Alan Modra <amodra@gmail.com>
* configure.tgt: Order targets by cpu.

2
ld/Makefile.am
View File

@ -238,7 +238,6 @@ ALL_EMULATION_SOURCES = \
eelf32bfin.c \
eelf32bfinfd.c \
eelf32cr16.c \
eelf32cr16c.c \
eelf32crx.c \
eelf32epiphany.c \
eelf32epiphany_4x4.c \
@ -729,7 +728,6 @@ $(ALL_EMULATION_SOURCES) $(ALL_64_EMULATION_SOURCES): $(GEN_DEPENDS)
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32bfin.Pc@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32bfinfd.Pc@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32cr16.Pc@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32cr16c.Pc@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32crx.Pc@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32epiphany.Pc@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32epiphany_4x4.Pc@am__quote@

3
ld/Makefile.in
View File

@ -728,7 +728,6 @@ ALL_EMULATION_SOURCES = \
eelf32bfin.c \
eelf32bfinfd.c \
eelf32cr16.c \
eelf32cr16c.c \
eelf32crx.c \
eelf32epiphany.c \
eelf32epiphany_4x4.c \
@ -1296,7 +1295,6 @@ distclean-compile:
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32btsmipn32.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32btsmipn32_fbsd.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32cr16.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32cr16c.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32crx.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32ebmip.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32ebmipvxworks.Po@am__quote@
@ -2336,7 +2334,6 @@ $(ALL_EMULATION_SOURCES) $(ALL_64_EMULATION_SOURCES): $(GEN_DEPENDS)
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32bfin.Pc@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32bfinfd.Pc@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32cr16.Pc@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32cr16c.Pc@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32crx.Pc@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32epiphany.Pc@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32epiphany_4x4.Pc@am__quote@

2
ld/NEWS
View File

@ -1,5 +1,7 @@
-*- text -*-
* cr16c support removed.
Changes in 2.33:
* Add command-line option --no-print-map-discarded.

2
ld/configure.tgt
View File

@ -224,8 +224,6 @@ bpf-*-*) targ_emul=elf64bpf
;;
cr16-*-elf*) targ_emul=elf32cr16
;;
cr16c-*-elf*) targ_emul=elf32cr16c
;;
cris-*-*aout*) targ_emul=crisaout
targ_extra_emuls="criself crislinux"
targ_extra_libpath=$targ_extra_emuls

5
ld/emulparams/elf32cr16c.sh
View File

@ -1,5 +0,0 @@
SCRIPT_NAME=elf32cr16c
TEMPLATE_NAME=elf
OUTPUT_FORMAT="elf32-cr16c"
ARCH=cr16c
ENTRY=_start

1
ld/po/BLD-POTFILES.in
View File

@ -97,7 +97,6 @@ eelf32btsmip_fbsd.c
eelf32btsmipn32.c
eelf32btsmipn32_fbsd.c
eelf32cr16.c
eelf32cr16c.c
eelf32crx.c
eelf32ebmip.c
eelf32ebmipvxworks.c

66
ld/scripttempl/elf32cr16c.sc
View File

@ -1,66 +0,0 @@
# Linker Script for National Semiconductor's CR16C-ELF32.
#
# Copyright (C) 2014-2019 Free Software Foundation, Inc.
#
# Copying and distribution of this file, with or without modification,
# are permitted in any medium without royalty provided the copyright
# notice and this notice are preserved.
# Using an empty script for ld -r is better than mashing together
# sections. This hack likely leaves ld -Ur broken.
test -n "${RELOCATING}" || exit 0
test -z "$ENTRY" && ENTRY=_start
cat <<EOF
/* Example Linker Script for linking NS CR16C or CR16CPlus
elf32 files, which were compiled with either the near data
model or the default data model.
Copyright (C) 2014-2019 Free Software Foundation, Inc.
Copying and distribution of this script, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved. */
EOF
test -n "${RELOCATING}" && cat <<EOF
ENTRY(${ENTRY})
MEMORY
{
near_rom : ORIGIN = 0x4, LENGTH = 512K - 4
near_ram : ORIGIN = 512K, LENGTH = 512K - 64K
rom : ORIGIN = 1M, LENGTH = 3M
ram : ORIGIN = 4M, LENGTH = 10M
}
EOF
cat <<EOF
SECTIONS
{
/* The heap is located in near memory, to suit both the near and
default data models. The heap and stack are aligned to the bus
width, as a speed optimization for accessing data located
there. The alignment to 4 bytes is compatible for both the CR16C
bus width (2 bytes) and CR16CPlus bus width (4 bytes). */
.text : { __TEXT_START = .; *(.text) __TEXT_END = .; }${RELOCATING+ > rom}
.rdata : { __RDATA_START = .; *(.rdata_4) *(.rdata_2) *(.rdata_1) __RDATA_END = .; }${RELOCATING+ > near_rom}
.ctor ALIGN(4) : { __CTOR_LIST = .; *(.ctors) __CTOR_END = .; }${RELOCATING+ > near_rom}
.dtor ALIGN(4) : { __DTOR_LIST = .; *(.dtors) __DTOR_END = .; }${RELOCATING+ > near_rom}
.data : { __DATA_START = .; *(.data_4) *(.data_2) *(.data_1) *(.data) __DATA_END = .; }${RELOCATING+ > ram AT > rom}
.bss (NOLOAD) : { __BSS_START = .; *(.bss_4) *(.bss_2) *(.bss_1) *(.bss) *(COMMON) __BSS_END = .; }${RELOCATING+ > ram}
.nrdata : { __NRDATA_START = .; *(.nrdat_4) *(.nrdat_2) *(.nrdat_1) __NRDATA_END = .; }${RELOCATING+ > near_rom}
.ndata : { __NDATA_START = .; *(.ndata_4) *(.ndata_2) *(.ndata_1) __NDATA_END = .; }${RELOCATING+ > near_ram AT > rom}
.nbss (NOLOAD) : { __NBSS_START = .; *(.nbss_4) *(.nbss_2) *(.nbss_1) *(.ncommon) __NBSS_END = .; }${RELOCATING+ > near_ram}
.heap (NOLOAD) : { . = ALIGN(4); __HEAP_START = .; . += 0x2000; __HEAP_MAX = .; }${RELOCATING+ > near_ram}
.stack (NOLOAD) : { . = ALIGN(4); . += 0x6000; __STACK_START = .; }${RELOCATING+ > ram}
.istack (NOLOAD) : { . = ALIGN(2); . += 0x100; __ISTACK_START = .; }${RELOCATING+ > ram}
}
${RELOCATING+__DATA_IMAGE_START = LOADADDR(.data);}
${RELOCATING+__NDATA_IMAGE_START = LOADADDR(.ndata);}
EOF