gas/
2008-01-23 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (md_show_usage): Replace tabs with spaces. gas/testsuite/ 2008-01-23 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/i386.exp : Run x86-64-arch-1 and x86-64-arch-10. * gas/i386/x86-64-arch-1.d: New. * gas/i386/x86-64-arch-1.s: Likewise. * gas/i386/x86-64-arch-10.d: Likewise. opcodes/ 2008-01-23 H.J. Lu <hongjiu.lu@intel.com> * i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS. * i386-init.h: Regenerated.
This commit is contained in:
H.J. Lu
parent
2b1ed17bea
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599121aa77
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@ -1,3 +1,7 @@
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2008-01-23 H.J. Lu <hongjiu.lu@intel.com>
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* config/tc-i386.c (md_show_usage): Replace tabs with spaces.
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2008-01-23 Eric B. Weddington <eric.weddington@atmel.com>
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* config/tc-avr.c (mcu_types): Change opcode set for at86rf401.
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@ -7406,10 +7406,10 @@ md_show_usage (stream)
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pentiumii, pentiumiii, pentium4, prescott, nocona,\n\
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core, core2, k6, k6_2, athlon, k8, amdfam10,\n\
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generic32, generic64\n\
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EXTENSION is combination of:\n\
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mmx, sse, sse2, sse3, ssse3, sse4.1, sse4.2, sse4,\n\
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vmx, smx, 3dnow, 3dnowa, sse4a, sse5, svme, abm,\n\
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padlock\n"));
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EXTENSION is combination of:\n\
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mmx, sse, sse2, sse3, ssse3, sse4.1, sse4.2, sse4,\n\
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vmx, smx, 3dnow, 3dnowa, sse4a, sse5, svme, abm,\n\
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padlock\n"));
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fprintf (stream, _("\
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-mtune=CPU optimize for CPU, CPU is one of:\n\
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i8086, i186, i286, i386, i486, pentium, pentiumpro,\n\
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@ -1,3 +1,11 @@
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2008-01-23 H.J. Lu <hongjiu.lu@intel.com>
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* gas/i386/i386.exp : Run x86-64-arch-1 and x86-64-arch-10.
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* gas/i386/x86-64-arch-1.d: New.
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* gas/i386/x86-64-arch-1.s: Likewise.
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* gas/i386/x86-64-arch-10.d: Likewise.
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2008-01-23 Tristan Gingold <gingold@adacore.com>
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* gas/ia64/regs.d: Updated as the ia64 disassembler now displays
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@ -224,6 +224,8 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t
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run_dump_test "x86-64-opcode-inval"
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run_dump_test "x86-64-opcode-inval-intel"
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run_dump_test "rexw"
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run_dump_test "x86-64-arch-1"
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run_dump_test "x86-64-arch-10"
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if { ![istarget "*-*-aix*"]
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&& ![istarget "*-*-beos*"]
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@ -0,0 +1,15 @@
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#objdump: -dw
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#name: x86-64 arch 1
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.*: file format .*
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Disassembly of section .text:
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0+ <.text>:
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[ ]*[a-f0-9]+: 66 0f 38 17 c1 ptest %xmm1,%xmm0
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[ ]*[a-f0-9]+: 66 0f 3a 09 c1 00 roundpd \$0x0,%xmm1,%xmm0
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[ ]*[a-f0-9]+: 66 0f 3a 08 c1 00 roundps \$0x0,%xmm1,%xmm0
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[ ]*[a-f0-9]+: 66 0f 3a 0b c1 00 roundsd \$0x0,%xmm1,%xmm0
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[ ]*[a-f0-9]+: 66 0f 3a 0a c1 00 roundss \$0x0,%xmm1,%xmm0
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[ ]*[a-f0-9]+: 66 0f 38 41 d9 phminposuw %xmm1,%xmm3
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#pass
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@ -0,0 +1,9 @@
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# Test .arch .sse4.1
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.arch generic64
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.arch .sse4.1
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ptest %xmm1,%xmm0
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roundpd $0,%xmm1,%xmm0
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roundps $0,%xmm1,%xmm0
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roundsd $0,%xmm1,%xmm0
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roundss $0,%xmm1,%xmm0
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phminposuw %xmm1,%xmm3
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@ -0,0 +1,28 @@
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#source: arch-10.s
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#as: -march=generic64+sse4+vmx+smx+sse5+3dnowa+svme+padlock
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#objdump: -dw
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#name: x86-64 arch 10
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.*: file format .*
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Disassembly of section .text:
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0+ <.text>:
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[ ]*[a-f0-9]+: 0f 44 d8 cmove %eax,%ebx
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[ ]*[a-f0-9]+: 0f fc dc paddb %mm4,%mm3
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[ ]*[a-f0-9]+: f3 0f 58 dc addss %xmm4,%xmm3
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[ ]*[a-f0-9]+: f2 0f 58 dc addsd %xmm4,%xmm3
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[ ]*[a-f0-9]+: 66 0f d0 dc addsubpd %xmm4,%xmm3
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[ ]*[a-f0-9]+: 66 0f 38 01 dc phaddw %xmm4,%xmm3
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[ ]*[a-f0-9]+: 66 0f 38 41 d9 phminposuw %xmm1,%xmm3
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[ ]*[a-f0-9]+: f2 0f 38 f1 d9 crc32l %ecx,%ebx
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[ ]*[a-f0-9]+: 0f 01 c4 vmxoff
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[ ]*[a-f0-9]+: 0f 37 getsec
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[ ]*[a-f0-9]+: 0f 0f dc b7 pmulhrw %mm4,%mm3
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[ ]*[a-f0-9]+: 0f 0f dc bb pswapd %mm4,%mm3
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[ ]*[a-f0-9]+: f2 0f 79 ca insertq %xmm2,%xmm1
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[ ]*[a-f0-9]+: 0f 01 da vmload
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[ ]*[a-f0-9]+: f3 0f bd d9 lzcnt %ecx,%ebx
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[ ]*[a-f0-9]+: 0f 7a 12 ca frczss %xmm2,%xmm1
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[ ]*[a-f0-9]+: 0f a7 c0 xstore-rng
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#pass
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@ -1,3 +1,8 @@
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2008-01-23 H.J. Lu <hongjiu.lu@intel.com>
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* i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
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* i386-init.h: Regenerated.
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2008-01-23 Tristan Gingold <gingold@adacore.com>
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* ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr,
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@ -45,7 +45,7 @@ static initializer cpu_flag_init [] =
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{ "CPU_GENERIC32_FLAGS",
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"Cpu186|Cpu286|Cpu386" },
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{ "CPU_GENERIC64_FLAGS",
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"Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuP4|CpuMMX|CpuSSE|CpuSSE2" },
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"Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuP4|CpuMMX|CpuSSE|CpuSSE2|CpuLM" },
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{ "CPU_NONE_FLAGS",
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"0" },
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{ "CPU_I186_FLAGS",
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@ -28,7 +28,7 @@
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#define CPU_GENERIC64_FLAGS \
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{ { 1, 1, 1, 1, 1, 1, 1, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, \
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0, 0, 0, 0, 0, 0, 0, 0, 0 } }
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0, 0, 0, 0, 0, 1, 0, 0, 0 } }
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#define CPU_NONE_FLAGS \
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{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
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