2010-09-17 Tejas Belagod <tejas.belagod@arm.com>
* config/tc-arm.c (parse_psr): Add condition for matching "APSR" on non-M-arch cpus. (psrs): Add entry for PSR flags, g, nzcvq, nzcvqg. 2010-09-17 Tejas Belagod <tejas.belagod@arm.com> * gas/arm/msr-reg.s: New file. * gas/arm/msr-reg.d: Likewise. * gas/arm/msr-imm.s: Likewise. * gas/arm/msr-imm.d: Likewise. * gas/arm/msr-imm-bad.d: Likewise. * gas/arm/msr-imm-bad.l: Likewise. * gas/arm/msr-reg-bad.d: Likewise. * gas/arm/msr-imm-bad.d: Likewise. * gas/arm/msr-reg-thumb.d: Likewise. * gas/arm/arch7.s: Add tests for xpsr. * gas/arm/arch7.d: Likewise.
This commit is contained in:
Matthew Gretton-Dann
parent
db472d6ff0
commit
59b42a0df4
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@ -1,3 +1,9 @@
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2010-09-17 Tejas Belagod <tejas.belagod@arm.com>
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* config/tc-arm.c (parse_psr): Add condition for matching "APSR" on
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non-M-arch cpus.
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(psrs): Add entry for PSR flags, g, nzcvq, nzcvqg.
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2010-09-17 Tejas Belagod <tejas.belagod@arm.com>
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* config/tc-arm.c (insns): Change MRC entry to accept APSR_RR instead
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@ -5321,7 +5321,9 @@ parse_psr (char **str)
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p = *str;
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if (strncasecmp (p, "SPSR", 4) == 0)
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psr_field = SPSR_BIT;
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else if (strncasecmp (p, "CPSR", 4) == 0)
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else if (strncasecmp (p, "CPSR", 4) == 0
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|| (strncasecmp (p, "APSR", 4) == 0
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&& !ARM_CPU_HAS_FEATURE (selected_cpu, arm_ext_m)))
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psr_field = 0;
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else
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{
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@ -16214,6 +16216,8 @@ static const struct asm_psr psrs[] =
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{"c", PSR_c},
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{"x", PSR_x},
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{"s", PSR_s},
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{"g", PSR_s},
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/* Combinations of flags. */
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{"fs", PSR_f | PSR_s},
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{"fx", PSR_f | PSR_x},
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@ -16275,6 +16279,10 @@ static const struct asm_psr psrs[] =
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{"csxf", PSR_c | PSR_s | PSR_x | PSR_f},
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{"cxfs", PSR_c | PSR_x | PSR_f | PSR_s},
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{"cxsf", PSR_c | PSR_x | PSR_s | PSR_f},
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/* APSR flags */
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{"nzcvq", PSR_f},
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{"nzcvqg", PSR_s | PSR_f}
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};
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/* Table of V7M psr names. */
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@ -1,3 +1,17 @@
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2010-09-17 Tejas Belagod <tejas.belagod@arm.com>
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* gas/arm/msr-reg.s: New file.
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* gas/arm/msr-reg.d: Likewise.
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* gas/arm/msr-imm.s: Likewise.
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* gas/arm/msr-imm.d: Likewise.
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* gas/arm/msr-imm-bad.d: Likewise.
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* gas/arm/msr-imm-bad.l: Likewise.
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* gas/arm/msr-reg-bad.d: Likewise.
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* gas/arm/msr-imm-bad.d: Likewise.
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* gas/arm/msr-reg-thumb.d: Likewise.
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* gas/arm/arch7.s: Add tests for xpsr.
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* gas/arm/arch7.d: Likewise.
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2010-09-17 Tejas Belagod <tejas.belagod@arm.com>
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* gas/arm/copro.s: Add test for APSR_nzcv as a MRC operand.
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@ -74,3 +74,5 @@ Disassembly of section .text:
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0+104 <[^>]*> f380 8812 msr BASEPRI_MASK, r0
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0+108 <[^>]*> f380 8813 msr FAULTMASK, r0
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0+10c <[^>]*> f380 8814 msr CONTROL, r0
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0+110 <[^>]*> f3ef 8003 mrs r0, PSR
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0+114 <[^>]*> f380 8803 msr PSR, r0
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@ -77,3 +77,5 @@ label2:
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msr basepri_max, r0
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msr faultmask, r0
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msr control, r0
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mrs r0, xpsr
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msr xpsr, r0
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@ -0,0 +1,5 @@
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# name: Cannot use MSR with immediates in thumb mode.
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# skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd
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# error-output: msr-imm-bad.l
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# source: msr-imm.s
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# as: -march=armv7-a -mthumb
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@ -0,0 +1,135 @@
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[^:]*: Assembler messages:
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[^:]*:9: Error: Thumb encoding does not support an immediate here -- `msr APSR,#0xc0000004'
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[^:]*:10: Error: Thumb encoding does not support an immediate here -- `msr APSR_g,#0xc0000004'
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[^:]*:11: Error: Thumb encoding does not support an immediate here -- `msr APSR_nzcvq,#0xc0000004'
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[^:]*:12: Error: Thumb encoding does not support an immediate here -- `msr APSR_nzcvqg,#0xc0000004'
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[^:]*:15: Error: Thumb encoding does not support an immediate here -- `msr CPSR,#0xc0000004'
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[^:]*:16: Error: Thumb encoding does not support an immediate here -- `msr CPSR_s,#0xc0000004'
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[^:]*:17: Error: Thumb encoding does not support an immediate here -- `msr CPSR_f,#0xc0000004'
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[^:]*:18: Error: Thumb encoding does not support an immediate here -- `msr CPSR_c,#0xc0000004'
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[^:]*:19: Error: Thumb encoding does not support an immediate here -- `msr CPSR_x,#0xc0000004'
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[^:]*:22: Error: Thumb encoding does not support an immediate here -- `msr CPSR_fs,#0xc0000004'
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[^:]*:23: Error: Thumb encoding does not support an immediate here -- `msr CPSR_fx,#0xc0000004'
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[^:]*:24: Error: Thumb encoding does not support an immediate here -- `msr CPSR_fc,#0xc0000004'
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[^:]*:25: Error: Thumb encoding does not support an immediate here -- `msr CPSR_sf,#0xc0000004'
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[^:]*:26: Error: Thumb encoding does not support an immediate here -- `msr CPSR_sx,#0xc0000004'
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[^:]*:27: Error: Thumb encoding does not support an immediate here -- `msr CPSR_sc,#0xc0000004'
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[^:]*:28: Error: Thumb encoding does not support an immediate here -- `msr CPSR_xf,#0xc0000004'
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[^:]*:29: Error: Thumb encoding does not support an immediate here -- `msr CPSR_xs,#0xc0000004'
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[^:]*:30: Error: Thumb encoding does not support an immediate here -- `msr CPSR_xc,#0xc0000004'
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[^:]*:31: Error: Thumb encoding does not support an immediate here -- `msr CPSR_cf,#0xc0000004'
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[^:]*:32: Error: Thumb encoding does not support an immediate here -- `msr CPSR_cs,#0xc0000004'
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[^:]*:33: Error: Thumb encoding does not support an immediate here -- `msr CPSR_cx,#0xc0000004'
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[^:]*:34: Error: Thumb encoding does not support an immediate here -- `msr CPSR_fsx,#0xc0000004'
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[^:]*:35: Error: Thumb encoding does not support an immediate here -- `msr CPSR_fsc,#0xc0000004'
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[^:]*:36: Error: Thumb encoding does not support an immediate here -- `msr CPSR_fxs,#0xc0000004'
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[^:]*:37: Error: Thumb encoding does not support an immediate here -- `msr CPSR_fxc,#0xc0000004'
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[^:]*:38: Error: Thumb encoding does not support an immediate here -- `msr CPSR_fcs,#0xc0000004'
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[^:]*:39: Error: Thumb encoding does not support an immediate here -- `msr CPSR_fcx,#0xc0000004'
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[^:]*:40: Error: Thumb encoding does not support an immediate here -- `msr CPSR_sfx,#0xc0000004'
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[^:]*:41: Error: Thumb encoding does not support an immediate here -- `msr CPSR_sfc,#0xc0000004'
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[^:]*:42: Error: Thumb encoding does not support an immediate here -- `msr CPSR_sxf,#0xc0000004'
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[^:]*:43: Error: Thumb encoding does not support an immediate here -- `msr CPSR_sxc,#0xc0000004'
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[^:]*:44: Error: Thumb encoding does not support an immediate here -- `msr CPSR_scf,#0xc0000004'
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[^:]*:45: Error: Thumb encoding does not support an immediate here -- `msr CPSR_scx,#0xc0000004'
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[^:]*:46: Error: Thumb encoding does not support an immediate here -- `msr CPSR_xfs,#0xc0000004'
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[^:]*:47: Error: Thumb encoding does not support an immediate here -- `msr CPSR_xfc,#0xc0000004'
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[^:]*:48: Error: Thumb encoding does not support an immediate here -- `msr CPSR_xsf,#0xc0000004'
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[^:]*:49: Error: Thumb encoding does not support an immediate here -- `msr CPSR_xsc,#0xc0000004'
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[^:]*:50: Error: Thumb encoding does not support an immediate here -- `msr CPSR_xcf,#0xc0000004'
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[^:]*:51: Error: Thumb encoding does not support an immediate here -- `msr CPSR_xcs,#0xc0000004'
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[^:]*:52: Error: Thumb encoding does not support an immediate here -- `msr CPSR_cfs,#0xc0000004'
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[^:]*:53: Error: Thumb encoding does not support an immediate here -- `msr CPSR_cfx,#0xc0000004'
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[^:]*:54: Error: Thumb encoding does not support an immediate here -- `msr CPSR_csf,#0xc0000004'
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[^:]*:55: Error: Thumb encoding does not support an immediate here -- `msr CPSR_csx,#0xc0000004'
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[^:]*:56: Error: Thumb encoding does not support an immediate here -- `msr CPSR_cxf,#0xc0000004'
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[^:]*:57: Error: Thumb encoding does not support an immediate here -- `msr CPSR_cxs,#0xc0000004'
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[^:]*:58: Error: Thumb encoding does not support an immediate here -- `msr CPSR_fsxc,#0xc0000004'
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[^:]*:59: Error: Thumb encoding does not support an immediate here -- `msr CPSR_fscx,#0xc0000004'
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[^:]*:60: Error: Thumb encoding does not support an immediate here -- `msr CPSR_fxsc,#0xc0000004'
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[^:]*:61: Error: Thumb encoding does not support an immediate here -- `msr CPSR_fxcs,#0xc0000004'
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[^:]*:62: Error: Thumb encoding does not support an immediate here -- `msr CPSR_fcsx,#0xc0000004'
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[^:]*:63: Error: Thumb encoding does not support an immediate here -- `msr CPSR_fcxs,#0xc0000004'
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[^:]*:64: Error: Thumb encoding does not support an immediate here -- `msr CPSR_sfxc,#0xc0000004'
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[^:]*:65: Error: Thumb encoding does not support an immediate here -- `msr CPSR_sfcx,#0xc0000004'
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[^:]*:66: Error: Thumb encoding does not support an immediate here -- `msr CPSR_sxfc,#0xc0000004'
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[^:]*:67: Error: Thumb encoding does not support an immediate here -- `msr CPSR_sxcf,#0xc0000004'
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[^:]*:68: Error: Thumb encoding does not support an immediate here -- `msr CPSR_scfx,#0xc0000004'
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[^:]*:69: Error: Thumb encoding does not support an immediate here -- `msr CPSR_scxf,#0xc0000004'
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[^:]*:70: Error: Thumb encoding does not support an immediate here -- `msr CPSR_xfsc,#0xc0000004'
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[^:]*:71: Error: Thumb encoding does not support an immediate here -- `msr CPSR_xfcs,#0xc0000004'
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[^:]*:72: Error: Thumb encoding does not support an immediate here -- `msr CPSR_xsfc,#0xc0000004'
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[^:]*:73: Error: Thumb encoding does not support an immediate here -- `msr CPSR_xscf,#0xc0000004'
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[^:]*:74: Error: Thumb encoding does not support an immediate here -- `msr CPSR_xcfs,#0xc0000004'
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[^:]*:75: Error: Thumb encoding does not support an immediate here -- `msr CPSR_xcsf,#0xc0000004'
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[^:]*:76: Error: Thumb encoding does not support an immediate here -- `msr CPSR_cfsx,#0xc0000004'
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[^:]*:77: Error: Thumb encoding does not support an immediate here -- `msr CPSR_cfxs,#0xc0000004'
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[^:]*:78: Error: Thumb encoding does not support an immediate here -- `msr CPSR_csfx,#0xc0000004'
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[^:]*:79: Error: Thumb encoding does not support an immediate here -- `msr CPSR_csxf,#0xc0000004'
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[^:]*:80: Error: Thumb encoding does not support an immediate here -- `msr CPSR_cxfs,#0xc0000004'
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[^:]*:81: Error: Thumb encoding does not support an immediate here -- `msr CPSR_cxsf,#0xc0000004'
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[^:]*:85: Error: Thumb encoding does not support an immediate here -- `msr SPSR,#0xc0000004'
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[^:]*:86: Error: Thumb encoding does not support an immediate here -- `msr SPSR_s,#0xc0000004'
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[^:]*:87: Error: Thumb encoding does not support an immediate here -- `msr SPSR_f,#0xc0000004'
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[^:]*:88: Error: Thumb encoding does not support an immediate here -- `msr SPSR_c,#0xc0000004'
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[^:]*:89: Error: Thumb encoding does not support an immediate here -- `msr SPSR_x,#0xc0000004'
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[^:]*:92: Error: Thumb encoding does not support an immediate here -- `msr SPSR_fs,#0xc0000004'
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[^:]*:93: Error: Thumb encoding does not support an immediate here -- `msr SPSR_fx,#0xc0000004'
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[^:]*:94: Error: Thumb encoding does not support an immediate here -- `msr SPSR_fc,#0xc0000004'
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[^:]*:95: Error: Thumb encoding does not support an immediate here -- `msr SPSR_sf,#0xc0000004'
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[^:]*:96: Error: Thumb encoding does not support an immediate here -- `msr SPSR_sx,#0xc0000004'
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[^:]*:97: Error: Thumb encoding does not support an immediate here -- `msr SPSR_sc,#0xc0000004'
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[^:]*:98: Error: Thumb encoding does not support an immediate here -- `msr SPSR_xf,#0xc0000004'
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[^:]*:99: Error: Thumb encoding does not support an immediate here -- `msr SPSR_xs,#0xc0000004'
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[^:]*:100: Error: Thumb encoding does not support an immediate here -- `msr SPSR_xc,#0xc0000004'
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[^:]*:101: Error: Thumb encoding does not support an immediate here -- `msr SPSR_cf,#0xc0000004'
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[^:]*:102: Error: Thumb encoding does not support an immediate here -- `msr SPSR_cs,#0xc0000004'
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[^:]*:103: Error: Thumb encoding does not support an immediate here -- `msr SPSR_cx,#0xc0000004'
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[^:]*:104: Error: Thumb encoding does not support an immediate here -- `msr SPSR_fsx,#0xc0000004'
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[^:]*:105: Error: Thumb encoding does not support an immediate here -- `msr SPSR_fsc,#0xc0000004'
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[^:]*:106: Error: Thumb encoding does not support an immediate here -- `msr SPSR_fxs,#0xc0000004'
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[^:]*:107: Error: Thumb encoding does not support an immediate here -- `msr SPSR_fxc,#0xc0000004'
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[^:]*:108: Error: Thumb encoding does not support an immediate here -- `msr SPSR_fcs,#0xc0000004'
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[^:]*:109: Error: Thumb encoding does not support an immediate here -- `msr SPSR_fcx,#0xc0000004'
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[^:]*:110: Error: Thumb encoding does not support an immediate here -- `msr SPSR_sfx,#0xc0000004'
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[^:]*:111: Error: Thumb encoding does not support an immediate here -- `msr SPSR_sfc,#0xc0000004'
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[^:]*:112: Error: Thumb encoding does not support an immediate here -- `msr SPSR_sxf,#0xc0000004'
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[^:]*:113: Error: Thumb encoding does not support an immediate here -- `msr SPSR_sxc,#0xc0000004'
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[^:]*:114: Error: Thumb encoding does not support an immediate here -- `msr SPSR_scf,#0xc0000004'
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[^:]*:115: Error: Thumb encoding does not support an immediate here -- `msr SPSR_scx,#0xc0000004'
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[^:]*:116: Error: Thumb encoding does not support an immediate here -- `msr SPSR_xfs,#0xc0000004'
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[^:]*:117: Error: Thumb encoding does not support an immediate here -- `msr SPSR_xfc,#0xc0000004'
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[^:]*:118: Error: Thumb encoding does not support an immediate here -- `msr SPSR_xsf,#0xc0000004'
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[^:]*:119: Error: Thumb encoding does not support an immediate here -- `msr SPSR_xsc,#0xc0000004'
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[^:]*:120: Error: Thumb encoding does not support an immediate here -- `msr SPSR_xcf,#0xc0000004'
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[^:]*:121: Error: Thumb encoding does not support an immediate here -- `msr SPSR_xcs,#0xc0000004'
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[^:]*:122: Error: Thumb encoding does not support an immediate here -- `msr SPSR_cfs,#0xc0000004'
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[^:]*:123: Error: Thumb encoding does not support an immediate here -- `msr SPSR_cfx,#0xc0000004'
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[^:]*:124: Error: Thumb encoding does not support an immediate here -- `msr SPSR_csf,#0xc0000004'
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[^:]*:125: Error: Thumb encoding does not support an immediate here -- `msr SPSR_csx,#0xc0000004'
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[^:]*:126: Error: Thumb encoding does not support an immediate here -- `msr SPSR_cxf,#0xc0000004'
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[^:]*:127: Error: Thumb encoding does not support an immediate here -- `msr SPSR_cxs,#0xc0000004'
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[^:]*:128: Error: Thumb encoding does not support an immediate here -- `msr SPSR_fsxc,#0xc0000004'
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[^:]*:129: Error: Thumb encoding does not support an immediate here -- `msr SPSR_fscx,#0xc0000004'
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[^:]*:130: Error: Thumb encoding does not support an immediate here -- `msr SPSR_fxsc,#0xc0000004'
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[^:]*:131: Error: Thumb encoding does not support an immediate here -- `msr SPSR_fxcs,#0xc0000004'
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[^:]*:132: Error: Thumb encoding does not support an immediate here -- `msr SPSR_fcsx,#0xc0000004'
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[^:]*:133: Error: Thumb encoding does not support an immediate here -- `msr SPSR_fcxs,#0xc0000004'
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[^:]*:134: Error: Thumb encoding does not support an immediate here -- `msr SPSR_sfxc,#0xc0000004'
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[^:]*:135: Error: Thumb encoding does not support an immediate here -- `msr SPSR_sfcx,#0xc0000004'
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[^:]*:136: Error: Thumb encoding does not support an immediate here -- `msr SPSR_sxfc,#0xc0000004'
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[^:]*:137: Error: Thumb encoding does not support an immediate here -- `msr SPSR_sxcf,#0xc0000004'
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[^:]*:138: Error: Thumb encoding does not support an immediate here -- `msr SPSR_scfx,#0xc0000004'
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[^:]*:139: Error: Thumb encoding does not support an immediate here -- `msr SPSR_scxf,#0xc0000004'
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[^:]*:140: Error: Thumb encoding does not support an immediate here -- `msr SPSR_xfsc,#0xc0000004'
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[^:]*:141: Error: Thumb encoding does not support an immediate here -- `msr SPSR_xfcs,#0xc0000004'
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[^:]*:142: Error: Thumb encoding does not support an immediate here -- `msr SPSR_xsfc,#0xc0000004'
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[^:]*:143: Error: Thumb encoding does not support an immediate here -- `msr SPSR_xscf,#0xc0000004'
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[^:]*:144: Error: Thumb encoding does not support an immediate here -- `msr SPSR_xcfs,#0xc0000004'
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[^:]*:145: Error: Thumb encoding does not support an immediate here -- `msr SPSR_xcsf,#0xc0000004'
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[^:]*:146: Error: Thumb encoding does not support an immediate here -- `msr SPSR_cfsx,#0xc0000004'
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[^:]*:147: Error: Thumb encoding does not support an immediate here -- `msr SPSR_cfxs,#0xc0000004'
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[^:]*:148: Error: Thumb encoding does not support an immediate here -- `msr SPSR_csfx,#0xc0000004'
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[^:]*:149: Error: Thumb encoding does not support an immediate here -- `msr SPSR_csxf,#0xc0000004'
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[^:]*:150: Error: Thumb encoding does not support an immediate here -- `msr SPSR_cxfs,#0xc0000004'
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[^:]*:151: Error: Thumb encoding does not support an immediate here -- `msr SPSR_cxsf,#0xc0000004'
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|
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@ -0,0 +1,141 @@
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# name: MSR immediate operands
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# as: -march=armv7-a
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# objdump: -dr --prefix-addresses --show-raw-insn
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.*: +file format .*arm.*
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Disassembly of section .text:
|
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00000000 <[^>]*> e329f113 msr CPSR_fc, #-1073741820 ; 0xc0000004
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00000004 <[^>]*> e324f113 msr CPSR_s, #-1073741820 ; 0xc0000004
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00000008 <[^>]*> e328f113 msr CPSR_f, #-1073741820 ; 0xc0000004
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0000000c <[^>]*> e32cf113 msr CPSR_fs, #-1073741820 ; 0xc0000004
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00000010 <[^>]*> e329f113 msr CPSR_fc, #-1073741820 ; 0xc0000004
|
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00000014 <[^>]*> e324f113 msr CPSR_s, #-1073741820 ; 0xc0000004
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00000018 <[^>]*> e328f113 msr CPSR_f, #-1073741820 ; 0xc0000004
|
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0000001c <[^>]*> e321f113 msr CPSR_c, #-1073741820 ; 0xc0000004
|
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00000020 <[^>]*> e322f113 msr CPSR_x, #-1073741820 ; 0xc0000004
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00000024 <[^>]*> e32cf113 msr CPSR_fs, #-1073741820 ; 0xc0000004
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00000028 <[^>]*> e32af113 msr CPSR_fx, #-1073741820 ; 0xc0000004
|
||||
0000002c <[^>]*> e329f113 msr CPSR_fc, #-1073741820 ; 0xc0000004
|
||||
00000030 <[^>]*> e32cf113 msr CPSR_fs, #-1073741820 ; 0xc0000004
|
||||
00000034 <[^>]*> e326f113 msr CPSR_sx, #-1073741820 ; 0xc0000004
|
||||
00000038 <[^>]*> e325f113 msr CPSR_sc, #-1073741820 ; 0xc0000004
|
||||
0000003c <[^>]*> e32af113 msr CPSR_fx, #-1073741820 ; 0xc0000004
|
||||
00000040 <[^>]*> e326f113 msr CPSR_sx, #-1073741820 ; 0xc0000004
|
||||
00000044 <[^>]*> e323f113 msr CPSR_xc, #-1073741820 ; 0xc0000004
|
||||
00000048 <[^>]*> e329f113 msr CPSR_fc, #-1073741820 ; 0xc0000004
|
||||
0000004c <[^>]*> e325f113 msr CPSR_sc, #-1073741820 ; 0xc0000004
|
||||
00000050 <[^>]*> e323f113 msr CPSR_xc, #-1073741820 ; 0xc0000004
|
||||
00000054 <[^>]*> e32ef113 msr CPSR_fsx, #-1073741820 ; 0xc0000004
|
||||
00000058 <[^>]*> e32df113 msr CPSR_fsc, #-1073741820 ; 0xc0000004
|
||||
0000005c <[^>]*> e32ef113 msr CPSR_fsx, #-1073741820 ; 0xc0000004
|
||||
00000060 <[^>]*> e32bf113 msr CPSR_fxc, #-1073741820 ; 0xc0000004
|
||||
00000064 <[^>]*> e32df113 msr CPSR_fsc, #-1073741820 ; 0xc0000004
|
||||
00000068 <[^>]*> e32bf113 msr CPSR_fxc, #-1073741820 ; 0xc0000004
|
||||
0000006c <[^>]*> e32ef113 msr CPSR_fsx, #-1073741820 ; 0xc0000004
|
||||
00000070 <[^>]*> e32df113 msr CPSR_fsc, #-1073741820 ; 0xc0000004
|
||||
00000074 <[^>]*> e32ef113 msr CPSR_fsx, #-1073741820 ; 0xc0000004
|
||||
00000078 <[^>]*> e327f113 msr CPSR_sxc, #-1073741820 ; 0xc0000004
|
||||
0000007c <[^>]*> e32df113 msr CPSR_fsc, #-1073741820 ; 0xc0000004
|
||||
00000080 <[^>]*> e327f113 msr CPSR_sxc, #-1073741820 ; 0xc0000004
|
||||
00000084 <[^>]*> e32ef113 msr CPSR_fsx, #-1073741820 ; 0xc0000004
|
||||
00000088 <[^>]*> e32bf113 msr CPSR_fxc, #-1073741820 ; 0xc0000004
|
||||
0000008c <[^>]*> e32ef113 msr CPSR_fsx, #-1073741820 ; 0xc0000004
|
||||
00000090 <[^>]*> e327f113 msr CPSR_sxc, #-1073741820 ; 0xc0000004
|
||||
00000094 <[^>]*> e32bf113 msr CPSR_fxc, #-1073741820 ; 0xc0000004
|
||||
00000098 <[^>]*> e327f113 msr CPSR_sxc, #-1073741820 ; 0xc0000004
|
||||
0000009c <[^>]*> e32df113 msr CPSR_fsc, #-1073741820 ; 0xc0000004
|
||||
000000a0 <[^>]*> e32bf113 msr CPSR_fxc, #-1073741820 ; 0xc0000004
|
||||
000000a4 <[^>]*> e32df113 msr CPSR_fsc, #-1073741820 ; 0xc0000004
|
||||
000000a8 <[^>]*> e327f113 msr CPSR_sxc, #-1073741820 ; 0xc0000004
|
||||
000000ac <[^>]*> e32bf113 msr CPSR_fxc, #-1073741820 ; 0xc0000004
|
||||
000000b0 <[^>]*> e327f113 msr CPSR_sxc, #-1073741820 ; 0xc0000004
|
||||
000000b4 <[^>]*> e32ff113 msr CPSR_fsxc, #-1073741820 ; 0xc0000004
|
||||
000000b8 <[^>]*> e32ff113 msr CPSR_fsxc, #-1073741820 ; 0xc0000004
|
||||
000000bc <[^>]*> e32ff113 msr CPSR_fsxc, #-1073741820 ; 0xc0000004
|
||||
000000c0 <[^>]*> e32ff113 msr CPSR_fsxc, #-1073741820 ; 0xc0000004
|
||||
000000c4 <[^>]*> e32ff113 msr CPSR_fsxc, #-1073741820 ; 0xc0000004
|
||||
000000c8 <[^>]*> e32ff113 msr CPSR_fsxc, #-1073741820 ; 0xc0000004
|
||||
000000cc <[^>]*> e32ff113 msr CPSR_fsxc, #-1073741820 ; 0xc0000004
|
||||
000000d0 <[^>]*> e32ff113 msr CPSR_fsxc, #-1073741820 ; 0xc0000004
|
||||
000000d4 <[^>]*> e32ff113 msr CPSR_fsxc, #-1073741820 ; 0xc0000004
|
||||
000000d8 <[^>]*> e32ff113 msr CPSR_fsxc, #-1073741820 ; 0xc0000004
|
||||
000000dc <[^>]*> e32ff113 msr CPSR_fsxc, #-1073741820 ; 0xc0000004
|
||||
000000e0 <[^>]*> e32ff113 msr CPSR_fsxc, #-1073741820 ; 0xc0000004
|
||||
000000e4 <[^>]*> e32ff113 msr CPSR_fsxc, #-1073741820 ; 0xc0000004
|
||||
000000e8 <[^>]*> e32ff113 msr CPSR_fsxc, #-1073741820 ; 0xc0000004
|
||||
000000ec <[^>]*> e32ff113 msr CPSR_fsxc, #-1073741820 ; 0xc0000004
|
||||
000000f0 <[^>]*> e32ff113 msr CPSR_fsxc, #-1073741820 ; 0xc0000004
|
||||
000000f4 <[^>]*> e32ff113 msr CPSR_fsxc, #-1073741820 ; 0xc0000004
|
||||
000000f8 <[^>]*> e32ff113 msr CPSR_fsxc, #-1073741820 ; 0xc0000004
|
||||
000000fc <[^>]*> e32ff113 msr CPSR_fsxc, #-1073741820 ; 0xc0000004
|
||||
00000100 <[^>]*> e32ff113 msr CPSR_fsxc, #-1073741820 ; 0xc0000004
|
||||
00000104 <[^>]*> e32ff113 msr CPSR_fsxc, #-1073741820 ; 0xc0000004
|
||||
00000108 <[^>]*> e32ff113 msr CPSR_fsxc, #-1073741820 ; 0xc0000004
|
||||
0000010c <[^>]*> e32ff113 msr CPSR_fsxc, #-1073741820 ; 0xc0000004
|
||||
00000110 <[^>]*> e32ff113 msr CPSR_fsxc, #-1073741820 ; 0xc0000004
|
||||
00000114 <[^>]*> e369f113 msr SPSR_fc, #-1073741820 ; 0xc0000004
|
||||
00000118 <[^>]*> e364f113 msr SPSR_s, #-1073741820 ; 0xc0000004
|
||||
0000011c <[^>]*> e368f113 msr SPSR_f, #-1073741820 ; 0xc0000004
|
||||
00000120 <[^>]*> e361f113 msr SPSR_c, #-1073741820 ; 0xc0000004
|
||||
00000124 <[^>]*> e362f113 msr SPSR_x, #-1073741820 ; 0xc0000004
|
||||
00000128 <[^>]*> e36cf113 msr SPSR_fs, #-1073741820 ; 0xc0000004
|
||||
0000012c <[^>]*> e36af113 msr SPSR_fx, #-1073741820 ; 0xc0000004
|
||||
00000130 <[^>]*> e369f113 msr SPSR_fc, #-1073741820 ; 0xc0000004
|
||||
00000134 <[^>]*> e36cf113 msr SPSR_fs, #-1073741820 ; 0xc0000004
|
||||
00000138 <[^>]*> e366f113 msr SPSR_sx, #-1073741820 ; 0xc0000004
|
||||
0000013c <[^>]*> e365f113 msr SPSR_sc, #-1073741820 ; 0xc0000004
|
||||
00000140 <[^>]*> e36af113 msr SPSR_fx, #-1073741820 ; 0xc0000004
|
||||
00000144 <[^>]*> e366f113 msr SPSR_sx, #-1073741820 ; 0xc0000004
|
||||
00000148 <[^>]*> e363f113 msr SPSR_xc, #-1073741820 ; 0xc0000004
|
||||
0000014c <[^>]*> e369f113 msr SPSR_fc, #-1073741820 ; 0xc0000004
|
||||
00000150 <[^>]*> e365f113 msr SPSR_sc, #-1073741820 ; 0xc0000004
|
||||
00000154 <[^>]*> e363f113 msr SPSR_xc, #-1073741820 ; 0xc0000004
|
||||
00000158 <[^>]*> e36ef113 msr SPSR_fsx, #-1073741820 ; 0xc0000004
|
||||
0000015c <[^>]*> e36df113 msr SPSR_fsc, #-1073741820 ; 0xc0000004
|
||||
00000160 <[^>]*> e36ef113 msr SPSR_fsx, #-1073741820 ; 0xc0000004
|
||||
00000164 <[^>]*> e36bf113 msr SPSR_fxc, #-1073741820 ; 0xc0000004
|
||||
00000168 <[^>]*> e36df113 msr SPSR_fsc, #-1073741820 ; 0xc0000004
|
||||
0000016c <[^>]*> e36bf113 msr SPSR_fxc, #-1073741820 ; 0xc0000004
|
||||
00000170 <[^>]*> e36ef113 msr SPSR_fsx, #-1073741820 ; 0xc0000004
|
||||
00000174 <[^>]*> e36df113 msr SPSR_fsc, #-1073741820 ; 0xc0000004
|
||||
00000178 <[^>]*> e36ef113 msr SPSR_fsx, #-1073741820 ; 0xc0000004
|
||||
0000017c <[^>]*> e367f113 msr SPSR_sxc, #-1073741820 ; 0xc0000004
|
||||
00000180 <[^>]*> e36df113 msr SPSR_fsc, #-1073741820 ; 0xc0000004
|
||||
00000184 <[^>]*> e367f113 msr SPSR_sxc, #-1073741820 ; 0xc0000004
|
||||
00000188 <[^>]*> e36ef113 msr SPSR_fsx, #-1073741820 ; 0xc0000004
|
||||
0000018c <[^>]*> e36bf113 msr SPSR_fxc, #-1073741820 ; 0xc0000004
|
||||
00000190 <[^>]*> e36ef113 msr SPSR_fsx, #-1073741820 ; 0xc0000004
|
||||
00000194 <[^>]*> e367f113 msr SPSR_sxc, #-1073741820 ; 0xc0000004
|
||||
00000198 <[^>]*> e36bf113 msr SPSR_fxc, #-1073741820 ; 0xc0000004
|
||||
0000019c <[^>]*> e367f113 msr SPSR_sxc, #-1073741820 ; 0xc0000004
|
||||
000001a0 <[^>]*> e36df113 msr SPSR_fsc, #-1073741820 ; 0xc0000004
|
||||
000001a4 <[^>]*> e36bf113 msr SPSR_fxc, #-1073741820 ; 0xc0000004
|
||||
000001a8 <[^>]*> e36df113 msr SPSR_fsc, #-1073741820 ; 0xc0000004
|
||||
000001ac <[^>]*> e367f113 msr SPSR_sxc, #-1073741820 ; 0xc0000004
|
||||
000001b0 <[^>]*> e36bf113 msr SPSR_fxc, #-1073741820 ; 0xc0000004
|
||||
000001b4 <[^>]*> e367f113 msr SPSR_sxc, #-1073741820 ; 0xc0000004
|
||||
000001b8 <[^>]*> e36ff113 msr SPSR_fsxc, #-1073741820 ; 0xc0000004
|
||||
000001bc <[^>]*> e36ff113 msr SPSR_fsxc, #-1073741820 ; 0xc0000004
|
||||
000001c0 <[^>]*> e36ff113 msr SPSR_fsxc, #-1073741820 ; 0xc0000004
|
||||
000001c4 <[^>]*> e36ff113 msr SPSR_fsxc, #-1073741820 ; 0xc0000004
|
||||
000001c8 <[^>]*> e36ff113 msr SPSR_fsxc, #-1073741820 ; 0xc0000004
|
||||
000001cc <[^>]*> e36ff113 msr SPSR_fsxc, #-1073741820 ; 0xc0000004
|
||||
000001d0 <[^>]*> e36ff113 msr SPSR_fsxc, #-1073741820 ; 0xc0000004
|
||||
000001d4 <[^>]*> e36ff113 msr SPSR_fsxc, #-1073741820 ; 0xc0000004
|
||||
000001d8 <[^>]*> e36ff113 msr SPSR_fsxc, #-1073741820 ; 0xc0000004
|
||||
000001dc <[^>]*> e36ff113 msr SPSR_fsxc, #-1073741820 ; 0xc0000004
|
||||
000001e0 <[^>]*> e36ff113 msr SPSR_fsxc, #-1073741820 ; 0xc0000004
|
||||
000001e4 <[^>]*> e36ff113 msr SPSR_fsxc, #-1073741820 ; 0xc0000004
|
||||
000001e8 <[^>]*> e36ff113 msr SPSR_fsxc, #-1073741820 ; 0xc0000004
|
||||
000001ec <[^>]*> e36ff113 msr SPSR_fsxc, #-1073741820 ; 0xc0000004
|
||||
000001f0 <[^>]*> e36ff113 msr SPSR_fsxc, #-1073741820 ; 0xc0000004
|
||||
000001f4 <[^>]*> e36ff113 msr SPSR_fsxc, #-1073741820 ; 0xc0000004
|
||||
000001f8 <[^>]*> e36ff113 msr SPSR_fsxc, #-1073741820 ; 0xc0000004
|
||||
000001fc <[^>]*> e36ff113 msr SPSR_fsxc, #-1073741820 ; 0xc0000004
|
||||
00000200 <[^>]*> e36ff113 msr SPSR_fsxc, #-1073741820 ; 0xc0000004
|
||||
00000204 <[^>]*> e36ff113 msr SPSR_fsxc, #-1073741820 ; 0xc0000004
|
||||
00000208 <[^>]*> e36ff113 msr SPSR_fsxc, #-1073741820 ; 0xc0000004
|
||||
0000020c <[^>]*> e36ff113 msr SPSR_fsxc, #-1073741820 ; 0xc0000004
|
||||
00000210 <[^>]*> e36ff113 msr SPSR_fsxc, #-1073741820 ; 0xc0000004
|
||||
00000214 <[^>]*> e36ff113 msr SPSR_fsxc, #-1073741820 ; 0xc0000004
|
||||
|
|
@ -0,0 +1,153 @@
|
|||
@ Check MSR and MRS instruction operand syntax.
|
||||
@ Also check for MSR/MRS acceptance in ARM/THUMB modes.
|
||||
|
||||
.section .text
|
||||
.syntax unified
|
||||
|
||||
@ Write to Special Register from Immediate
|
||||
@ Write to application status register
|
||||
msr APSR,#0xc0000004
|
||||
msr APSR_g,#0xc0000004
|
||||
msr APSR_nzcvq,#0xc0000004
|
||||
msr APSR_nzcvqg,#0xc0000004
|
||||
|
||||
@ Write to CPSR flags
|
||||
msr CPSR,#0xc0000004
|
||||
msr CPSR_s,#0xc0000004
|
||||
msr CPSR_f,#0xc0000004
|
||||
msr CPSR_c,#0xc0000004
|
||||
msr CPSR_x,#0xc0000004
|
||||
|
||||
@ Write to CPSR flag combos
|
||||
msr CPSR_fs, #0xc0000004
|
||||
msr CPSR_fx, #0xc0000004
|
||||
msr CPSR_fc, #0xc0000004
|
||||
msr CPSR_sf, #0xc0000004
|
||||
msr CPSR_sx, #0xc0000004
|
||||
msr CPSR_sc, #0xc0000004
|
||||
msr CPSR_xf, #0xc0000004
|
||||
msr CPSR_xs, #0xc0000004
|
||||
msr CPSR_xc, #0xc0000004
|
||||
msr CPSR_cf, #0xc0000004
|
||||
msr CPSR_cs, #0xc0000004
|
||||
msr CPSR_cx, #0xc0000004
|
||||
msr CPSR_fsx, #0xc0000004
|
||||
msr CPSR_fsc, #0xc0000004
|
||||
msr CPSR_fxs, #0xc0000004
|
||||
msr CPSR_fxc, #0xc0000004
|
||||
msr CPSR_fcs, #0xc0000004
|
||||
msr CPSR_fcx, #0xc0000004
|
||||
msr CPSR_sfx, #0xc0000004
|
||||
msr CPSR_sfc, #0xc0000004
|
||||
msr CPSR_sxf, #0xc0000004
|
||||
msr CPSR_sxc, #0xc0000004
|
||||
msr CPSR_scf, #0xc0000004
|
||||
msr CPSR_scx, #0xc0000004
|
||||
msr CPSR_xfs, #0xc0000004
|
||||
msr CPSR_xfc, #0xc0000004
|
||||
msr CPSR_xsf, #0xc0000004
|
||||
msr CPSR_xsc, #0xc0000004
|
||||
msr CPSR_xcf, #0xc0000004
|
||||
msr CPSR_xcs, #0xc0000004
|
||||
msr CPSR_cfs, #0xc0000004
|
||||
msr CPSR_cfx, #0xc0000004
|
||||
msr CPSR_csf, #0xc0000004
|
||||
msr CPSR_csx, #0xc0000004
|
||||
msr CPSR_cxf, #0xc0000004
|
||||
msr CPSR_cxs, #0xc0000004
|
||||
msr CPSR_fsxc, #0xc0000004
|
||||
msr CPSR_fscx, #0xc0000004
|
||||
msr CPSR_fxsc, #0xc0000004
|
||||
msr CPSR_fxcs, #0xc0000004
|
||||
msr CPSR_fcsx, #0xc0000004
|
||||
msr CPSR_fcxs, #0xc0000004
|
||||
msr CPSR_sfxc, #0xc0000004
|
||||
msr CPSR_sfcx, #0xc0000004
|
||||
msr CPSR_sxfc, #0xc0000004
|
||||
msr CPSR_sxcf, #0xc0000004
|
||||
msr CPSR_scfx, #0xc0000004
|
||||
msr CPSR_scxf, #0xc0000004
|
||||
msr CPSR_xfsc, #0xc0000004
|
||||
msr CPSR_xfcs, #0xc0000004
|
||||
msr CPSR_xsfc, #0xc0000004
|
||||
msr CPSR_xscf, #0xc0000004
|
||||
msr CPSR_xcfs, #0xc0000004
|
||||
msr CPSR_xcsf, #0xc0000004
|
||||
msr CPSR_cfsx, #0xc0000004
|
||||
msr CPSR_cfxs, #0xc0000004
|
||||
msr CPSR_csfx, #0xc0000004
|
||||
msr CPSR_csxf, #0xc0000004
|
||||
msr CPSR_cxfs, #0xc0000004
|
||||
msr CPSR_cxsf, #0xc0000004
|
||||
|
||||
@ Write to Saved status register
|
||||
@ Write to SPSR flags
|
||||
msr SPSR, #0xc0000004
|
||||
msr SPSR_s, #0xc0000004
|
||||
msr SPSR_f, #0xc0000004
|
||||
msr SPSR_c, #0xc0000004
|
||||
msr SPSR_x, #0xc0000004
|
||||
|
||||
@Write to SPSR flag combos
|
||||
msr SPSR_fs, #0xc0000004
|
||||
msr SPSR_fx, #0xc0000004
|
||||
msr SPSR_fc, #0xc0000004
|
||||
msr SPSR_sf, #0xc0000004
|
||||
msr SPSR_sx, #0xc0000004
|
||||
msr SPSR_sc, #0xc0000004
|
||||
msr SPSR_xf, #0xc0000004
|
||||
msr SPSR_xs, #0xc0000004
|
||||
msr SPSR_xc, #0xc0000004
|
||||
msr SPSR_cf, #0xc0000004
|
||||
msr SPSR_cs, #0xc0000004
|
||||
msr SPSR_cx, #0xc0000004
|
||||
msr SPSR_fsx, #0xc0000004
|
||||
msr SPSR_fsc, #0xc0000004
|
||||
msr SPSR_fxs, #0xc0000004
|
||||
msr SPSR_fxc, #0xc0000004
|
||||
msr SPSR_fcs, #0xc0000004
|
||||
msr SPSR_fcx, #0xc0000004
|
||||
msr SPSR_sfx, #0xc0000004
|
||||
msr SPSR_sfc, #0xc0000004
|
||||
msr SPSR_sxf, #0xc0000004
|
||||
msr SPSR_sxc, #0xc0000004
|
||||
msr SPSR_scf, #0xc0000004
|
||||
msr SPSR_scx, #0xc0000004
|
||||
msr SPSR_xfs, #0xc0000004
|
||||
msr SPSR_xfc, #0xc0000004
|
||||
msr SPSR_xsf, #0xc0000004
|
||||
msr SPSR_xsc, #0xc0000004
|
||||
msr SPSR_xcf, #0xc0000004
|
||||
msr SPSR_xcs, #0xc0000004
|
||||
msr SPSR_cfs, #0xc0000004
|
||||
msr SPSR_cfx, #0xc0000004
|
||||
msr SPSR_csf, #0xc0000004
|
||||
msr SPSR_csx, #0xc0000004
|
||||
msr SPSR_cxf, #0xc0000004
|
||||
msr SPSR_cxs, #0xc0000004
|
||||
msr SPSR_fsxc, #0xc0000004
|
||||
msr SPSR_fscx, #0xc0000004
|
||||
msr SPSR_fxsc, #0xc0000004
|
||||
msr SPSR_fxcs, #0xc0000004
|
||||
msr SPSR_fcsx, #0xc0000004
|
||||
msr SPSR_fcxs, #0xc0000004
|
||||
msr SPSR_sfxc, #0xc0000004
|
||||
msr SPSR_sfcx, #0xc0000004
|
||||
msr SPSR_sxfc, #0xc0000004
|
||||
msr SPSR_sxcf, #0xc0000004
|
||||
msr SPSR_scfx, #0xc0000004
|
||||
msr SPSR_scxf, #0xc0000004
|
||||
msr SPSR_xfsc, #0xc0000004
|
||||
msr SPSR_xfcs, #0xc0000004
|
||||
msr SPSR_xsfc, #0xc0000004
|
||||
msr SPSR_xscf, #0xc0000004
|
||||
msr SPSR_xcfs, #0xc0000004
|
||||
msr SPSR_xcsf, #0xc0000004
|
||||
msr SPSR_cfsx, #0xc0000004
|
||||
msr SPSR_cfxs, #0xc0000004
|
||||
msr SPSR_csfx, #0xc0000004
|
||||
msr SPSR_csxf, #0xc0000004
|
||||
msr SPSR_cxfs, #0xc0000004
|
||||
msr SPSR_cxsf, #0xc0000004
|
||||
|
||||
|
||||
|
|
@ -0,0 +1,5 @@
|
|||
# name: Cannot use flag-variant of PSR on v7m and v6m.
|
||||
# skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd
|
||||
# error-output: msr-reg-bad.l
|
||||
# source: msr-reg.s
|
||||
# as: -march=armv7-m
|
||||
|
|
@ -0,0 +1,134 @@
|
|||
[^:]*: Assembler messages:
|
||||
[^:]*:9: Error: syntax error -- `msr APSR_g,r9'
|
||||
[^:]*:10: Error: syntax error -- `msr APSR_nzcvq,r9'
|
||||
[^:]*:11: Error: syntax error -- `msr APSR_nzcvqg,r9'
|
||||
[^:]*:14: Error: selected processor does not support requested special purpose register -- `msr CPSR,r9'
|
||||
[^:]*:15: Error: selected processor does not support requested special purpose register -- `msr CPSR_s,r9'
|
||||
[^:]*:16: Error: selected processor does not support requested special purpose register -- `msr CPSR_f,r9'
|
||||
[^:]*:17: Error: selected processor does not support requested special purpose register -- `msr CPSR_c,r9'
|
||||
[^:]*:18: Error: selected processor does not support requested special purpose register -- `msr CPSR_x,r9'
|
||||
[^:]*:21: Error: selected processor does not support requested special purpose register -- `msr CPSR_fs,r9'
|
||||
[^:]*:22: Error: selected processor does not support requested special purpose register -- `msr CPSR_fx,r9'
|
||||
[^:]*:23: Error: selected processor does not support requested special purpose register -- `msr CPSR_fc,r9'
|
||||
[^:]*:24: Error: selected processor does not support requested special purpose register -- `msr CPSR_sf,r9'
|
||||
[^:]*:25: Error: selected processor does not support requested special purpose register -- `msr CPSR_sx,r9'
|
||||
[^:]*:26: Error: selected processor does not support requested special purpose register -- `msr CPSR_sc,r9'
|
||||
[^:]*:27: Error: selected processor does not support requested special purpose register -- `msr CPSR_xf,r9'
|
||||
[^:]*:28: Error: selected processor does not support requested special purpose register -- `msr CPSR_xs,r9'
|
||||
[^:]*:29: Error: selected processor does not support requested special purpose register -- `msr CPSR_xc,r9'
|
||||
[^:]*:30: Error: selected processor does not support requested special purpose register -- `msr CPSR_cf,r9'
|
||||
[^:]*:31: Error: selected processor does not support requested special purpose register -- `msr CPSR_cs,r9'
|
||||
[^:]*:32: Error: selected processor does not support requested special purpose register -- `msr CPSR_cx,r9'
|
||||
[^:]*:33: Error: selected processor does not support requested special purpose register -- `msr CPSR_fsx,r9'
|
||||
[^:]*:34: Error: selected processor does not support requested special purpose register -- `msr CPSR_fsc,r9'
|
||||
[^:]*:35: Error: selected processor does not support requested special purpose register -- `msr CPSR_fxs,r9'
|
||||
[^:]*:36: Error: selected processor does not support requested special purpose register -- `msr CPSR_fxc,r9'
|
||||
[^:]*:37: Error: selected processor does not support requested special purpose register -- `msr CPSR_fcs,r9'
|
||||
[^:]*:38: Error: selected processor does not support requested special purpose register -- `msr CPSR_fcx,r9'
|
||||
[^:]*:39: Error: selected processor does not support requested special purpose register -- `msr CPSR_sfx,r9'
|
||||
[^:]*:40: Error: selected processor does not support requested special purpose register -- `msr CPSR_sfc,r9'
|
||||
[^:]*:41: Error: selected processor does not support requested special purpose register -- `msr CPSR_sxf,r9'
|
||||
[^:]*:42: Error: selected processor does not support requested special purpose register -- `msr CPSR_sxc,r9'
|
||||
[^:]*:43: Error: selected processor does not support requested special purpose register -- `msr CPSR_scf,r9'
|
||||
[^:]*:44: Error: selected processor does not support requested special purpose register -- `msr CPSR_scx,r9'
|
||||
[^:]*:45: Error: selected processor does not support requested special purpose register -- `msr CPSR_xfs,r9'
|
||||
[^:]*:46: Error: selected processor does not support requested special purpose register -- `msr CPSR_xfc,r9'
|
||||
[^:]*:47: Error: selected processor does not support requested special purpose register -- `msr CPSR_xsf,r9'
|
||||
[^:]*:48: Error: selected processor does not support requested special purpose register -- `msr CPSR_xsc,r9'
|
||||
[^:]*:49: Error: selected processor does not support requested special purpose register -- `msr CPSR_xcf,r9'
|
||||
[^:]*:50: Error: selected processor does not support requested special purpose register -- `msr CPSR_xcs,r9'
|
||||
[^:]*:51: Error: selected processor does not support requested special purpose register -- `msr CPSR_cfs,r9'
|
||||
[^:]*:52: Error: selected processor does not support requested special purpose register -- `msr CPSR_cfx,r9'
|
||||
[^:]*:53: Error: selected processor does not support requested special purpose register -- `msr CPSR_csf,r9'
|
||||
[^:]*:54: Error: selected processor does not support requested special purpose register -- `msr CPSR_csx,r9'
|
||||
[^:]*:55: Error: selected processor does not support requested special purpose register -- `msr CPSR_cxf,r9'
|
||||
[^:]*:56: Error: selected processor does not support requested special purpose register -- `msr CPSR_cxs,r9'
|
||||
[^:]*:57: Error: selected processor does not support requested special purpose register -- `msr CPSR_fsxc,r9'
|
||||
[^:]*:58: Error: selected processor does not support requested special purpose register -- `msr CPSR_fscx,r9'
|
||||
[^:]*:59: Error: selected processor does not support requested special purpose register -- `msr CPSR_fxsc,r9'
|
||||
[^:]*:60: Error: selected processor does not support requested special purpose register -- `msr CPSR_fxcs,r9'
|
||||
[^:]*:61: Error: selected processor does not support requested special purpose register -- `msr CPSR_fcsx,r9'
|
||||
[^:]*:62: Error: selected processor does not support requested special purpose register -- `msr CPSR_fcxs,r9'
|
||||
[^:]*:63: Error: selected processor does not support requested special purpose register -- `msr CPSR_sfxc,r9'
|
||||
[^:]*:64: Error: selected processor does not support requested special purpose register -- `msr CPSR_sfcx,r9'
|
||||
[^:]*:65: Error: selected processor does not support requested special purpose register -- `msr CPSR_sxfc,r9'
|
||||
[^:]*:66: Error: selected processor does not support requested special purpose register -- `msr CPSR_sxcf,r9'
|
||||
[^:]*:67: Error: selected processor does not support requested special purpose register -- `msr CPSR_scfx,r9'
|
||||
[^:]*:68: Error: selected processor does not support requested special purpose register -- `msr CPSR_scxf,r9'
|
||||
[^:]*:69: Error: selected processor does not support requested special purpose register -- `msr CPSR_xfsc,r9'
|
||||
[^:]*:70: Error: selected processor does not support requested special purpose register -- `msr CPSR_xfcs,r9'
|
||||
[^:]*:71: Error: selected processor does not support requested special purpose register -- `msr CPSR_xsfc,r9'
|
||||
[^:]*:72: Error: selected processor does not support requested special purpose register -- `msr CPSR_xscf,r9'
|
||||
[^:]*:73: Error: selected processor does not support requested special purpose register -- `msr CPSR_xcfs,r9'
|
||||
[^:]*:74: Error: selected processor does not support requested special purpose register -- `msr CPSR_xcsf,r9'
|
||||
[^:]*:75: Error: selected processor does not support requested special purpose register -- `msr CPSR_cfsx,r9'
|
||||
[^:]*:76: Error: selected processor does not support requested special purpose register -- `msr CPSR_cfxs,r9'
|
||||
[^:]*:77: Error: selected processor does not support requested special purpose register -- `msr CPSR_csfx,r9'
|
||||
[^:]*:78: Error: selected processor does not support requested special purpose register -- `msr CPSR_csxf,r9'
|
||||
[^:]*:79: Error: selected processor does not support requested special purpose register -- `msr CPSR_cxfs,r9'
|
||||
[^:]*:80: Error: selected processor does not support requested special purpose register -- `msr CPSR_cxsf,r9'
|
||||
[^:]*:83: Error: selected processor does not support requested special purpose register -- `msr SPSR,r9'
|
||||
[^:]*:84: Error: selected processor does not support requested special purpose register -- `msr SPSR_s,r9'
|
||||
[^:]*:85: Error: selected processor does not support requested special purpose register -- `msr SPSR_f,r9'
|
||||
[^:]*:86: Error: selected processor does not support requested special purpose register -- `msr SPSR_c,r9'
|
||||
[^:]*:87: Error: selected processor does not support requested special purpose register -- `msr SPSR_x,r9'
|
||||
[^:]*:90: Error: selected processor does not support requested special purpose register -- `msr SPSR_fs,r9'
|
||||
[^:]*:91: Error: selected processor does not support requested special purpose register -- `msr SPSR_fx,r9'
|
||||
[^:]*:92: Error: selected processor does not support requested special purpose register -- `msr SPSR_fc,r9'
|
||||
[^:]*:93: Error: selected processor does not support requested special purpose register -- `msr SPSR_sf,r9'
|
||||
[^:]*:94: Error: selected processor does not support requested special purpose register -- `msr SPSR_sx,r9'
|
||||
[^:]*:95: Error: selected processor does not support requested special purpose register -- `msr SPSR_sc,r9'
|
||||
[^:]*:96: Error: selected processor does not support requested special purpose register -- `msr SPSR_xf,r9'
|
||||
[^:]*:97: Error: selected processor does not support requested special purpose register -- `msr SPSR_xs,r9'
|
||||
[^:]*:98: Error: selected processor does not support requested special purpose register -- `msr SPSR_xc,r9'
|
||||
[^:]*:99: Error: selected processor does not support requested special purpose register -- `msr SPSR_cf,r9'
|
||||
[^:]*:100: Error: selected processor does not support requested special purpose register -- `msr SPSR_cs,r9'
|
||||
[^:]*:101: Error: selected processor does not support requested special purpose register -- `msr SPSR_cx,r9'
|
||||
[^:]*:102: Error: selected processor does not support requested special purpose register -- `msr SPSR_fsx,r9'
|
||||
[^:]*:103: Error: selected processor does not support requested special purpose register -- `msr SPSR_fsc,r9'
|
||||
[^:]*:104: Error: selected processor does not support requested special purpose register -- `msr SPSR_fxs,r9'
|
||||
[^:]*:105: Error: selected processor does not support requested special purpose register -- `msr SPSR_fxc,r9'
|
||||
[^:]*:106: Error: selected processor does not support requested special purpose register -- `msr SPSR_fcs,r9'
|
||||
[^:]*:107: Error: selected processor does not support requested special purpose register -- `msr SPSR_fcx,r9'
|
||||
[^:]*:108: Error: selected processor does not support requested special purpose register -- `msr SPSR_sfx,r9'
|
||||
[^:]*:109: Error: selected processor does not support requested special purpose register -- `msr SPSR_sfc,r9'
|
||||
[^:]*:110: Error: selected processor does not support requested special purpose register -- `msr SPSR_sxf,r9'
|
||||
[^:]*:111: Error: selected processor does not support requested special purpose register -- `msr SPSR_sxc,r9'
|
||||
[^:]*:112: Error: selected processor does not support requested special purpose register -- `msr SPSR_scf,r9'
|
||||
[^:]*:113: Error: selected processor does not support requested special purpose register -- `msr SPSR_scx,r9'
|
||||
[^:]*:114: Error: selected processor does not support requested special purpose register -- `msr SPSR_xfs,r9'
|
||||
[^:]*:115: Error: selected processor does not support requested special purpose register -- `msr SPSR_xfc,r9'
|
||||
[^:]*:116: Error: selected processor does not support requested special purpose register -- `msr SPSR_xsf,r9'
|
||||
[^:]*:117: Error: selected processor does not support requested special purpose register -- `msr SPSR_xsc,r9'
|
||||
[^:]*:118: Error: selected processor does not support requested special purpose register -- `msr SPSR_xcf,r9'
|
||||
[^:]*:119: Error: selected processor does not support requested special purpose register -- `msr SPSR_xcs,r9'
|
||||
[^:]*:120: Error: selected processor does not support requested special purpose register -- `msr SPSR_cfs,r9'
|
||||
[^:]*:121: Error: selected processor does not support requested special purpose register -- `msr SPSR_cfx,r9'
|
||||
[^:]*:122: Error: selected processor does not support requested special purpose register -- `msr SPSR_csf,r9'
|
||||
[^:]*:123: Error: selected processor does not support requested special purpose register -- `msr SPSR_csx,r9'
|
||||
[^:]*:124: Error: selected processor does not support requested special purpose register -- `msr SPSR_cxf,r9'
|
||||
[^:]*:125: Error: selected processor does not support requested special purpose register -- `msr SPSR_cxs,r9'
|
||||
[^:]*:126: Error: selected processor does not support requested special purpose register -- `msr SPSR_fsxc,r9'
|
||||
[^:]*:127: Error: selected processor does not support requested special purpose register -- `msr SPSR_fscx,r9'
|
||||
[^:]*:128: Error: selected processor does not support requested special purpose register -- `msr SPSR_fxsc,r9'
|
||||
[^:]*:129: Error: selected processor does not support requested special purpose register -- `msr SPSR_fxcs,r9'
|
||||
[^:]*:130: Error: selected processor does not support requested special purpose register -- `msr SPSR_fcsx,r9'
|
||||
[^:]*:131: Error: selected processor does not support requested special purpose register -- `msr SPSR_fcxs,r9'
|
||||
[^:]*:132: Error: selected processor does not support requested special purpose register -- `msr SPSR_sfxc,r9'
|
||||
[^:]*:133: Error: selected processor does not support requested special purpose register -- `msr SPSR_sfcx,r9'
|
||||
[^:]*:134: Error: selected processor does not support requested special purpose register -- `msr SPSR_sxfc,r9'
|
||||
[^:]*:135: Error: selected processor does not support requested special purpose register -- `msr SPSR_sxcf,r9'
|
||||
[^:]*:136: Error: selected processor does not support requested special purpose register -- `msr SPSR_scfx,r9'
|
||||
[^:]*:137: Error: selected processor does not support requested special purpose register -- `msr SPSR_scxf,r9'
|
||||
[^:]*:138: Error: selected processor does not support requested special purpose register -- `msr SPSR_xfsc,r9'
|
||||
[^:]*:139: Error: selected processor does not support requested special purpose register -- `msr SPSR_xfcs,r9'
|
||||
[^:]*:140: Error: selected processor does not support requested special purpose register -- `msr SPSR_xsfc,r9'
|
||||
[^:]*:141: Error: selected processor does not support requested special purpose register -- `msr SPSR_xscf,r9'
|
||||
[^:]*:142: Error: selected processor does not support requested special purpose register -- `msr SPSR_xcfs,r9'
|
||||
[^:]*:143: Error: selected processor does not support requested special purpose register -- `msr SPSR_xcsf,r9'
|
||||
[^:]*:144: Error: selected processor does not support requested special purpose register -- `msr SPSR_cfsx,r9'
|
||||
[^:]*:145: Error: selected processor does not support requested special purpose register -- `msr SPSR_cfxs,r9'
|
||||
[^:]*:146: Error: selected processor does not support requested special purpose register -- `msr SPSR_csfx,r9'
|
||||
[^:]*:147: Error: selected processor does not support requested special purpose register -- `msr SPSR_csxf,r9'
|
||||
[^:]*:148: Error: selected processor does not support requested special purpose register -- `msr SPSR_cxfs,r9'
|
||||
[^:]*:149: Error: selected processor does not support requested special purpose register -- `msr SPSR_cxsf,r9'
|
||||
|
|
@ -0,0 +1,142 @@
|
|||
# name: MSR register operands in thumb mode
|
||||
# as: -march=armv7-a -mthumb
|
||||
# source: msr-reg.s
|
||||
# objdump: -dr --prefix-addresses --show-raw-insn
|
||||
|
||||
.*: +file format .*arm.*
|
||||
|
||||
Disassembly of section .text:
|
||||
00000000 <[^>]*> f389 8900 msr CPSR_fc, r9
|
||||
00000004 <[^>]*> f389 8400 msr CPSR_s, r9
|
||||
00000008 <[^>]*> f389 8800 msr CPSR_f, r9
|
||||
0000000c <[^>]*> f389 8c00 msr CPSR_fs, r9
|
||||
00000010 <[^>]*> f389 8900 msr CPSR_fc, r9
|
||||
00000014 <[^>]*> f389 8400 msr CPSR_s, r9
|
||||
00000018 <[^>]*> f389 8800 msr CPSR_f, r9
|
||||
0000001c <[^>]*> f389 8100 msr CPSR_c, r9
|
||||
00000020 <[^>]*> f389 8200 msr CPSR_x, r9
|
||||
00000024 <[^>]*> f389 8c00 msr CPSR_fs, r9
|
||||
00000028 <[^>]*> f389 8a00 msr CPSR_fx, r9
|
||||
0000002c <[^>]*> f389 8900 msr CPSR_fc, r9
|
||||
00000030 <[^>]*> f389 8c00 msr CPSR_fs, r9
|
||||
00000034 <[^>]*> f389 8600 msr CPSR_sx, r9
|
||||
00000038 <[^>]*> f389 8500 msr CPSR_sc, r9
|
||||
0000003c <[^>]*> f389 8a00 msr CPSR_fx, r9
|
||||
00000040 <[^>]*> f389 8600 msr CPSR_sx, r9
|
||||
00000044 <[^>]*> f389 8300 msr CPSR_xc, r9
|
||||
00000048 <[^>]*> f389 8900 msr CPSR_fc, r9
|
||||
0000004c <[^>]*> f389 8500 msr CPSR_sc, r9
|
||||
00000050 <[^>]*> f389 8300 msr CPSR_xc, r9
|
||||
00000054 <[^>]*> f389 8e00 msr CPSR_fsx, r9
|
||||
00000058 <[^>]*> f389 8d00 msr CPSR_fsc, r9
|
||||
0000005c <[^>]*> f389 8e00 msr CPSR_fsx, r9
|
||||
00000060 <[^>]*> f389 8b00 msr CPSR_fxc, r9
|
||||
00000064 <[^>]*> f389 8d00 msr CPSR_fsc, r9
|
||||
00000068 <[^>]*> f389 8b00 msr CPSR_fxc, r9
|
||||
0000006c <[^>]*> f389 8e00 msr CPSR_fsx, r9
|
||||
00000070 <[^>]*> f389 8d00 msr CPSR_fsc, r9
|
||||
00000074 <[^>]*> f389 8e00 msr CPSR_fsx, r9
|
||||
00000078 <[^>]*> f389 8700 msr CPSR_sxc, r9
|
||||
0000007c <[^>]*> f389 8d00 msr CPSR_fsc, r9
|
||||
00000080 <[^>]*> f389 8700 msr CPSR_sxc, r9
|
||||
00000084 <[^>]*> f389 8e00 msr CPSR_fsx, r9
|
||||
00000088 <[^>]*> f389 8b00 msr CPSR_fxc, r9
|
||||
0000008c <[^>]*> f389 8e00 msr CPSR_fsx, r9
|
||||
00000090 <[^>]*> f389 8700 msr CPSR_sxc, r9
|
||||
00000094 <[^>]*> f389 8b00 msr CPSR_fxc, r9
|
||||
00000098 <[^>]*> f389 8700 msr CPSR_sxc, r9
|
||||
0000009c <[^>]*> f389 8d00 msr CPSR_fsc, r9
|
||||
000000a0 <[^>]*> f389 8b00 msr CPSR_fxc, r9
|
||||
000000a4 <[^>]*> f389 8d00 msr CPSR_fsc, r9
|
||||
000000a8 <[^>]*> f389 8700 msr CPSR_sxc, r9
|
||||
000000ac <[^>]*> f389 8b00 msr CPSR_fxc, r9
|
||||
000000b0 <[^>]*> f389 8700 msr CPSR_sxc, r9
|
||||
000000b4 <[^>]*> f389 8f00 msr CPSR_fsxc, r9
|
||||
000000b8 <[^>]*> f389 8f00 msr CPSR_fsxc, r9
|
||||
000000bc <[^>]*> f389 8f00 msr CPSR_fsxc, r9
|
||||
000000c0 <[^>]*> f389 8f00 msr CPSR_fsxc, r9
|
||||
000000c4 <[^>]*> f389 8f00 msr CPSR_fsxc, r9
|
||||
000000c8 <[^>]*> f389 8f00 msr CPSR_fsxc, r9
|
||||
000000cc <[^>]*> f389 8f00 msr CPSR_fsxc, r9
|
||||
000000d0 <[^>]*> f389 8f00 msr CPSR_fsxc, r9
|
||||
000000d4 <[^>]*> f389 8f00 msr CPSR_fsxc, r9
|
||||
000000d8 <[^>]*> f389 8f00 msr CPSR_fsxc, r9
|
||||
000000dc <[^>]*> f389 8f00 msr CPSR_fsxc, r9
|
||||
000000e0 <[^>]*> f389 8f00 msr CPSR_fsxc, r9
|
||||
000000e4 <[^>]*> f389 8f00 msr CPSR_fsxc, r9
|
||||
000000e8 <[^>]*> f389 8f00 msr CPSR_fsxc, r9
|
||||
000000ec <[^>]*> f389 8f00 msr CPSR_fsxc, r9
|
||||
000000f0 <[^>]*> f389 8f00 msr CPSR_fsxc, r9
|
||||
000000f4 <[^>]*> f389 8f00 msr CPSR_fsxc, r9
|
||||
000000f8 <[^>]*> f389 8f00 msr CPSR_fsxc, r9
|
||||
000000fc <[^>]*> f389 8f00 msr CPSR_fsxc, r9
|
||||
00000100 <[^>]*> f389 8f00 msr CPSR_fsxc, r9
|
||||
00000104 <[^>]*> f389 8f00 msr CPSR_fsxc, r9
|
||||
00000108 <[^>]*> f389 8f00 msr CPSR_fsxc, r9
|
||||
0000010c <[^>]*> f389 8f00 msr CPSR_fsxc, r9
|
||||
00000110 <[^>]*> f389 8f00 msr CPSR_fsxc, r9
|
||||
00000114 <[^>]*> f399 8900 msr SPSR_fc, r9
|
||||
00000118 <[^>]*> f399 8400 msr SPSR_s, r9
|
||||
0000011c <[^>]*> f399 8800 msr SPSR_f, r9
|
||||
00000120 <[^>]*> f399 8100 msr SPSR_c, r9
|
||||
00000124 <[^>]*> f399 8200 msr SPSR_x, r9
|
||||
00000128 <[^>]*> f399 8c00 msr SPSR_fs, r9
|
||||
0000012c <[^>]*> f399 8a00 msr SPSR_fx, r9
|
||||
00000130 <[^>]*> f399 8900 msr SPSR_fc, r9
|
||||
00000134 <[^>]*> f399 8c00 msr SPSR_fs, r9
|
||||
00000138 <[^>]*> f399 8600 msr SPSR_sx, r9
|
||||
0000013c <[^>]*> f399 8500 msr SPSR_sc, r9
|
||||
00000140 <[^>]*> f399 8a00 msr SPSR_fx, r9
|
||||
00000144 <[^>]*> f399 8600 msr SPSR_sx, r9
|
||||
00000148 <[^>]*> f399 8300 msr SPSR_xc, r9
|
||||
0000014c <[^>]*> f399 8900 msr SPSR_fc, r9
|
||||
00000150 <[^>]*> f399 8500 msr SPSR_sc, r9
|
||||
00000154 <[^>]*> f399 8300 msr SPSR_xc, r9
|
||||
00000158 <[^>]*> f399 8e00 msr SPSR_fsx, r9
|
||||
0000015c <[^>]*> f399 8d00 msr SPSR_fsc, r9
|
||||
00000160 <[^>]*> f399 8e00 msr SPSR_fsx, r9
|
||||
00000164 <[^>]*> f399 8b00 msr SPSR_fxc, r9
|
||||
00000168 <[^>]*> f399 8d00 msr SPSR_fsc, r9
|
||||
0000016c <[^>]*> f399 8b00 msr SPSR_fxc, r9
|
||||
00000170 <[^>]*> f399 8e00 msr SPSR_fsx, r9
|
||||
00000174 <[^>]*> f399 8d00 msr SPSR_fsc, r9
|
||||
00000178 <[^>]*> f399 8e00 msr SPSR_fsx, r9
|
||||
0000017c <[^>]*> f399 8700 msr SPSR_sxc, r9
|
||||
00000180 <[^>]*> f399 8d00 msr SPSR_fsc, r9
|
||||
00000184 <[^>]*> f399 8700 msr SPSR_sxc, r9
|
||||
00000188 <[^>]*> f399 8e00 msr SPSR_fsx, r9
|
||||
0000018c <[^>]*> f399 8b00 msr SPSR_fxc, r9
|
||||
00000190 <[^>]*> f399 8e00 msr SPSR_fsx, r9
|
||||
00000194 <[^>]*> f399 8700 msr SPSR_sxc, r9
|
||||
00000198 <[^>]*> f399 8b00 msr SPSR_fxc, r9
|
||||
0000019c <[^>]*> f399 8700 msr SPSR_sxc, r9
|
||||
000001a0 <[^>]*> f399 8d00 msr SPSR_fsc, r9
|
||||
000001a4 <[^>]*> f399 8b00 msr SPSR_fxc, r9
|
||||
000001a8 <[^>]*> f399 8d00 msr SPSR_fsc, r9
|
||||
000001ac <[^>]*> f399 8700 msr SPSR_sxc, r9
|
||||
000001b0 <[^>]*> f399 8b00 msr SPSR_fxc, r9
|
||||
000001b4 <[^>]*> f399 8700 msr SPSR_sxc, r9
|
||||
000001b8 <[^>]*> f399 8f00 msr SPSR_fsxc, r9
|
||||
000001bc <[^>]*> f399 8f00 msr SPSR_fsxc, r9
|
||||
000001c0 <[^>]*> f399 8f00 msr SPSR_fsxc, r9
|
||||
000001c4 <[^>]*> f399 8f00 msr SPSR_fsxc, r9
|
||||
000001c8 <[^>]*> f399 8f00 msr SPSR_fsxc, r9
|
||||
000001cc <[^>]*> f399 8f00 msr SPSR_fsxc, r9
|
||||
000001d0 <[^>]*> f399 8f00 msr SPSR_fsxc, r9
|
||||
000001d4 <[^>]*> f399 8f00 msr SPSR_fsxc, r9
|
||||
000001d8 <[^>]*> f399 8f00 msr SPSR_fsxc, r9
|
||||
000001dc <[^>]*> f399 8f00 msr SPSR_fsxc, r9
|
||||
000001e0 <[^>]*> f399 8f00 msr SPSR_fsxc, r9
|
||||
000001e4 <[^>]*> f399 8f00 msr SPSR_fsxc, r9
|
||||
000001e8 <[^>]*> f399 8f00 msr SPSR_fsxc, r9
|
||||
000001ec <[^>]*> f399 8f00 msr SPSR_fsxc, r9
|
||||
000001f0 <[^>]*> f399 8f00 msr SPSR_fsxc, r9
|
||||
000001f4 <[^>]*> f399 8f00 msr SPSR_fsxc, r9
|
||||
000001f8 <[^>]*> f399 8f00 msr SPSR_fsxc, r9
|
||||
000001fc <[^>]*> f399 8f00 msr SPSR_fsxc, r9
|
||||
00000200 <[^>]*> f399 8f00 msr SPSR_fsxc, r9
|
||||
00000204 <[^>]*> f399 8f00 msr SPSR_fsxc, r9
|
||||
00000208 <[^>]*> f399 8f00 msr SPSR_fsxc, r9
|
||||
0000020c <[^>]*> f399 8f00 msr SPSR_fsxc, r9
|
||||
00000210 <[^>]*> f399 8f00 msr SPSR_fsxc, r9
|
||||
00000214 <[^>]*> f399 8f00 msr SPSR_fsxc, r9
|
||||
|
|
@ -0,0 +1,141 @@
|
|||
# name: MSR register operands
|
||||
# as: -march=armv7-a
|
||||
# objdump: -dr --prefix-addresses --show-raw-insn
|
||||
|
||||
.*: +file format .*arm.*
|
||||
|
||||
Disassembly of section .text:
|
||||
00000000 <[^>]*> e129f009 msr CPSR_fc, r9
|
||||
00000004 <[^>]*> e124f009 msr CPSR_s, r9
|
||||
00000008 <[^>]*> e128f009 msr CPSR_f, r9
|
||||
0000000c <[^>]*> e12cf009 msr CPSR_fs, r9
|
||||
00000010 <[^>]*> e129f009 msr CPSR_fc, r9
|
||||
00000014 <[^>]*> e124f009 msr CPSR_s, r9
|
||||
00000018 <[^>]*> e128f009 msr CPSR_f, r9
|
||||
0000001c <[^>]*> e121f009 msr CPSR_c, r9
|
||||
00000020 <[^>]*> e122f009 msr CPSR_x, r9
|
||||
00000024 <[^>]*> e12cf009 msr CPSR_fs, r9
|
||||
00000028 <[^>]*> e12af009 msr CPSR_fx, r9
|
||||
0000002c <[^>]*> e129f009 msr CPSR_fc, r9
|
||||
00000030 <[^>]*> e12cf009 msr CPSR_fs, r9
|
||||
00000034 <[^>]*> e126f009 msr CPSR_sx, r9
|
||||
00000038 <[^>]*> e125f009 msr CPSR_sc, r9
|
||||
0000003c <[^>]*> e12af009 msr CPSR_fx, r9
|
||||
00000040 <[^>]*> e126f009 msr CPSR_sx, r9
|
||||
00000044 <[^>]*> e123f009 msr CPSR_xc, r9
|
||||
00000048 <[^>]*> e129f009 msr CPSR_fc, r9
|
||||
0000004c <[^>]*> e125f009 msr CPSR_sc, r9
|
||||
00000050 <[^>]*> e123f009 msr CPSR_xc, r9
|
||||
00000054 <[^>]*> e12ef009 msr CPSR_fsx, r9
|
||||
00000058 <[^>]*> e12df009 msr CPSR_fsc, r9
|
||||
0000005c <[^>]*> e12ef009 msr CPSR_fsx, r9
|
||||
00000060 <[^>]*> e12bf009 msr CPSR_fxc, r9
|
||||
00000064 <[^>]*> e12df009 msr CPSR_fsc, r9
|
||||
00000068 <[^>]*> e12bf009 msr CPSR_fxc, r9
|
||||
0000006c <[^>]*> e12ef009 msr CPSR_fsx, r9
|
||||
00000070 <[^>]*> e12df009 msr CPSR_fsc, r9
|
||||
00000074 <[^>]*> e12ef009 msr CPSR_fsx, r9
|
||||
00000078 <[^>]*> e127f009 msr CPSR_sxc, r9
|
||||
0000007c <[^>]*> e12df009 msr CPSR_fsc, r9
|
||||
00000080 <[^>]*> e127f009 msr CPSR_sxc, r9
|
||||
00000084 <[^>]*> e12ef009 msr CPSR_fsx, r9
|
||||
00000088 <[^>]*> e12bf009 msr CPSR_fxc, r9
|
||||
0000008c <[^>]*> e12ef009 msr CPSR_fsx, r9
|
||||
00000090 <[^>]*> e127f009 msr CPSR_sxc, r9
|
||||
00000094 <[^>]*> e12bf009 msr CPSR_fxc, r9
|
||||
00000098 <[^>]*> e127f009 msr CPSR_sxc, r9
|
||||
0000009c <[^>]*> e12df009 msr CPSR_fsc, r9
|
||||
000000a0 <[^>]*> e12bf009 msr CPSR_fxc, r9
|
||||
000000a4 <[^>]*> e12df009 msr CPSR_fsc, r9
|
||||
000000a8 <[^>]*> e127f009 msr CPSR_sxc, r9
|
||||
000000ac <[^>]*> e12bf009 msr CPSR_fxc, r9
|
||||
000000b0 <[^>]*> e127f009 msr CPSR_sxc, r9
|
||||
000000b4 <[^>]*> e12ff009 msr CPSR_fsxc, r9
|
||||
000000b8 <[^>]*> e12ff009 msr CPSR_fsxc, r9
|
||||
000000bc <[^>]*> e12ff009 msr CPSR_fsxc, r9
|
||||
000000c0 <[^>]*> e12ff009 msr CPSR_fsxc, r9
|
||||
000000c4 <[^>]*> e12ff009 msr CPSR_fsxc, r9
|
||||
000000c8 <[^>]*> e12ff009 msr CPSR_fsxc, r9
|
||||
000000cc <[^>]*> e12ff009 msr CPSR_fsxc, r9
|
||||
000000d0 <[^>]*> e12ff009 msr CPSR_fsxc, r9
|
||||
000000d4 <[^>]*> e12ff009 msr CPSR_fsxc, r9
|
||||
000000d8 <[^>]*> e12ff009 msr CPSR_fsxc, r9
|
||||
000000dc <[^>]*> e12ff009 msr CPSR_fsxc, r9
|
||||
000000e0 <[^>]*> e12ff009 msr CPSR_fsxc, r9
|
||||
000000e4 <[^>]*> e12ff009 msr CPSR_fsxc, r9
|
||||
000000e8 <[^>]*> e12ff009 msr CPSR_fsxc, r9
|
||||
000000ec <[^>]*> e12ff009 msr CPSR_fsxc, r9
|
||||
000000f0 <[^>]*> e12ff009 msr CPSR_fsxc, r9
|
||||
000000f4 <[^>]*> e12ff009 msr CPSR_fsxc, r9
|
||||
000000f8 <[^>]*> e12ff009 msr CPSR_fsxc, r9
|
||||
000000fc <[^>]*> e12ff009 msr CPSR_fsxc, r9
|
||||
00000100 <[^>]*> e12ff009 msr CPSR_fsxc, r9
|
||||
00000104 <[^>]*> e12ff009 msr CPSR_fsxc, r9
|
||||
00000108 <[^>]*> e12ff009 msr CPSR_fsxc, r9
|
||||
0000010c <[^>]*> e12ff009 msr CPSR_fsxc, r9
|
||||
00000110 <[^>]*> e12ff009 msr CPSR_fsxc, r9
|
||||
00000114 <[^>]*> e169f009 msr SPSR_fc, r9
|
||||
00000118 <[^>]*> e164f009 msr SPSR_s, r9
|
||||
0000011c <[^>]*> e168f009 msr SPSR_f, r9
|
||||
00000120 <[^>]*> e161f009 msr SPSR_c, r9
|
||||
00000124 <[^>]*> e162f009 msr SPSR_x, r9
|
||||
00000128 <[^>]*> e16cf009 msr SPSR_fs, r9
|
||||
0000012c <[^>]*> e16af009 msr SPSR_fx, r9
|
||||
00000130 <[^>]*> e169f009 msr SPSR_fc, r9
|
||||
00000134 <[^>]*> e16cf009 msr SPSR_fs, r9
|
||||
00000138 <[^>]*> e166f009 msr SPSR_sx, r9
|
||||
0000013c <[^>]*> e165f009 msr SPSR_sc, r9
|
||||
00000140 <[^>]*> e16af009 msr SPSR_fx, r9
|
||||
00000144 <[^>]*> e166f009 msr SPSR_sx, r9
|
||||
00000148 <[^>]*> e163f009 msr SPSR_xc, r9
|
||||
0000014c <[^>]*> e169f009 msr SPSR_fc, r9
|
||||
00000150 <[^>]*> e165f009 msr SPSR_sc, r9
|
||||
00000154 <[^>]*> e163f009 msr SPSR_xc, r9
|
||||
00000158 <[^>]*> e16ef009 msr SPSR_fsx, r9
|
||||
0000015c <[^>]*> e16df009 msr SPSR_fsc, r9
|
||||
00000160 <[^>]*> e16ef009 msr SPSR_fsx, r9
|
||||
00000164 <[^>]*> e16bf009 msr SPSR_fxc, r9
|
||||
00000168 <[^>]*> e16df009 msr SPSR_fsc, r9
|
||||
0000016c <[^>]*> e16bf009 msr SPSR_fxc, r9
|
||||
00000170 <[^>]*> e16ef009 msr SPSR_fsx, r9
|
||||
00000174 <[^>]*> e16df009 msr SPSR_fsc, r9
|
||||
00000178 <[^>]*> e16ef009 msr SPSR_fsx, r9
|
||||
0000017c <[^>]*> e167f009 msr SPSR_sxc, r9
|
||||
00000180 <[^>]*> e16df009 msr SPSR_fsc, r9
|
||||
00000184 <[^>]*> e167f009 msr SPSR_sxc, r9
|
||||
00000188 <[^>]*> e16ef009 msr SPSR_fsx, r9
|
||||
0000018c <[^>]*> e16bf009 msr SPSR_fxc, r9
|
||||
00000190 <[^>]*> e16ef009 msr SPSR_fsx, r9
|
||||
00000194 <[^>]*> e167f009 msr SPSR_sxc, r9
|
||||
00000198 <[^>]*> e16bf009 msr SPSR_fxc, r9
|
||||
0000019c <[^>]*> e167f009 msr SPSR_sxc, r9
|
||||
000001a0 <[^>]*> e16df009 msr SPSR_fsc, r9
|
||||
000001a4 <[^>]*> e16bf009 msr SPSR_fxc, r9
|
||||
000001a8 <[^>]*> e16df009 msr SPSR_fsc, r9
|
||||
000001ac <[^>]*> e167f009 msr SPSR_sxc, r9
|
||||
000001b0 <[^>]*> e16bf009 msr SPSR_fxc, r9
|
||||
000001b4 <[^>]*> e167f009 msr SPSR_sxc, r9
|
||||
000001b8 <[^>]*> e16ff009 msr SPSR_fsxc, r9
|
||||
000001bc <[^>]*> e16ff009 msr SPSR_fsxc, r9
|
||||
000001c0 <[^>]*> e16ff009 msr SPSR_fsxc, r9
|
||||
000001c4 <[^>]*> e16ff009 msr SPSR_fsxc, r9
|
||||
000001c8 <[^>]*> e16ff009 msr SPSR_fsxc, r9
|
||||
000001cc <[^>]*> e16ff009 msr SPSR_fsxc, r9
|
||||
000001d0 <[^>]*> e16ff009 msr SPSR_fsxc, r9
|
||||
000001d4 <[^>]*> e16ff009 msr SPSR_fsxc, r9
|
||||
000001d8 <[^>]*> e16ff009 msr SPSR_fsxc, r9
|
||||
000001dc <[^>]*> e16ff009 msr SPSR_fsxc, r9
|
||||
000001e0 <[^>]*> e16ff009 msr SPSR_fsxc, r9
|
||||
000001e4 <[^>]*> e16ff009 msr SPSR_fsxc, r9
|
||||
000001e8 <[^>]*> e16ff009 msr SPSR_fsxc, r9
|
||||
000001ec <[^>]*> e16ff009 msr SPSR_fsxc, r9
|
||||
000001f0 <[^>]*> e16ff009 msr SPSR_fsxc, r9
|
||||
000001f4 <[^>]*> e16ff009 msr SPSR_fsxc, r9
|
||||
000001f8 <[^>]*> e16ff009 msr SPSR_fsxc, r9
|
||||
000001fc <[^>]*> e16ff009 msr SPSR_fsxc, r9
|
||||
00000200 <[^>]*> e16ff009 msr SPSR_fsxc, r9
|
||||
00000204 <[^>]*> e16ff009 msr SPSR_fsxc, r9
|
||||
00000208 <[^>]*> e16ff009 msr SPSR_fsxc, r9
|
||||
0000020c <[^>]*> e16ff009 msr SPSR_fsxc, r9
|
||||
00000210 <[^>]*> e16ff009 msr SPSR_fsxc, r9
|
||||
00000214 <[^>]*> e16ff009 msr SPSR_fsxc, r9
|
||||
|
|
@ -0,0 +1,149 @@
|
|||
@ Check MSR and MRS instruction operand syntax.
|
||||
@ Also check for MSR/MRS acceptance in ARM/THUMB modes.
|
||||
|
||||
.section .text
|
||||
.syntax unified
|
||||
|
||||
@ Write to Special Register from register
|
||||
msr APSR,r9
|
||||
msr APSR_g,r9
|
||||
msr APSR_nzcvq,r9
|
||||
msr APSR_nzcvqg,r9
|
||||
|
||||
@ Write to CPSR flags
|
||||
msr CPSR,r9
|
||||
msr CPSR_s,r9
|
||||
msr CPSR_f,r9
|
||||
msr CPSR_c,r9
|
||||
msr CPSR_x,r9
|
||||
|
||||
@ Write to CPSR flag combos
|
||||
msr CPSR_fs, r9
|
||||
msr CPSR_fx, r9
|
||||
msr CPSR_fc, r9
|
||||
msr CPSR_sf, r9
|
||||
msr CPSR_sx, r9
|
||||
msr CPSR_sc, r9
|
||||
msr CPSR_xf, r9
|
||||
msr CPSR_xs, r9
|
||||
msr CPSR_xc, r9
|
||||
msr CPSR_cf, r9
|
||||
msr CPSR_cs, r9
|
||||
msr CPSR_cx, r9
|
||||
msr CPSR_fsx, r9
|
||||
msr CPSR_fsc, r9
|
||||
msr CPSR_fxs, r9
|
||||
msr CPSR_fxc, r9
|
||||
msr CPSR_fcs, r9
|
||||
msr CPSR_fcx, r9
|
||||
msr CPSR_sfx, r9
|
||||
msr CPSR_sfc, r9
|
||||
msr CPSR_sxf, r9
|
||||
msr CPSR_sxc, r9
|
||||
msr CPSR_scf, r9
|
||||
msr CPSR_scx, r9
|
||||
msr CPSR_xfs, r9
|
||||
msr CPSR_xfc, r9
|
||||
msr CPSR_xsf, r9
|
||||
msr CPSR_xsc, r9
|
||||
msr CPSR_xcf, r9
|
||||
msr CPSR_xcs, r9
|
||||
msr CPSR_cfs, r9
|
||||
msr CPSR_cfx, r9
|
||||
msr CPSR_csf, r9
|
||||
msr CPSR_csx, r9
|
||||
msr CPSR_cxf, r9
|
||||
msr CPSR_cxs, r9
|
||||
msr CPSR_fsxc, r9
|
||||
msr CPSR_fscx, r9
|
||||
msr CPSR_fxsc, r9
|
||||
msr CPSR_fxcs, r9
|
||||
msr CPSR_fcsx, r9
|
||||
msr CPSR_fcxs, r9
|
||||
msr CPSR_sfxc, r9
|
||||
msr CPSR_sfcx, r9
|
||||
msr CPSR_sxfc, r9
|
||||
msr CPSR_sxcf, r9
|
||||
msr CPSR_scfx, r9
|
||||
msr CPSR_scxf, r9
|
||||
msr CPSR_xfsc, r9
|
||||
msr CPSR_xfcs, r9
|
||||
msr CPSR_xsfc, r9
|
||||
msr CPSR_xscf, r9
|
||||
msr CPSR_xcfs, r9
|
||||
msr CPSR_xcsf, r9
|
||||
msr CPSR_cfsx, r9
|
||||
msr CPSR_cfxs, r9
|
||||
msr CPSR_csfx, r9
|
||||
msr CPSR_csxf, r9
|
||||
msr CPSR_cxfs, r9
|
||||
msr CPSR_cxsf, r9
|
||||
|
||||
@ Write to SPSR flags
|
||||
msr SPSR,r9
|
||||
msr SPSR_s,r9
|
||||
msr SPSR_f,r9
|
||||
msr SPSR_c,r9
|
||||
msr SPSR_x,r9
|
||||
|
||||
@ Write to Saved status register
|
||||
msr SPSR_fs, r9
|
||||
msr SPSR_fx, r9
|
||||
msr SPSR_fc, r9
|
||||
msr SPSR_sf, r9
|
||||
msr SPSR_sx, r9
|
||||
msr SPSR_sc, r9
|
||||
msr SPSR_xf, r9
|
||||
msr SPSR_xs, r9
|
||||
msr SPSR_xc, r9
|
||||
msr SPSR_cf, r9
|
||||
msr SPSR_cs, r9
|
||||
msr SPSR_cx, r9
|
||||
msr SPSR_fsx, r9
|
||||
msr SPSR_fsc, r9
|
||||
msr SPSR_fxs, r9
|
||||
msr SPSR_fxc, r9
|
||||
msr SPSR_fcs, r9
|
||||
msr SPSR_fcx, r9
|
||||
msr SPSR_sfx, r9
|
||||
msr SPSR_sfc, r9
|
||||
msr SPSR_sxf, r9
|
||||
msr SPSR_sxc, r9
|
||||
msr SPSR_scf, r9
|
||||
msr SPSR_scx, r9
|
||||
msr SPSR_xfs, r9
|
||||
msr SPSR_xfc, r9
|
||||
msr SPSR_xsf, r9
|
||||
msr SPSR_xsc, r9
|
||||
msr SPSR_xcf, r9
|
||||
msr SPSR_xcs, r9
|
||||
msr SPSR_cfs, r9
|
||||
msr SPSR_cfx, r9
|
||||
msr SPSR_csf, r9
|
||||
msr SPSR_csx, r9
|
||||
msr SPSR_cxf, r9
|
||||
msr SPSR_cxs, r9
|
||||
msr SPSR_fsxc, r9
|
||||
msr SPSR_fscx, r9
|
||||
msr SPSR_fxsc, r9
|
||||
msr SPSR_fxcs, r9
|
||||
msr SPSR_fcsx, r9
|
||||
msr SPSR_fcxs, r9
|
||||
msr SPSR_sfxc, r9
|
||||
msr SPSR_sfcx, r9
|
||||
msr SPSR_sxfc, r9
|
||||
msr SPSR_sxcf, r9
|
||||
msr SPSR_scfx, r9
|
||||
msr SPSR_scxf, r9
|
||||
msr SPSR_xfsc, r9
|
||||
msr SPSR_xfcs, r9
|
||||
msr SPSR_xsfc, r9
|
||||
msr SPSR_xscf, r9
|
||||
msr SPSR_xcfs, r9
|
||||
msr SPSR_xcsf, r9
|
||||
msr SPSR_cfsx, r9
|
||||
msr SPSR_cfxs, r9
|
||||
msr SPSR_csfx, r9
|
||||
msr SPSR_csxf, r9
|
||||
msr SPSR_cxfs, r9
|
||||
msr SPSR_cxsf, r9
|
||||
Loading…
Reference in New Issue