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Don't use vec_disp8 encoding with the .d32 suffix 

Since the .d32 suffix prefers 32-bit displacement in encoding, try
vec_disp8 encoding only if i.disp_encoding != disp_encoding_32bit.

	PR gas/19909
	* config/tc-i386.c (check_VecOperands): Try vec_disp8 encoding
	only if i.disp_encoding != disp_encoding_32bit.
	* gas/testsuite/gas/i386/disp32.s: Add tests for vmovdqu64.d32.
	* gas/testsuite/gas/i386/x86-64-disp32.s: Likewise.
	* gas/testsuite/gas/i386/disp32.d: Updated.
	* gas/testsuite/gas/i386/x86-64-disp32.d: Likewise.
This commit is contained in:
H.J. Lu 2016-04-04 21:19:27 -07:00
parent 5fdf38727b
commit 5be33403c3
5 changed files with 22 additions and 9 deletions
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4
gas/config/tc-i386.c
View File

@ -4575,7 +4575,9 @@ check_VecOperands (const insn_template *t)
&& i.op[op].disps->X_op == O_constant)
{
offsetT value = i.op[op].disps->X_add_number;
int vec_disp8_ok = fits_in_vec_disp8 (value);
int vec_disp8_ok
= (i.disp_encoding != disp_encoding_32bit
&& fits_in_vec_disp8 (value));
if (t->operand_types [op].bitfield.vec_disp8)
{
if (vec_disp8_ok)

10
gas/testsuite/gas/i386/disp32.d
View File

@ -15,11 +15,12 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 8b 98 ff 0f 00 00 mov 0xfff\(%eax\),%ebx
[ ]*[a-f0-9]+: 8b 98 00 00 00 00 mov 0x0\(%eax\),%ebx
[ ]*[a-f0-9]+: 8b 98 03 00 00 00 mov 0x3\(%eax\),%ebx
[ ]*[a-f0-9]+: eb 07 jmp 26 <foo>
[ ]*[a-f0-9]+: eb 05 jmp 26 <foo>
[ ]*[a-f0-9]+: e9 00 00 00 00 jmp 26 <foo>
[ ]*[a-f0-9]+: 62 f1 fe 08 6f 98 c0 ff ff ff vmovdqu64 -0x40\(%eax\),%xmm3
[ ]*[a-f0-9]+: eb 07 jmp 30 <foo>
[ ]*[a-f0-9]+: eb 05 jmp 30 <foo>
[ ]*[a-f0-9]+: e9 00 00 00 00 jmp 30 <foo>
0+26 <foo>:
0+30 <foo>:
[ ]*[a-f0-9]+: 89 18 mov %ebx,\(%eax\)
[ ]*[a-f0-9]+: 89 58 03 mov %ebx,0x3\(%eax\)
[ ]*[a-f0-9]+: 89 98 ff 0f 00 00 mov %ebx,0xfff\(%eax\)
@ -27,4 +28,5 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 89 58 03 mov %ebx,0x3\(%eax\)
[ ]*[a-f0-9]+: 89 98 00 00 00 00 mov %ebx,0x0\(%eax\)
[ ]*[a-f0-9]+: 89 98 03 00 00 00 mov %ebx,0x3\(%eax\)
[ ]*[a-f0-9]+: 62 f1 fe 08 6f 98 c0 ff ff ff vmovdqu64 -0x40\(%eax\),%xmm3
#pass

4
gas/testsuite/gas/i386/disp32.s
View File

@ -9,6 +9,8 @@
mov.d32 (%eax),%ebx
mov.d32 3(%eax),%ebx
vmovdqu64.d32 -0x40(%eax),%xmm3
jmp foo
jmp.d8 foo
jmp.d32 foo
@ -24,3 +26,5 @@ foo:
mov.d32 DWORD PTR [eax], ebx
mov.d32 DWORD PTR [eax+3], ebx
vmovdqu64.d32 xmm3,XMMWORD PTR [eax-0x40]

10
gas/testsuite/gas/i386/x86-64-disp32.d
View File

@ -15,11 +15,12 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 8b 98 ff 0f 00 00 mov 0xfff\(%rax\),%ebx
[ ]*[a-f0-9]+: 8b 98 00 00 00 00 mov 0x0\(%rax\),%ebx
[ ]*[a-f0-9]+: 8b 98 03 00 00 00 mov 0x3\(%rax\),%ebx
[ ]*[a-f0-9]+: eb 07 jmp 26 <foo>
[ ]*[a-f0-9]+: eb 05 jmp 26 <foo>
[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq 26 <foo>
[ ]*[a-f0-9]+: 62 f1 fe 08 6f 98 c0 ff ff ff vmovdqu64 -0x40\(%rax\),%xmm3
[ ]*[a-f0-9]+: eb 07 jmp 30 <foo>
[ ]*[a-f0-9]+: eb 05 jmp 30 <foo>
[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq 30 <foo>
0+26 <foo>:
0+30 <foo>:
[ ]*[a-f0-9]+: 89 18 mov %ebx,\(%rax\)
[ ]*[a-f0-9]+: 89 58 03 mov %ebx,0x3\(%rax\)
[ ]*[a-f0-9]+: 89 98 ff 0f 00 00 mov %ebx,0xfff\(%rax\)
@ -27,4 +28,5 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 89 58 03 mov %ebx,0x3\(%rax\)
[ ]*[a-f0-9]+: 89 98 00 00 00 00 mov %ebx,0x0\(%rax\)
[ ]*[a-f0-9]+: 89 98 03 00 00 00 mov %ebx,0x3\(%rax\)
[ ]*[a-f0-9]+: 62 f1 fe 08 6f 98 c0 ff ff ff vmovdqu64 -0x40\(%rax\),%xmm3
#pass

3
gas/testsuite/gas/i386/x86-64-disp32.s
View File

@ -8,6 +8,7 @@
mov.d32 (%rax),%ebx
mov.d32 3(%rax),%ebx
vmovdqu64.d32 -0x40(%rax),%xmm3
jmp foo
jmp.d8 foo
@ -24,3 +25,5 @@ foo:
mov.d32 DWORD PTR [rax], ebx
mov.d32 DWORD PTR [rax+3], ebx
vmovdqu64.d32 xmm3,XMMWORD PTR [rax-0x40]