gas/
* config/tc-tic6x.c (tic6x_try_encode): Correct encoding of fstg field in SPKERNEL instructions. opcodes/ * tic6x-dis.c (print_insn_tic6x): Correct decoding of fstg field in SPKERNEL instructions. gas/testsuite/ * gas/tic6x/insns-c674x-sploop.d: Add two more sploop/spkernel tests. * gas/tic6x/insns-c674x-sploop.s: Likewise.
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@ -1,3 +1,8 @@
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2010-10-07 Bernd Schmidt <bernds@codesourcery.com>
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* config/tc-tic6x.c (tic6x_try_encode): Correct encoding of fstg field
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in SPKERNEL instructions.
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2010-10-06 Nathan Sidwell <nathan@codesourcery.com>
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2010-10-06 Nathan Sidwell <nathan@codesourcery.com>
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* config/tc-arm.c (encode_branch): Remove superfluous braces.
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* config/tc-arm.c (encode_branch): Remove superfluous braces.
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@ -2503,6 +2503,7 @@ tic6x_try_encode (tic6x_opcode_id id, tic6x_operand *operands,
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if (opct->variable_fields[fld].coding_method == tic6x_coding_fstg)
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if (opct->variable_fields[fld].coding_method == tic6x_coding_fstg)
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{
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{
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int i, t;
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if (operands[opno].value.exp.X_add_number < 0
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if (operands[opno].value.exp.X_add_number < 0
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|| (operands[opno].value.exp.X_add_number
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|| (operands[opno].value.exp.X_add_number
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>= (1 << (fldd->width - fcyc_bits))))
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>= (1 << (fldd->width - fcyc_bits))))
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@ -2513,7 +2514,13 @@ tic6x_try_encode (tic6x_opcode_id id, tic6x_operand *operands,
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*ok = FALSE;
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*ok = FALSE;
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return 0;
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return 0;
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}
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}
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value = operands[opno].value.exp.X_add_number << fcyc_bits;
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value = operands[opno].value.exp.X_add_number;
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for (t = 0, i = fcyc_bits; i < fldd->width; i++)
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{
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t = (t << 1) | (value & 1);
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value >>= 1;
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}
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value = t << fcyc_bits;
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}
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}
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else
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else
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{
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{
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@ -1,3 +1,8 @@
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2010-10-07 Bernd Schmidt <bernds@codesourcery.com>
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* gas/tic6x/insns-c674x-sploop.d: Add two more sploop/spkernel tests.
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* gas/tic6x/insns-c674x-sploop.s: Likewise.
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2010-10-04 David Daney <ddaney@caviumnetworks.com>
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2010-10-04 David Daney <ddaney@caviumnetworks.com>
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* gas/mips/mips.exp (octeon-pref): Run the new test.
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* gas/mips/mips.exp (octeon-pref): Run the new test.
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@ -77,4 +77,10 @@ Disassembly of section \.text:
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[0-9a-f]+[048c] <[^>]*> 06838000[ \t]+sploop 14
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[0-9a-f]+[048c] <[^>]*> 06838000[ \t]+sploop 14
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[0-9a-f]+[048c] <[^>]*> 00000000[ \t]+nop 1
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[0-9a-f]+[048c] <[^>]*> 00000000[ \t]+nop 1
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[0-9a-f]+[048c] <[^>]*> 0f434000[ \t]+spkernel 3,13
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[0-9a-f]+[048c] <[^>]*> 0f434000[ \t]+spkernel 3,13
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[0-9a-f]+[048c] <[^>]*> 00038000[ \t]+sploop 1
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[0-9a-f]+[048c] <[^>]*> 00000000[ \t]+nop 1
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[0-9a-f]+[048c] <[^>]*> 00000000[ \t]+nop 1
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[0-9a-f]+[048c] <[^>]*> 01034000[ \t]+spkernel 8,0
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[0-9a-f]+[048c] <[^>]*> 00838000[ \t]+sploop 2
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[0-9a-f]+[048c] <[^>]*> 00000000[ \t]+nop 1
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[0-9a-f]+[048c] <[^>]*> 06034000[ \t]+spkernel 6,0
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[ \t]*\.\.\.
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@ -77,3 +77,9 @@ f:
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sploop 14
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sploop 14
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nop
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nop
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spkernel 3,13
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spkernel 3,13
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sploop 1
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nop
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spkernel 8,0
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sploop 2
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nop
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spkernel 6,0
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@ -1,3 +1,8 @@
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2010-10-07 Bernd Schmidt <bernds@codesourcery.com>
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* tic6x-dis.c (print_insn_tic6x): Correct decoding of fstg field
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in SPKERNEL instructions.
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2010-10-02 H.J. Lu <hongjiu.lu@intel.com>
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2010-10-02 H.J. Lu <hongjiu.lu@intel.com>
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PR binutils/12076
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PR binutils/12076
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@ -882,9 +882,11 @@ print_insn_tic6x (bfd_vma addr, struct disassemble_info *info)
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abort ();
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abort ();
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if (enc->coding_method == tic6x_coding_fstg)
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if (enc->coding_method == tic6x_coding_fstg)
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{
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{
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int i, t;
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for (t = 0, i = fcyc_bits; i < 6; i++)
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t = (t << 1) | ((fld_val >> i) & 1);
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operands_text[op_num] = TRUE;
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operands_text[op_num] = TRUE;
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snprintf (operands[op_num], 24, "%u",
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snprintf (operands[op_num], 24, "%u", t);
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fld_val >> fcyc_bits);
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}
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}
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else
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else
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{
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{
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