Branch hints for Pentium4 as insn modifiers, and some minor tweaks
to formatting.
This commit is contained in:
Alan Modra
parent
b6a71ccaa1
commit
5dd0794dca
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@ -1,3 +1,10 @@
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2001-06-10 Alan Modra <amodra@bigpond.net.au>
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* config/obj-coff.c (obj_coff_section): Formatting fix.
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* config/tc-i386.c (md_assemble): Accept branch hints as ",pt" and
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",pn".
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2001-06-08 H.J. Lu <hjl@gnu.org>
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* config/tc-mips.c (warn_nops): New variable. Set to 0 to
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@ -149,9 +156,9 @@
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2000-05-24 Tom Rix <trix@redhat.com>
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* config/obj-coff.c : (add_lineno) xcoff allows negative line
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* config/obj-coff.c (add_lineno): xcoff allows negative line
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numbers
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* config/tc-ppc.c (ppc_stabx) : fix generated symbol
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* config/tc-ppc.c (ppc_stabx): fix generated symbol
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2001-05-24 Alan Modra <amodra@one.net.au>
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@ -932,7 +939,7 @@
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2001-02-16 matthew green <mrg@redhat.com>
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* gas/cgen.c (gas_cgen_md_apply_fix3): Support BFD_RELOC_64.
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* cgen.c (gas_cgen_md_apply_fix3): Support BFD_RELOC_64.
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2001-02-13 Jim Wilson <wilson@redhat.com>
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@ -1493,8 +1493,8 @@ obj_coff_section (ignore)
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{
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/* This section's attributes have already been set. Warn if the
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attributes don't match. */
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flagword matchflags = SEC_ALLOC | SEC_LOAD | SEC_READONLY | SEC_CODE
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| SEC_DATA | SEC_SHARED | SEC_NEVER_LOAD;
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flagword matchflags = (SEC_ALLOC | SEC_LOAD | SEC_READONLY | SEC_CODE
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| SEC_DATA | SEC_SHARED | SEC_NEVER_LOAD);
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if ((flags ^ oldflags) & matchflags)
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as_warn (_("Ignoring changed section attributes for %s"), name);
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}
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@ -1269,7 +1269,8 @@ md_assemble (line)
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}
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if (!is_space_char (*l)
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&& *l != END_OF_INSN
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&& *l != PREFIX_SEPARATOR)
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&& *l != PREFIX_SEPARATOR
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&& *l != ',')
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{
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as_bad (_("invalid character %s in mnemonic"),
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output_invalid (*l));
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@ -1360,6 +1361,38 @@ md_assemble (line)
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}
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}
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if (current_templates->start->opcode_modifier & (Jump | JumpByte))
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{
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/* Check for a branch hint. We allow ",pt" and ",pn" for
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predict taken and predict not taken respectively.
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I'm not sure that branch hints actually do anything on loop
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and jcxz insns (JumpByte) for current Pentium4 chips. They
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may work in the future and it doesn't hurt to accept them
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now. */
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if (l[0] == ',' && l[1] == 'p')
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{
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if (l[2] == 't')
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{
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if (! add_prefix (DS_PREFIX_OPCODE))
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return;
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l += 3;
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}
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else if (l[2] == 'n')
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{
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if (! add_prefix (CS_PREFIX_OPCODE))
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return;
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l += 3;
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}
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}
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}
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/* Any other comma loses. */
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if (*l == ',')
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{
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as_bad (_("invalid character %s in mnemonic"),
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output_invalid (*l));
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return;
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}
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/* Check if instruction is supported on specified architecture. */
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if (cpu_arch_flags != 0)
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{
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@ -1,3 +1,16 @@
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2001-06-10 Alan Modra <amodra@bigpond.net.au>
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* configure.in: Sort 'ta' case statement.
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* configure: Regenerate.
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* i386-dis.c (dis386_att): Add 'H' to conditional branch and
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loop,jcxz insns.
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(disx86_64_att): Likewise.
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(dis386_twobyte_att): Likewise.
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(print_insn_i386): Don't print branch hints as a prefix.
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(putop): 'H' macro prints branch hints.
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(get64): Kill compile warnings.
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2001-06-09 Alexandre Oliva <aoliva@redhat.com>
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* sh-opc.h (sh_table): Don't use empty initializers.
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@ -11,8 +24,8 @@
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2001-06-06 Peter Jakubek <pjak@snafu.de>
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* opcodes/m68k-dis.c (print_insn_m68k): Fix typo.
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* opcodes/m68k-opc.c (m68k_opcodes): Correct allowed operands for
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* m68k-dis.c (print_insn_m68k): Fix typo.
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* m68k-opc.c (m68k_opcodes): Correct allowed operands for
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mcf (ColdFire) div, rem and moveb instructions.
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2001-06-06 Alan Modra <amodra@bigpond.net.au>
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@ -4547,8 +4547,8 @@ if test x${all_targets} = xfalse ; then
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bfd_pdp11_arch) ta="$ta pdp11-dis.lo pdp11-opc.lo" ;;
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bfd_pj_arch) ta="$ta pj-dis.lo pj-opc.lo" ;;
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bfd_powerpc_arch) ta="$ta ppc-dis.lo ppc-opc.lo" ;;
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bfd_pyramid_arch) ;;
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bfd_powerpc_64_arch) ta="$ta ppc-dis.lo ppc-opc.lo" ;;
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bfd_pyramid_arch) ;;
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bfd_romp_arch) ;;
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bfd_rs6000_arch) ta="$ta ppc-dis.lo ppc-opc.lo" ;;
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bfd_s390_arch) ta="$ta s390-dis.lo s390-opc.lo" ;;
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@ -199,8 +199,8 @@ if test x${all_targets} = xfalse ; then
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bfd_pdp11_arch) ta="$ta pdp11-dis.lo pdp11-opc.lo" ;;
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bfd_pj_arch) ta="$ta pj-dis.lo pj-opc.lo" ;;
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bfd_powerpc_arch) ta="$ta ppc-dis.lo ppc-opc.lo" ;;
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bfd_pyramid_arch) ;;
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bfd_powerpc_64_arch) ta="$ta ppc-dis.lo ppc-opc.lo" ;;
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bfd_pyramid_arch) ;;
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bfd_romp_arch) ;;
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bfd_rs6000_arch) ta="$ta ppc-dis.lo ppc-opc.lo" ;;
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bfd_s390_arch) ta="$ta s390-dis.lo s390-opc.lo" ;;
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@ -436,6 +436,7 @@ struct dis386 {
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'B' => print 'b' if suffix_always is true
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'E' => print 'e' if 32-bit form of jcxz
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'F' => print 'w' or 'l' depending on address size prefix (loop insns)
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'H' => print ",pt" or ",pn" branch hint
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'L' => print 'l' if suffix_always is true
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'N' => print 'n' if instruction has no wait "prefix"
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'O' => print 'd', or 'o'
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@ -580,23 +581,23 @@ static const struct dis386 dis386_att[] = {
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{ "outsb", indirDX, Xb, XX },
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{ "outsR", indirDX, Xv, XX },
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/* 70 */
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{ "jo", Jb, cond_jump_flag, XX },
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{ "jno", Jb, cond_jump_flag, XX },
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{ "jb", Jb, cond_jump_flag, XX },
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{ "jae", Jb, cond_jump_flag, XX },
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{ "je", Jb, cond_jump_flag, XX },
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{ "jne", Jb, cond_jump_flag, XX },
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{ "jbe", Jb, cond_jump_flag, XX },
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{ "ja", Jb, cond_jump_flag, XX },
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{ "joH", Jb, cond_jump_flag, XX },
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{ "jnoH", Jb, cond_jump_flag, XX },
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{ "jbH", Jb, cond_jump_flag, XX },
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{ "jaeH", Jb, cond_jump_flag, XX },
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{ "jeH", Jb, cond_jump_flag, XX },
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{ "jneH", Jb, cond_jump_flag, XX },
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{ "jbeH", Jb, cond_jump_flag, XX },
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{ "jaH", Jb, cond_jump_flag, XX },
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/* 78 */
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{ "js", Jb, cond_jump_flag, XX },
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{ "jns", Jb, cond_jump_flag, XX },
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{ "jp", Jb, cond_jump_flag, XX },
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{ "jnp", Jb, cond_jump_flag, XX },
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{ "jl", Jb, cond_jump_flag, XX },
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{ "jge", Jb, cond_jump_flag, XX },
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{ "jle", Jb, cond_jump_flag, XX },
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{ "jg", Jb, cond_jump_flag, XX },
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{ "jsH", Jb, cond_jump_flag, XX },
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{ "jnsH", Jb, cond_jump_flag, XX },
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{ "jpH", Jb, cond_jump_flag, XX },
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{ "jnpH", Jb, cond_jump_flag, XX },
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{ "jlH", Jb, cond_jump_flag, XX },
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{ "jgeH", Jb, cond_jump_flag, XX },
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{ "jleH", Jb, cond_jump_flag, XX },
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{ "jgH", Jb, cond_jump_flag, XX },
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/* 80 */
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{ GRP1b },
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{ GRP1S },
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@ -707,10 +708,10 @@ static const struct dis386 dis386_att[] = {
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{ FLOAT },
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{ FLOAT },
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/* e0 */
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{ "loopneF", Jb, loop_jcxz_flag, XX },
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{ "loopeF", Jb, loop_jcxz_flag, XX },
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{ "loopF", Jb, loop_jcxz_flag, XX },
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{ "jEcxz", Jb, loop_jcxz_flag, XX },
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{ "loopneFH", Jb, loop_jcxz_flag, XX },
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{ "loopeFH", Jb, loop_jcxz_flag, XX },
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{ "loopFH", Jb, loop_jcxz_flag, XX },
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{ "jEcxzH", Jb, loop_jcxz_flag, XX },
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{ "inB", AL, Ib, XX },
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{ "inS", eAX, Ib, XX },
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{ "outB", Ib, AL, XX },
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@ -1166,23 +1167,23 @@ static const struct dis386 disx86_64_att[] = {
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{ "outsb", indirDX, Xb, XX },
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{ "outsR", indirDX, Xv, XX },
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/* 70 */
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{ "jo", Jb, cond_jump_flag, XX },
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{ "jno", Jb, cond_jump_flag, XX },
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{ "jb", Jb, cond_jump_flag, XX },
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{ "jae", Jb, cond_jump_flag, XX },
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{ "je", Jb, cond_jump_flag, XX },
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{ "jne", Jb, cond_jump_flag, XX },
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{ "jbe", Jb, cond_jump_flag, XX },
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{ "ja", Jb, cond_jump_flag, XX },
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{ "joH", Jb, cond_jump_flag, XX },
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{ "jnoH", Jb, cond_jump_flag, XX },
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{ "jbH", Jb, cond_jump_flag, XX },
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{ "jaeH", Jb, cond_jump_flag, XX },
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{ "jeH", Jb, cond_jump_flag, XX },
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{ "jneH", Jb, cond_jump_flag, XX },
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{ "jbeH", Jb, cond_jump_flag, XX },
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{ "jaH", Jb, cond_jump_flag, XX },
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/* 78 */
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{ "js", Jb, cond_jump_flag, XX },
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{ "jns", Jb, cond_jump_flag, XX },
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{ "jp", Jb, cond_jump_flag, XX },
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{ "jnp", Jb, cond_jump_flag, XX },
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{ "jl", Jb, cond_jump_flag, XX },
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{ "jge", Jb, cond_jump_flag, XX },
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{ "jle", Jb, cond_jump_flag, XX },
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{ "jg", Jb, cond_jump_flag, XX },
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{ "jsH", Jb, cond_jump_flag, XX },
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{ "jnsH", Jb, cond_jump_flag, XX },
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{ "jpH", Jb, cond_jump_flag, XX },
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{ "jnpH", Jb, cond_jump_flag, XX },
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{ "jlH", Jb, cond_jump_flag, XX },
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{ "jgeH", Jb, cond_jump_flag, XX },
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{ "jleH", Jb, cond_jump_flag, XX },
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{ "jgH", Jb, cond_jump_flag, XX },
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/* 80 */
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{ GRP1b },
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{ GRP1S },
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@ -1293,10 +1294,10 @@ static const struct dis386 disx86_64_att[] = {
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{ FLOAT },
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{ FLOAT },
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/* e0 */
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{ "loopneF", Jb, loop_jcxz_flag, XX },
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{ "loopeF", Jb, loop_jcxz_flag, XX },
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{ "loopF", Jb, loop_jcxz_flag, XX },
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{ "jEcxz", Jb, loop_jcxz_flag, XX },
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{ "loopneFH", Jb, loop_jcxz_flag, XX },
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{ "loopeFH", Jb, loop_jcxz_flag, XX },
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{ "loopFH", Jb, loop_jcxz_flag, XX },
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{ "jEcxzH", Jb, loop_jcxz_flag, XX },
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{ "inB", AL, Ib, XX },
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{ "inS", eAX, Ib, XX },
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{ "outB", Ib, AL, XX },
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@ -1769,23 +1770,23 @@ static const struct dis386 dis386_twobyte_att[] = {
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{ PREGRP23 },
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{ PREGRP20 },
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/* 80 */
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{ "jo", Jv, cond_jump_flag, XX },
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{ "jno", Jv, cond_jump_flag, XX },
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{ "jb", Jv, cond_jump_flag, XX },
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{ "jae", Jv, cond_jump_flag, XX },
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{ "je", Jv, cond_jump_flag, XX },
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{ "jne", Jv, cond_jump_flag, XX },
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{ "jbe", Jv, cond_jump_flag, XX },
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{ "ja", Jv, cond_jump_flag, XX },
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{ "joH", Jv, cond_jump_flag, XX },
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{ "jnoH", Jv, cond_jump_flag, XX },
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{ "jbH", Jv, cond_jump_flag, XX },
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{ "jaeH", Jv, cond_jump_flag, XX },
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{ "jeH", Jv, cond_jump_flag, XX },
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{ "jneH", Jv, cond_jump_flag, XX },
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{ "jbeH", Jv, cond_jump_flag, XX },
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{ "jaH", Jv, cond_jump_flag, XX },
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/* 88 */
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{ "js", Jv, cond_jump_flag, XX },
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{ "jns", Jv, cond_jump_flag, XX },
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{ "jp", Jv, cond_jump_flag, XX },
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{ "jnp", Jv, cond_jump_flag, XX },
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{ "jl", Jv, cond_jump_flag, XX },
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{ "jge", Jv, cond_jump_flag, XX },
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{ "jle", Jv, cond_jump_flag, XX },
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{ "jg", Jv, cond_jump_flag, XX },
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{ "jsH", Jv, cond_jump_flag, XX },
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{ "jnsH", Jv, cond_jump_flag, XX },
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{ "jpH", Jv, cond_jump_flag, XX },
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{ "jnpH", Jv, cond_jump_flag, XX },
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{ "jlH", Jv, cond_jump_flag, XX },
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{ "jgeH", Jv, cond_jump_flag, XX },
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{ "jleH", Jv, cond_jump_flag, XX },
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{ "jgH", Jv, cond_jump_flag, XX },
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/* 90 */
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{ "seto", Eb, XX, XX },
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{ "setno", Eb, XX, XX },
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@ -3158,20 +3159,6 @@ print_insn_i386 (pc, info)
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}
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}
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if (dp->bytemode2 == cond_jump_mode || dp->bytemode2 == loop_jcxz_mode)
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{
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if ((prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_CS)
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{
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oappend ("cs ");
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used_prefixes |= PREFIX_CS;
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}
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if ((prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_DS)
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{
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oappend ("ds ");
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used_prefixes |= PREFIX_DS;
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}
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}
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if (need_modrm)
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{
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FETCH_DATA (info, codep + 1);
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@ -3766,6 +3753,19 @@ putop (template, sizeflag)
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used_prefixes |= (prefixes & PREFIX_ADDR);
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}
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break;
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case 'H':
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if ((prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_CS
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|| (prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_DS)
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{
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used_prefixes |= prefixes & (PREFIX_CS | PREFIX_DS);
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*obufp++ = ',';
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*obufp++ = 'p';
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if (prefixes & PREFIX_DS)
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*obufp++ = 't';
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else
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*obufp++ = 'n';
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}
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break;
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case 'I':
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if (intel_syntax)
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break;
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@ -4405,23 +4405,24 @@ OP_G (bytemode, sizeflag)
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static bfd_vma
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get64 ()
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{
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unsigned int a = 0;
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unsigned int b = 0;
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bfd_vma x = 0;
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bfd_vma x;
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#ifdef BFD64
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unsigned int a;
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unsigned int b;
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FETCH_DATA (the_info, codep + 8);
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a = *codep++ & 0xff;
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a |= (*codep++ & 0xff) << 8;
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a |= (*codep++ & 0xff) << 16;
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a |= (*codep++ & 0xff) << 24;
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b |= (*codep++ & 0xff);
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b = *codep++ & 0xff;
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b |= (*codep++ & 0xff) << 8;
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b |= (*codep++ & 0xff) << 16;
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b |= (*codep++ & 0xff) << 24;
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x = a + ((bfd_vma) b << 32);
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#else
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abort();
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x = 0;
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#endif
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return x;
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}
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