2003-11-15 Andrew Cagney <cagney@redhat.com>
* mips-tdep.c (mips_register_type): Simplify. Eliminate reference to MIPS_REGISTER_TYPE. Make integer registers signed. Make IRIX n32 registers 64 bit. (mips_register_raw_size, mips_register_byte): For pseudo registers, use the register's pseudo size and not the corresponding raw register's size. * config/mips/tm-mips64.h (MIPS_REGISTER_TYPE): Delete macro. * config/mips/tm-mips.h (MIPS_REGISTER_TYPE): Delete macro. * config/mips/tm-irix6.h: Don't #undef MIPS_REGISTER_TYPE. * config/mips/tm-irix5.h (MIPS_REGISTER_TYPE): Delete macro.
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Andrew Cagney
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@ -1,3 +1,16 @@
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2003-11-15 Andrew Cagney <cagney@redhat.com>
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* mips-tdep.c (mips_register_type): Simplify. Eliminate reference
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to MIPS_REGISTER_TYPE. Make integer registers signed. Make IRIX
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n32 registers 64 bit.
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(mips_register_raw_size, mips_register_byte): For pseudo
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registers, use the register's pseudo size and not the
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corresponding raw register's size.
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* config/mips/tm-mips64.h (MIPS_REGISTER_TYPE): Delete macro.
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* config/mips/tm-mips.h (MIPS_REGISTER_TYPE): Delete macro.
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* config/mips/tm-irix6.h: Don't #undef MIPS_REGISTER_TYPE.
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* config/mips/tm-irix5.h (MIPS_REGISTER_TYPE): Delete macro.
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2003-11-15 Andrew Cagney <cagney@redhat.com>
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* mips-tdep.c (struct gdbarch_tdep): Delete member
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@ -84,13 +84,6 @@
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((N) - FP0_REGNUM) * sizeof(double) : \
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32 * sizeof(double) + ((N) - 32) * mips_regsize (current_gdbarch))
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#undef MIPS_REGISTER_TYPE
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#define MIPS_REGISTER_TYPE(N) \
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(((N) >= FP0_REGNUM && (N) < FP0_REGNUM+32) ? builtin_type_double \
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: ((N) == 32 /*SR*/) ? builtin_type_uint32 \
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: ((N) >= 70 && (N) <= 89) ? builtin_type_uint32 \
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: builtin_type_int)
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#endif /* N32 */
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@ -92,10 +92,3 @@
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#undef SIGFRAME_FPREGSAVE_OFF
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#define SIGFRAME_FPREGSAVE_OFF (SIGFRAME_BASE + 2 * 4 + 8 + 32 * 8 + 4)
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#define SIGFRAME_REG_SIZE 8
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/* Undefine those methods which have been multiarched. */
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/* Undefine MIPS_REGISTER_TYPE, so that GDB uses real C code in
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mips_register_type() to return the register type, instead of
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relying on this macro. */
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#undef MIPS_REGISTER_TYPE
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@ -94,17 +94,6 @@ extern int mips_step_skips_delay (CORE_ADDR);
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#define MIPS_REGISTER_BYTE(N) ((N) * mips_regsize (current_gdbarch))
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/* Return the GDB type object for the "standard" data type of data in
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register N. */
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#ifndef MIPS_REGISTER_TYPE
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#define MIPS_REGISTER_TYPE(N) \
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(((N) >= FP0_REGNUM && (N) < FP0_REGNUM+32) ? builtin_type_float \
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: ((N) == 32 /*SR*/) ? builtin_type_uint32 \
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: ((N) >= 70 && (N) <= 89) ? builtin_type_uint32 \
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: builtin_type_int)
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#endif
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/* Special symbol found in blocks associated with routines. We can hang
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mips_extra_func_info_t's off of this. */
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@ -19,13 +19,6 @@
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Foundation, Inc., 59 Temple Place - Suite 330,
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Boston, MA 02111-1307, USA. */
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/* define 8 byte register type */
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#define MIPS_REGISTER_TYPE(N) \
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(((N) >= FP0_REGNUM && (N) < FP0_REGNUM+32) ? builtin_type_double \
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: ((N) == 32 /*SR*/) ? builtin_type_uint32 \
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: ((N) >= 70 && (N) <= 89) ? builtin_type_uint32 \
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: builtin_type_long_long)
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/* Load double words in CALL_DUMMY. */
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#define OP_LDFPR 065 /* ldc1 */
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#define OP_LDGPR 067 /* ld */
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@ -649,9 +649,8 @@ mips_register_raw_size (int regnum)
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else if (regnum < 2 * NUM_REGS)
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{
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/* For the moment map [NUM_REGS .. 2*NUM_REGS) onto the same raw
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registers, but always return the virtual size. */
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int rawnum = regnum % NUM_REGS;
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return TYPE_LENGTH (gdbarch_register_type (current_gdbarch, rawnum));
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registers, but return the register's virtual size. */
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return TYPE_LENGTH (gdbarch_register_type (current_gdbarch, regnum));
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}
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else
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internal_error (__FILE__, __LINE__, "Register %d out of range", regnum);
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@ -681,8 +680,7 @@ mips_register_byte (int regnum)
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/* Add space for all the proceeding registers based on their
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real size. */
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for (reg = NUM_REGS; reg < regnum; reg++)
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byte += TYPE_LENGTH (gdbarch_register_type (current_gdbarch,
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(reg % NUM_REGS)));
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byte += TYPE_LENGTH (gdbarch_register_type (current_gdbarch, reg));
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return byte;
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}
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else
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@ -762,35 +760,40 @@ mips_value_to_register (struct frame_info *frame, int regnum,
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static struct type *
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mips_register_type (struct gdbarch *gdbarch, int regnum)
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{
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/* For moment, map [NUM_REGS .. 2*NUM_REGS) onto the same raw
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registers. Even return the same type. */
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int rawnum = regnum % NUM_REGS;
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gdb_assert (rawnum >= 0 && rawnum < NUM_REGS);
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#ifdef MIPS_REGISTER_TYPE
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return MIPS_REGISTER_TYPE (rawnum);
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#else
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if (FP0_REGNUM <= rawnum && rawnum < FP0_REGNUM + 32)
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gdb_assert (regnum >= 0 && regnum < 2 * NUM_REGS);
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if ((regnum % NUM_REGS) >= FP0_REGNUM
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&& (regnum % NUM_REGS) < FP0_REGNUM + 32)
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{
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/* Floating point registers... */
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if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
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return builtin_type_ieee_double_big;
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else
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return builtin_type_ieee_double_little;
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/* The floating-point registers raw, or cooked, always match
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mips_regsize(), and also map 1:1, byte for byte. */
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switch (gdbarch_byte_order (gdbarch))
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{
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case BFD_ENDIAN_BIG:
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if (mips_regsize (gdbarch) == 4)
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return builtin_type_ieee_single_big;
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else
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return builtin_type_ieee_double_big;
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case BFD_ENDIAN_LITTLE:
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if (mips_regsize (gdbarch) == 4)
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return builtin_type_ieee_single_little;
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else
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return builtin_type_ieee_double_little;
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case BFD_ENDIAN_UNKNOWN:
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default:
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internal_error (__FILE__, __LINE__, "bad switch");
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}
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}
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else if (rawnum == PS_REGNUM /* CR */)
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return builtin_type_uint32;
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else if (FCRCS_REGNUM <= rawnum && rawnum <= LAST_EMBED_REGNUM)
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return builtin_type_uint32;
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else if (regnum >= (NUM_REGS + FCRCS_REGNUM)
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&& regnum <= NUM_REGS + LAST_EMBED_REGNUM)
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/* The pseudo/cooked view of the embedded registers is always
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32-bit. The raw view is handled below. */
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return builtin_type_int32;
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else if (mips_regsize (gdbarch) == 8)
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/* 64-bit ISA. */
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return builtin_type_int64;
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else
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{
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/* Everything else...
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Return type appropriate for width of register. */
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if (mips_regsize (current_gdbarch) == TYPE_LENGTH (builtin_type_uint64))
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return builtin_type_uint64;
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else
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return builtin_type_uint32;
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}
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#endif
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/* 32-bit ISA. */
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return builtin_type_int32;
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}
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/* TARGET_READ_SP -- Remove useless bits from the stack pointer. */
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