* remote-e7000.c (HARD_BREAKPOINTS): Reenable.
(BC_BREAKPOINTS): Disable. * sh-tdep.c (print_insn): Cope with big and little endian machines. * sh/sh.mt: Use libsim.a * sh/tm-sh.h (TARGET_BYTE_ORDER_SELECTABLE): New (BREAKPOINT): Changed to be byteorder independent.
This commit is contained in:
parent
d2fd61a812
commit
5f2f280941
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@ -1,3 +1,12 @@
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Wed Nov 23 21:43:03 1994 Steve Chamberlain (sac@jonny.cygnus.com)
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* remote-e7000.c (HARD_BREAKPOINTS): Reenable.
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(BC_BREAKPOINTS): Disable.
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* sh-tdep.c (print_insn): Cope with big and little endian machines.
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* sh/sh.mt: Use libsim.a
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* sh/tm-sh.h (TARGET_BYTE_ORDER_SELECTABLE): New
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(BREAKPOINT): Changed to be byteorder independent.
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Tue Nov 22 19:13:39 1994 Stan Shebs (shebs@andros.cygnus.com)
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Tue Nov 22 19:13:39 1994 Stan Shebs (shebs@andros.cygnus.com)
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Maintenance commands to report time and space usage.
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Maintenance commands to report time and space usage.
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@ -1,11 +1,5 @@
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# Target: Hitachi Super-H ICE and simulator
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# Target: Hitachi Super-H ICE and simulator
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TDEPFILES= sh-tdep.o remote-sim.o interp.o table.o remote-e7000.o ser-e7kpc.o
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TDEPFILES= sh-tdep.o remote-sim.o ../sim/sh/libsim.a remote-e7000.o ser-e7kpc.o
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over: all
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over: all
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interp.o:
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cp ../sim/sh/interp.o .
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table.o:
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cp ../sim/sh/table.o .
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TM_FILE= tm-sh.h
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TM_FILE= tm-sh.h
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@ -25,7 +25,7 @@ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
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/* Define the bit, byte, and word ordering of the machine. */
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/* Define the bit, byte, and word ordering of the machine. */
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#define TARGET_BYTE_ORDER BIG_ENDIAN
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#define TARGET_BYTE_ORDER_SELECTABLE
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/* Offset from address of function to start of its code.
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/* Offset from address of function to start of its code.
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@ -58,9 +58,8 @@ extern CORE_ADDR sh_skip_prologue ();
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/* Illegal instruction - used by the simulator for breakpoint
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/* Illegal instruction - used by the simulator for breakpoint
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detection */
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detection */
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#define BREAKPOINT {0xc3, 0xff} /* 0xc3ff is trapa #ff */
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#define BREAKPOINT {0xc3, 0xc3} /* 0xc3c3 is trapa #c3, and it works in big
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#undef BREAKPOINT
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and little endian modes */
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#define BREAKPOINT {0x00, 0x1b} /* SLEEP */
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#define REMOTE_BREAKPOINT { 0xc3, 0x20}
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#define REMOTE_BREAKPOINT { 0xc3, 0x20}
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/* If your kernel resets the pc after the trap happens you may need to
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/* If your kernel resets the pc after the trap happens you may need to
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@ -32,6 +32,8 @@ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
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#include "dis-asm.h"
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#include "dis-asm.h"
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#include "../opcodes/sh-opc.h"
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#include "../opcodes/sh-opc.h"
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/* Prologue looks like
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/* Prologue looks like
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[mov.l <regs>,@-r15]...
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[mov.l <regs>,@-r15]...
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[sts.l pr,@-r15]
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[sts.l pr,@-r15]
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@ -83,9 +85,11 @@ print_insn (memaddr, stream)
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GDB_INIT_DISASSEMBLE_INFO (info, stream);
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GDB_INIT_DISASSEMBLE_INFO (info, stream);
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if (TARGET_BYTE_ORDER == BIG_ENDIAN)
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return print_insn_sh (memaddr, &info);
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return print_insn_sh (memaddr, &info);
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else
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return print_insn_shl (memaddr, &info);
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}
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}
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/* Given a GDB frame, determine the address of the calling function's frame.
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/* Given a GDB frame, determine the address of the calling function's frame.
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This will be used to create a new GDB frame struct, and then
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This will be used to create a new GDB frame struct, and then
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INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame.
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INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame.
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{
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{
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fi->return_pc = read_register (PR_REGNUM) + 4;
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fi->return_pc = read_register (PR_REGNUM) + 4;
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}
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}
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else {
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else
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{
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if (fsr->regs[PR_REGNUM])
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if (fsr->regs[PR_REGNUM])
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{
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{
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@ -269,7 +274,7 @@ pop_frame ()
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}
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}
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}
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}
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write_register (PC_REGNUM, fi->return_pc);
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write_register (PC_REGNUM, frame->return_pc);
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write_register (SP_REGNUM, fp + 4);
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write_register (SP_REGNUM, fp + 4);
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flush_cached_frames ();
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flush_cached_frames ();
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}
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}
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