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2003-06-20 Andrew Cagney <cagney@redhat.com> 

* sim_calls.c (sim_create_inferior): Assert that
	psim_write_register succeeded.
	(sim_fetch_register, sim_store_register): Make "regname" constant.
	Delete Altivec hack.  Return result from psim_read_register /
	psim_write_register.
	* psim.h (psim_read_register, psim_write_register): Change return
	type to int.  Update comments.
	* psim.c: Update copyright.
	(psim_stack): Assert that the psim_read_register worked.
	(psim_read_register, psim_read_register): Return the register's
	size.  Allocate the cooked buffer dynamically.
	* hw_register.c: Update copyright.
	(do_register_init): Check that psim_write_register succeeded.
	* hw_init.c: Update copyright.
	(create_ppc_elf_stack_frame, create_ppc_aix_stack_frame): Assert
	that the register transfer worked.
This commit is contained in:
Andrew Cagney 2003-06-20 13:32:34 +00:00
parent 8f3bab5775
commit 601cecf016
6 changed files with 87 additions and 68 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

19
sim/ppc/ChangeLog
View File

@ -1,3 +1,22 @@
2003-06-20 Andrew Cagney <cagney@redhat.com>
* sim_calls.c (sim_create_inferior): Assert that
psim_write_register succeeded.
(sim_fetch_register, sim_store_register): Make "regname" constant.
Delete Altivec hack. Return result from psim_read_register /
psim_write_register.
* psim.h (psim_read_register, psim_write_register): Change return
type to int. Update comments.
* psim.c: Update copyright.
(psim_stack): Assert that the psim_read_register worked.
(psim_read_register, psim_read_register): Return the register's
size. Allocate the cooked buffer dynamically.
* hw_register.c: Update copyright.
(do_register_init): Check that psim_write_register succeeded.
* hw_init.c: Update copyright.
(create_ppc_elf_stack_frame, create_ppc_aix_stack_frame): Assert
that the register transfer worked.
2003-06-19 Andrew Cagney <cagney@redhat.com>
* ld-insn.h: Update copyright.

42
sim/ppc/hw_init.c
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@ -1,6 +1,6 @@
/* This file is part of the program psim.
Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
Copyright 1994, 1997, 2003 Andrew Cagney
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
@ -591,16 +591,16 @@ create_ppc_elf_stack_frame(device *me,
start_argv, start_envp);
/* set up the registers */
psim_write_register(device_system(me), -1,
&top_of_stack, "sp", cooked_transfer);
psim_write_register(device_system(me), -1,
&argc, "r3", cooked_transfer);
psim_write_register(device_system(me), -1,
&start_argv, "r4", cooked_transfer);
psim_write_register(device_system(me), -1,
&start_envp, "r5", cooked_transfer);
psim_write_register(device_system(me), -1,
&start_aux, "r6", cooked_transfer);
ASSERT (psim_write_register(device_system(me), -1,
&top_of_stack, "sp", cooked_transfer) > 0);
ASSERT (psim_write_register(device_system(me), -1,
&argc, "r3", cooked_transfer) > 0);
ASSERT (psim_write_register(device_system(me), -1,
&start_argv, "r4", cooked_transfer) > 0);
ASSERT (psim_write_register(device_system(me), -1,
&start_envp, "r5", cooked_transfer) > 0);
ASSERT (psim_write_register(device_system(me), -1,
&start_aux, "r6", cooked_transfer) > 0);
}
static void
@ -619,16 +619,16 @@ create_ppc_aix_stack_frame(device *me,
create_ppc_elf_stack_frame(me, bottom_of_stack, argv, envp);
/* extract argument addresses from registers */
psim_read_register(device_system(me), 0,
&top_of_stack, "r1", cooked_transfer);
psim_read_register(device_system(me), 0,
&core_argc, "r3", cooked_transfer);
psim_read_register(device_system(me), 0,
&core_argv, "r4", cooked_transfer);
psim_read_register(device_system(me), 0,
&core_envp, "r5", cooked_transfer);
psim_read_register(device_system(me), 0,
&core_aux, "r6", cooked_transfer);
ASSERT (psim_read_register(device_system(me), 0,
&top_of_stack, "r1", cooked_transfer) > 0);
ASSERT (psim_read_register(device_system(me), 0,
&core_argc, "r3", cooked_transfer) > 0);
ASSERT (psim_read_register(device_system(me), 0,
&core_argv, "r4", cooked_transfer) > 0);
ASSERT (psim_read_register(device_system(me), 0,
&core_envp, "r5", cooked_transfer) > 0);
ASSERT (psim_read_register(device_system(me), 0,
&core_aux, "r6", cooked_transfer) > 0);
/* extract arguments from registers */
device_error(me, "Unfinished procedure create_ppc_aix_stack_frame\n");

11
sim/ppc/hw_register.c
View File

@ -1,6 +1,6 @@
/* This file is part of the program psim.
Copyright (C) 1994-1996, Andrew Cagney <cagney@highland.com.au>
Copyright 1994, 1995, 1996, 2003 Andrew Cagney
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
@ -98,10 +98,11 @@ do_register_init(device *me,
DTRACE(register, ("%d.%s=0x%lx\n", processor, name,
(unsigned long)value));
}
psim_write_register(system, processor, /* all processors */
&value,
name,
cooked_transfer);
if (psim_write_register(system, processor, /* all processors */
&value,
name,
cooked_transfer) <= 0)
error("Invalid register name %s\n", name);
}
}

40
sim/ppc/psim.c
View File

@ -1,6 +1,6 @@
/* This file is part of the program psim.
Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
Copyright 1994, 1995, 1996, 1997, 2003 Andrew Cagney
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
@ -729,7 +729,8 @@ psim_stack(psim *system,
"/openprom/init/stack");
if (stack_device != (device*)0) {
unsigned_word stack_pointer;
psim_read_register(system, 0, &stack_pointer, "sp", cooked_transfer);
ASSERT (psim_read_register(system, 0, &stack_pointer, "sp",
cooked_transfer) > 0);
device_ioctl(stack_device,
NULL, /*cpu*/
0, /*cia*/
@ -766,7 +767,7 @@ psim_run(psim *system)
/* storage manipulation functions */
INLINE_PSIM\
(void)
(int)
psim_read_register(psim *system,
int which_cpu,
void *buf,
@ -774,7 +775,7 @@ psim_read_register(psim *system,
transfer_mode mode)
{
register_descriptions description;
char cooked_buf[sizeof(unsigned_8)];
char *cooked_buf;
cpu *processor;
/* find our processor */
@ -792,7 +793,8 @@ psim_read_register(psim *system,
/* find the register description */
description = register_description(reg);
if (description.type == reg_invalid)
error("psim_read_register() invalid register name `%s'\n", reg);
return 0;
cooked_buf = alloca (description.size);
/* get the cooked value */
switch (description.type) {
@ -877,12 +879,13 @@ psim_read_register(psim *system,
memcpy(buf/*dest*/, cooked_buf/*src*/, description.size);
}
return description.size;
}
INLINE_PSIM\
(void)
(int)
psim_write_register(psim *system,
int which_cpu,
const void *buf,
@ -891,7 +894,7 @@ psim_write_register(psim *system,
{
cpu *processor;
register_descriptions description;
char cooked_buf[sizeof(unsigned_8)];
char *cooked_buf;
/* find our processor */
if (which_cpu == MAX_NR_PROCESSORS) {
@ -901,20 +904,22 @@ psim_write_register(psim *system,
else
which_cpu = system->last_cpu;
}
if (which_cpu == -1) {
int i;
for (i = 0; i < system->nr_cpus; i++)
psim_write_register(system, i, buf, reg, mode);
return;
}
ASSERT(which_cpu >= 0 && which_cpu < system->nr_cpus);
processor = system->processors[which_cpu];
/* find the description of the register */
description = register_description(reg);
if (description.type == reg_invalid)
error("psim_write_register() invalid register name %s\n", reg);
return 0;
cooked_buf = alloca (description.size);
if (which_cpu == -1) {
int i;
for (i = 0; i < system->nr_cpus; i++)
psim_write_register(system, i, buf, reg, mode);
return description.size;
}
ASSERT(which_cpu >= 0 && which_cpu < system->nr_cpus);
processor = system->processors[which_cpu];
/* If the data is comming in raw (target order), need to cook it
into host order before putting it into PSIM's internal structures */
@ -981,6 +986,7 @@ psim_write_register(psim *system,
}
return description.size;
}

11
sim/ppc/psim.h
View File

@ -138,21 +138,24 @@ extern event_queue *psim_event_queue
/* manipulate the state (registers or memory) of a processor within
/* Manipulate the state (registers or memory) of a processor within
the system. In the case of memory, the read/write is performed
using the specified processors address translation tables.
Where applicable, WHICH_CPU == -1 indicates all processors and
WHICH_CPU == <nr_cpus> indicates the `current' processor. */
WHICH_CPU == <nr_cpus> indicates the `current' processor.
extern void psim_read_register
The register functions return the size of the register, or 0 if the
register's name is not recognized. */
extern int psim_read_register
(psim *system,
int which_cpu,
void *host_ordered_buf,
const char reg[],
transfer_mode mode);
extern void psim_write_register
extern int psim_write_register
(psim *system,
int which_cpu,
const void *buf,

32
sim/ppc/sim_calls.c
View File

@ -1,6 +1,6 @@
/* This file is part of the program psim.
Copyright (C) 1994-1996,1998, Andrew Cagney <cagney@highland.com.au>
Copyright 1994, 1995, 1996, 1998, 2003 Andrew Cagney
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
@ -180,7 +180,7 @@ sim_write (SIM_DESC sd, SIM_ADDR mem, unsigned char *buf, int length)
int
sim_fetch_register (SIM_DESC sd, int regno, unsigned char *buf, int length)
{
char *regname;
const char *regname;
if (simulator == NULL) {
return 0;
@ -194,43 +194,33 @@ sim_fetch_register (SIM_DESC sd, int regno, unsigned char *buf, int length)
But there are loops that just walk through the entire list of
names and try to get everything. */
regname = gdbarch_register_name (current_gdbarch, regno);
/* FIXME: ezannoni 2002/04/15 Remove the 'vr' and 'vscr' check
once AltiVec support is committed. */
if (! regname || regname[0] == '\0'
|| (regname[0] == 'v' && regname[1] == 'r')
|| (strcmp (regname, "vscr") == 0))
if (! regname || regname[0] == '\0')
return -1;
TRACE(trace_gdb, ("sim_fetch_register(regno=%d(%s), buf=0x%lx)\n",
regno, regname, (long)buf));
psim_read_register(simulator, MAX_NR_PROCESSORS,
buf, regname, raw_transfer);
return -1;
return psim_read_register(simulator, MAX_NR_PROCESSORS,
buf, regname, raw_transfer);
}
int
sim_store_register (SIM_DESC sd, int regno, unsigned char *buf, int length)
{
char *regname;
const char *regname;
if (simulator == NULL)
return 0;
/* See comments in sim_fetch_register, above. */
regname = gdbarch_register_name (current_gdbarch, regno);
/* FIXME: ezannoni 2002/04/15 Remove the 'vr' and 'vscr' check
once AltiVec support is committed. */
if (! regname || regname[0] == '\0'
|| (regname[0] == 'v' && regname[1] == 'r')
|| (strcmp (regname, "vscr") == 0))
if (! regname || regname[0] == '\0')
return -1;
TRACE(trace_gdb, ("sim_store_register(regno=%d(%s), buf=0x%lx)\n",
regno, regname, (long)buf));
psim_write_register(simulator, MAX_NR_PROCESSORS,
buf, regname, raw_transfer);
return -1;
return psim_write_register(simulator, MAX_NR_PROCESSORS,
buf, regname, raw_transfer);
}
@ -263,8 +253,8 @@ sim_create_inferior (SIM_DESC sd,
psim_init(simulator);
psim_stack(simulator, argv, envp);
psim_write_register(simulator, -1 /* all start at same PC */,
&entry_point, "pc", cooked_transfer);
ASSERT (psim_write_register(simulator, -1 /* all start at same PC */,
&entry_point, "pc", cooked_transfer) > 0);
return SIM_RC_OK;
}