* v850-tdep.c (v850_generic_reg_names, v850e_reg_names,
v850_register_names, v850_processor_type_table): Declare tables and structures for handling differences in register names for v850 and v850e. (struct reg_list): Define new structure for creating tables of register bit masks in v850e instrutions. (handle_prepare, handle_pushm): New helpers for v850_scan_prologue. (v850_scan_prologue): Recognize v850e instructions: callt, prepare, and pushm. (v850_target_architecture_hook): New function to set register names based on current machine. (_initialize_v850_tdep): Set up target_architecture_hook. * config/v850/tm-v850.h (v850_register_names): Declare. (REGISTER_NAME): Define to refer to v850_register_names. (SR0_REGNUM, CTBP_REGNUM): Define. (PS_REGNUM): Redefine in terms of SR0_REGNUM.
This commit is contained in:
Mark Alexander
parent
d8f4ee32b2
commit
602886332b
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@ -1,3 +1,22 @@
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Tue Jan 26 16:02:47 1999 Mark Alexander <marka@cygnus.com>
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* v850-tdep.c (v850_generic_reg_names, v850e_reg_names,
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v850_register_names, v850_processor_type_table): Declare tables
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and structures for handling differences in register names for
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v850 and v850e.
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(struct reg_list): Define new structure for creating tables
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of register bit masks in v850e instrutions.
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(handle_prepare, handle_pushm): New helpers for v850_scan_prologue.
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(v850_scan_prologue): Recognize v850e instructions: callt, prepare,
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and pushm.
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(v850_target_architecture_hook): New function to set register
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names based on current machine.
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(_initialize_v850_tdep): Set up target_architecture_hook.
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* config/v850/tm-v850.h (v850_register_names): Declare.
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(REGISTER_NAME): Define to refer to v850_register_names.
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(SR0_REGNUM, CTBP_REGNUM): Define.
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(PS_REGNUM): Redefine in terms of SR0_REGNUM.
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Tue Jan 26 18:27:26 1999 Elena Zannoni <ezannoni@kwikemart.cygnus.com>
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* Makefile.in (c-exp.tab.c): use BISON instead of YACC, to pick
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@ -35,6 +35,13 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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\
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"pc", "fp" }
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/* Initializer for an array of names of registers.
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Entries beyond the first NUM_REGS are ignored. */
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extern char **v850_register_names;
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#define REGISTER_NAME(i) v850_register_names[i]
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#define REGISTER_BYTES (NUM_REGS * 4)
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#define REGISTER_SIZE 4
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@ -56,7 +63,9 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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#define SAVE3_START_REGNUM 31
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#define SAVE3_END_REGNUM 31
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#define RP_REGNUM 31
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#define PS_REGNUM 37
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#define SR0_REGNUM 32
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#define PS_REGNUM (SR0_REGNUM+5)
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#define CTBP_REGNUM (SR0_REGNUM+20)
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#define PC_REGNUM 64
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#define FP_REGNUM 65
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#define FP_RAW_REGNUM 29
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307
gdb/v850-tdep.c
307
gdb/v850-tdep.c
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@ -28,6 +28,36 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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#include "gdbcore.h"
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#include "symfile.h"
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static char *v850_generic_reg_names[] = REGISTER_NAMES;
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static char *v850e_reg_names[] =
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{
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"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
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"r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
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"r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
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"r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
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"eipc", "eipsw", "fepc", "fepsw", "ecr", "psw", "sr6", "sr7",
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"sr8", "sr9", "sr10", "sr11", "sr12", "sr13", "sr14", "sr15",
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"ctpc", "ctpsw", "dbpc", "dbpsw", "ctbp", "sr21", "sr22", "sr23",
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"sr24", "sr25", "sr26", "sr27", "sr28", "sr29", "sr30", "sr31",
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"pc", "fp"
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};
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char **v850_register_names = v850_generic_reg_names;
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struct
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{
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char **regnames;
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int mach;
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} v850_processor_type_table[] =
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{
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{ v850_generic_reg_names, bfd_mach_v850 },
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{ v850e_reg_names, bfd_mach_v850e },
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{ v850e_reg_names, bfd_mach_v850ea },
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{ NULL, 0 }
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};
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/* Info gleaned from scanning a function's prologue. */
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struct pifsr /* Info about one saved reg */
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@ -59,6 +89,189 @@ v850_use_struct_convention (gcc_p, type)
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return (TYPE_NFIELDS (type) > 1 || TYPE_LENGTH (type) > 4);
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}
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/* Structure for mapping bits in register lists to register numbers. */
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struct reg_list
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{
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long mask;
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int regno;
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};
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/* Helper function for v850_scan_prologue to handle prepare instruction. */
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static void
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handle_prepare (int insn, int insn2, CORE_ADDR *current_pc_ptr,
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struct prologue_info *pi, struct pifsr **pifsr_ptr)
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{
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CORE_ADDR current_pc = *current_pc_ptr;
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struct pifsr *pifsr = *pifsr_ptr;
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long next = insn2 & 0xffff;
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long list12 = ((insn & 1) << 16) + (next & 0xffe0);
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long offset = (insn & 0x3e) << 1;
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static struct reg_list reg_table [] =
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{
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{ 0x00800, 20 }, /* r20 */
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{ 0x00400, 21 }, /* r21 */
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{ 0x00200, 22 }, /* r22 */
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{ 0x00100, 23 }, /* r23 */
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{ 0x08000, 24 }, /* r24 */
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{ 0x04000, 25 }, /* r25 */
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{ 0x02000, 26 }, /* r26 */
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{ 0x01000, 27 }, /* r27 */
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{ 0x00080, 28 }, /* r28 */
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{ 0x00040, 29 }, /* r29 */
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{ 0x10000, 30 }, /* ep */
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{ 0x00020, 31 }, /* lp */
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{ 0, 0 } /* end of table */
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};
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int i;
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if ((next & 0x1f) == 0x0b) /* skip imm16 argument */
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current_pc += 2;
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else if ((next & 0x1f) == 0x13) /* skip imm16 argument */
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current_pc += 2;
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else if ((next & 0x1f) == 0x1b) /* skip imm32 argument */
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current_pc += 4;
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/* Calculate the total size of the saved registers, and add it
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it to the immediate value used to adjust SP. */
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for (i = 0; reg_table[i].mask != 0; i++)
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if (list12 & reg_table[i].mask)
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offset += REGISTER_RAW_SIZE (regtable[i].regno);
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pi->frameoffset -= offset;
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/* Calculate the offsets of the registers relative to the value
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the SP will have after the registers have been pushed and the
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imm5 value has been subtracted from it. */
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if (pifsr)
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{
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for (i = 0; reg_table[i].mask != 0; i++)
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{
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if (list12 & reg_table[i].mask)
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{
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int reg = reg_table[i].regno;
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offset -= REGISTER_RAW_SIZE (reg);
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pifsr->reg = reg;
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pifsr->offset = offset;
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pifsr->cur_frameoffset = pi->frameoffset;
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#ifdef DEBUG
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printf_filtered ("\tSaved register r%d, offset %d", reg, pifsr->offset);
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#endif
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pifsr++;
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}
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}
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}
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#ifdef DEBUG
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printf_filtered ("\tfound ctret after regsave func");
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#endif
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/* Set result parameters. */
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*current_pc_ptr = current_pc;
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*pifsr_ptr = pifsr;
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}
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/* Helper function for v850_scan_prologue to handle pushm/pushl instructions.
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FIXME: the SR bit of the register list is not supported; must check
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that the compiler does not ever generate this bit. */
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static void
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handle_pushm (int insn, int insn2, struct prologue_info *pi,
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struct pifsr **pifsr_ptr)
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{
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struct pifsr *pifsr = *pifsr_ptr;
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long list12 = ((insn & 0x0f) << 16) + (insn2 & 0xfff0);
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long offset = 0;
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static struct reg_list pushml_reg_table [] =
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{
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{ 0x80000, PS_REGNUM }, /* PSW */
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{ 0x40000, 1 }, /* r1 */
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{ 0x20000, 2 }, /* r2 */
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{ 0x10000, 3 }, /* r3 */
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{ 0x00800, 4 }, /* r4 */
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{ 0x00400, 5 }, /* r5 */
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{ 0x00200, 6 }, /* r6 */
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{ 0x00100, 7 }, /* r7 */
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{ 0x08000, 8 }, /* r8 */
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{ 0x04000, 9 }, /* r9 */
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{ 0x02000, 10 }, /* r10 */
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{ 0x01000, 11 }, /* r11 */
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{ 0x00080, 12 }, /* r12 */
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{ 0x00040, 13 }, /* r13 */
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{ 0x00020, 14 }, /* r14 */
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{ 0x00010, 15 }, /* r15 */
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{ 0, 0 } /* end of table */
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};
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static struct reg_list pushmh_reg_table [] =
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{
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{ 0x80000, 16 }, /* r16 */
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{ 0x40000, 17 }, /* r17 */
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{ 0x20000, 18 }, /* r18 */
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{ 0x10000, 19 }, /* r19 */
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{ 0x00800, 20 }, /* r20 */
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{ 0x00400, 21 }, /* r21 */
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{ 0x00200, 22 }, /* r22 */
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{ 0x00100, 23 }, /* r23 */
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{ 0x08000, 24 }, /* r24 */
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{ 0x04000, 25 }, /* r25 */
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{ 0x02000, 26 }, /* r26 */
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{ 0x01000, 27 }, /* r27 */
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{ 0x00080, 28 }, /* r28 */
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{ 0x00040, 29 }, /* r29 */
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{ 0x00010, 30 }, /* r30 */
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{ 0x00020, 31 }, /* r31 */
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{ 0, 0 } /* end of table */
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};
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struct reg_list *reg_table;
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int i;
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/* Is this a pushml or a pushmh? */
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if ((insn2 & 7) == 1)
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reg_table = pushml_reg_table;
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else
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reg_table = pushmh_reg_table;
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/* Calculate the total size of the saved registers, and add it
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it to the immediate value used to adjust SP. */
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for (i = 0; reg_table[i].mask != 0; i++)
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if (list12 & reg_table[i].mask)
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offset += REGISTER_RAW_SIZE (regtable[i].regno);
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pi->frameoffset -= offset;
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/* Calculate the offsets of the registers relative to the value
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the SP will have after the registers have been pushed and the
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imm5 value is subtracted from it. */
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if (pifsr)
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{
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for (i = 0; reg_table[i].mask != 0; i++)
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{
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if (list12 & reg_table[i].mask)
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{
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int reg = reg_table[i].regno;
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offset -= REGISTER_RAW_SIZE (reg);
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pifsr->reg = reg;
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pifsr->offset = offset;
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pifsr->cur_frameoffset = pi->frameoffset;
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#ifdef DEBUG
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printf_filtered ("\tSaved register r%d, offset %d", reg, pifsr->offset);
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#endif
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pifsr++;
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}
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}
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}
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#ifdef DEBUG
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printf_filtered ("\tfound ctret after regsave func");
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#endif
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/* Set result parameters. */
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*pifsr_ptr = pifsr;
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}
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/* Function: scan_prologue
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Scan the prologue of the function that contains PC, and record what
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@ -81,7 +294,6 @@ v850_scan_prologue (pc, pi)
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int reg;
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CORE_ADDR save_pc, save_end;
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int regsave_func_p;
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int current_sp_size;
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int r12_tmp;
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/* First, figure out the bounds of the prologue so that we can limit the
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@ -134,9 +346,9 @@ v850_scan_prologue (pc, pi)
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(long)func_addr, (long)prologue_end);
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#endif
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for (current_pc = func_addr; current_pc < prologue_end; current_pc += 2)
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for (current_pc = func_addr; current_pc < prologue_end; )
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{
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int insn;
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int insn, insn2;
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#ifdef DEBUG
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printf_filtered ("0x%.8lx ", (long)current_pc);
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@ -144,17 +356,23 @@ v850_scan_prologue (pc, pi)
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#endif
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insn = read_memory_unsigned_integer (current_pc, 2);
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current_pc += 2;
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if ((insn & 0x0780) >= 0x0600) /* Four byte instruction? */
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{
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insn2 = read_memory_unsigned_integer (current_pc, 2);
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current_pc += 2;
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}
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if ((insn & 0xffc0) == ((10 << 11) | 0x0780) && !regsave_func_p)
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{ /* jarl <func>,10 */
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long low_disp = read_memory_unsigned_integer (current_pc + 2, 2) & ~ (long) 1;
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long low_disp = insn2 & ~ (long) 1;
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long disp = (((((insn & 0x3f) << 16) + low_disp)
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& ~ (long) 1) ^ 0x00200000) - 0x00200000;
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save_pc = current_pc;
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save_end = prologue_end;
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regsave_func_p = 1;
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current_pc += disp - 2;
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current_pc += disp - 4;
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prologue_end = (current_pc
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+ (2 * 3) /* moves to/from ep */
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+ 4 /* addi <const>,sp,sp */
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@ -168,14 +386,55 @@ v850_scan_prologue (pc, pi)
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#endif
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continue;
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}
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else if ((insn & 0xffc0) == 0x0200 && !regsave_func_p)
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{ /* callt <imm6> */
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long ctbp = read_register (CTBP_REGNUM);
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long adr = ctbp + ((insn & 0x3f) << 1);
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save_pc = current_pc;
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save_end = prologue_end;
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regsave_func_p = 1;
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current_pc = ctbp + (read_memory_unsigned_integer (adr, 2) & 0xffff);
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prologue_end = (current_pc
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+ (2 * 3) /* prepare list2,imm5,sp/imm */
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+ 4 /* ctret */
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+ 20); /* slop area */
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#ifdef DEBUG
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printf_filtered ("\tfound callt, ctbp = 0x%.8lx, adr = %.8lx, new pc = 0x%.8lx\n",
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ctbp, adr, (long)current_pc);
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#endif
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continue;
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}
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else if ((insn & 0xffc0) == 0x0780) /* prepare list2,imm5 */
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{
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handle_prepare (insn, insn2, ¤t_pc, pi, &pifsr);
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continue;
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}
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else if (insn == 0x07e0 && regsave_func_p && insn2 == 0x0144)
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{ /* ctret after processing register save function */
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current_pc = save_pc;
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prologue_end = save_end;
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regsave_func_p = 0;
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#ifdef DEBUG
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printf_filtered ("\tfound ctret after regsave func");
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#endif
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continue;
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}
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else if ((insn & 0xfff0) == 0x07e0 && (insn2 & 5) == 1)
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{ /* pushml, pushmh */
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handle_pushm (insn, insn2, pi, &pifsr);
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continue;
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}
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else if ((insn & 0xffe0) == 0x0060 && regsave_func_p)
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{ /* jmp after processing register save function */
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current_pc = save_pc + 2;
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current_pc = save_pc;
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prologue_end = save_end;
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regsave_func_p = 0;
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#ifdef DEBUG
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printf_filtered ("\tfound jmp after regsave func");
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#endif
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continue;
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}
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else if ((insn & 0x07c0) == 0x0780 /* jarl or jr */
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|| (insn & 0xffe0) == 0x0060 /* jmp */
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@ -190,7 +449,7 @@ v850_scan_prologue (pc, pi)
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else if ((insn & 0xffe0) == ((SP_REGNUM << 11) | 0x0240)) /* add <imm>,sp */
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pi->frameoffset += ((insn & 0x1f) ^ 0x10) - 0x10;
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else if (insn == ((SP_REGNUM << 11) | 0x0600 | SP_REGNUM)) /* addi <imm>,sp,sp */
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pi->frameoffset += read_memory_integer (current_pc + 2, 2);
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pi->frameoffset += insn2;
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else if (insn == ((FP_RAW_REGNUM << 11) | 0x0000 | SP_REGNUM)) /* mov sp,fp */
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{
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fp_used = 1;
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@ -198,9 +457,9 @@ v850_scan_prologue (pc, pi)
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}
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else if (insn == ((R12_REGNUM << 11) | 0x0640 | R0_REGNUM)) /* movhi hi(const),r0,r12 */
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r12_tmp = read_memory_integer (current_pc + 2, 2) << 16;
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r12_tmp = insn2 << 16;
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else if (insn == ((R12_REGNUM << 11) | 0x0620 | R12_REGNUM)) /* movea lo(const),r12,r12 */
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r12_tmp += read_memory_integer (current_pc + 2, 2);
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r12_tmp += insn2;
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else if (insn == ((SP_REGNUM << 11) | 0x01c0 | R12_REGNUM) && r12_tmp) /* add r12,sp */
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pi->frameoffset = r12_tmp;
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else if (insn == ((EP_REGNUM << 11) | 0x0000 | SP_REGNUM)) /* mov sp,ep */
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@ -216,7 +475,7 @@ v850_scan_prologue (pc, pi)
|
|||
|| (reg >= SAVE3_START_REGNUM && reg <= SAVE3_END_REGNUM)))
|
||||
{
|
||||
pifsr->reg = reg;
|
||||
pifsr->offset = read_memory_integer (current_pc + 2, 2) & ~1;
|
||||
pifsr->offset = insn2 & ~1;
|
||||
pifsr->cur_frameoffset = pi->frameoffset;
|
||||
#ifdef DEBUG
|
||||
printf_filtered ("\tSaved register r%d, offset %d", reg, pifsr->offset);
|
||||
|
|
@ -240,9 +499,6 @@ v850_scan_prologue (pc, pi)
|
|||
pifsr++;
|
||||
}
|
||||
|
||||
if ((insn & 0x0780) >= 0x0600) /* Four byte instruction? */
|
||||
current_pc += 2;
|
||||
|
||||
#ifdef DEBUG
|
||||
printf_filtered ("\n");
|
||||
#endif
|
||||
|
|
@ -290,7 +546,6 @@ v850_init_extra_frame_info (fi)
|
|||
{
|
||||
struct prologue_info pi;
|
||||
struct pifsr pifsrs[NUM_REGS + 1], *pifsr;
|
||||
int reg;
|
||||
|
||||
if (fi->next)
|
||||
fi->pc = FRAME_SAVED_PC (fi->next);
|
||||
|
|
@ -598,8 +853,32 @@ v850_fix_call_dummy (dummy, sp, fun, nargs, args, type, gcc_p)
|
|||
return 0;
|
||||
}
|
||||
|
||||
/* Change the register names based on the current machine type. */
|
||||
|
||||
static int
|
||||
v850_target_architecture_hook (ap)
|
||||
const bfd_arch_info_type *ap;
|
||||
{
|
||||
int i, j;
|
||||
|
||||
if (ap->arch != bfd_arch_v850)
|
||||
return 0;
|
||||
|
||||
for (i = 0; v850_processor_type_table[i].regnames != NULL; i++)
|
||||
{
|
||||
if (v850_processor_type_table[i].mach == ap->mach)
|
||||
{
|
||||
v850_register_names = v850_processor_type_table[i].regnames;
|
||||
return 1;
|
||||
}
|
||||
}
|
||||
|
||||
fatal ("Architecture `%s' unreconized", ap->printable_name);
|
||||
}
|
||||
|
||||
void
|
||||
_initialize_v850_tdep ()
|
||||
{
|
||||
tm_print_insn = print_insn_v850;
|
||||
target_architecture_hook = v850_target_architecture_hook;
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in New Issue