* doc/c-alpha.texi: Fix typos.
* doc/c-ia64.texi: Likewise. * doc/c-mmix.texi: Likewise. * doc/c-sh64.texi: Likewise. * doc/c-xtensa.texi: Likewise. * doc/internals.texi: Likewise.
This commit is contained in:
Kazu Hirata
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3e685d417e
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@ -1,3 +1,12 @@
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2003-10-26 Kazu Hirata <kazu@cs.umass.edu>
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* doc/c-alpha.texi: Fix typos.
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* doc/c-ia64.texi: Likewise.
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* doc/c-mmix.texi: Likewise.
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* doc/c-sh64.texi: Likewise.
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* doc/c-xtensa.texi: Likewise.
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* doc/internals.texi: Likewise.
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2003-10-24 H.J. Lu <hongjiu.lu@intel.com>
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* config/obj-elf.c (obj_elf_change_section): Allow SHF_ALLOC
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@ -139,12 +139,12 @@ OpenVMS syntax, with a few differences for ELF.
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@cindex Alpha registers
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@cindex register names, Alpha
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The 32 integer registers are refered to as @samp{$@var{n}} or
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The 32 integer registers are referred to as @samp{$@var{n}} or
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@samp{$r@var{n}}. In addition, registers 15, 28, 29, and 30 may
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be refered to by the symbols @samp{$fp}, @samp{$at}, @samp{$gp},
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be referred to by the symbols @samp{$fp}, @samp{$at}, @samp{$gp},
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and @samp{$sp} respectively.
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The 32 floating-point registers are refered to as @samp{$f@var{n}}.
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The 32 floating-point registers are referred to as @samp{$f@var{n}}.
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@node Alpha-Relocs
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@subsection Relocations
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@ -153,7 +153,7 @@ The 32 floating-point registers are refered to as @samp{$f@var{n}}.
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Some of these relocations are available for ECOFF, but mostly
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only for ELF. They are modeled after the relocation format
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introduced in Digial Unix 4.0, but there are additions.
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introduced in Digital Unix 4.0, but there are additions.
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The format is @samp{!@var{tag}} or @samp{!@var{tag}!@var{number}}
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where @var{tag} is the name of the relocation. In some cases
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@ -110,12 +110,12 @@ Reference Guide.
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@cindex IA-64 registers
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@cindex register names, IA-64
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The 128 integer registers are refered to as @samp{r@var{n}}.
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The 128 floating-point registers are refered to as @samp{f@var{n}}.
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The 128 application registers are refered to as @samp{ar@var{n}}.
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The 128 control registers are refered to as @samp{cr@var{n}}.
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The 64 one-bit predicate registers are refered to as @samp{p@var{n}}.
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The 8 branch registers are refered to as @samp{b@var{n}}.
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The 128 integer registers are referred to as @samp{r@var{n}}.
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The 128 floating-point registers are referred to as @samp{f@var{n}}.
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The 128 application registers are referred to as @samp{ar@var{n}}.
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The 128 control registers are referred to as @samp{cr@var{n}}.
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The 64 one-bit predicate registers are referred to as @samp{p@var{n}}.
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The 8 branch registers are referred to as @samp{b@var{n}}.
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In addition, the assembler defines a number of aliases:
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@samp{gp} (@samp{r1}), @samp{sp} (@samp{r12}), @samp{rp} (@samp{b0}),
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@samp{ret0} (@samp{r8}), @samp{ret1} (@samp{r9}), @samp{ret2} (@samp{r10}),
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@ -443,7 +443,7 @@ operand can be omitted, defaulting to a zero value.
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The directives @samp{WYDE}, @samp{TETRA} and @samp{OCTA} emit constants of
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two, four and eight bytes size respectively. Before anything else happens
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for the directive, the current location is aligned to the respective
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constant-size bondary. If a label is defined at the beginning of the
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constant-size boundary. If a label is defined at the beginning of the
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line, its value will be that after the alignment. A single operand can be
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omitted, defaulting to a zero value emitted for the directive. Operands
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can be expressed as strings (@pxref{Strings}), in which case each
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@ -173,7 +173,7 @@ this directive unless you specified an ABI on the command line, and the
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ABIs specified must match.
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@item .uaquad
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Like .uaword and .ualong, this allows you to specify an intenionally
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Like .uaword and .ualong, this allows you to specify an intensionally
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unaligned quadword (64 bit word).
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@end table
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@ -213,7 +213,7 @@ opcodes (@pxref{Xtensa Opcodes, ,Opcode Names}), by using the
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Line Options}), or by using the @code{no-density} directive
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(@pxref{Density Directive, ,density}).
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It is a good idea @emph{not} to use the density instuctions directly.
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It is a good idea @emph{not} to use the density instructions directly.
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The assembler will automatically select dense instructions where
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possible. If you later need to avoid using the code density option, you
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can disable it in the assembler without having to modify the code.
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@ -351,7 +351,7 @@ range, function call relaxation can be enabled using the
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@cindex relaxation of @code{MOVI} instructions
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The @code{MOVI} machine instruction can only materialize values in the
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range from -2048 to 2047. Values outside this range are best
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materalized with @code{L32R} instructions. Thus:
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materialized with @code{L32R} instructions. Thus:
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@smallexample
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movi a0, 100000
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@ -1740,7 +1740,7 @@ Usually, if the symbol is in the same section as the frag (given by the
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@var{sec} argument), the narrowest likely relaxation mode is stored in
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@code{fr_subtype}, and that's that.
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If the symbol is undefined, or in a different section (and therefore moveable
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If the symbol is undefined, or in a different section (and therefore movable
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to an arbitrarily large distance), the largest available relaxation mode is
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specified, @code{fix_new} is called to produce the relocation record,
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@code{fr_fix} is increased to include the relocated field (remember, this
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