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x86: Check non-WIG EVEX instruction encoding with -mevexwig=1 

Verify that -mevexwig=1 has no impact on non-WIG EVEX instruction encoding.

	PR gas/23642
	* testsuite/gas/i386/evex-wig2.d: New file.
	* testsuite/gas/i386/evex-wig2.s: Likewise.
	* testsuite/gas/i386/x86-64-evex-wig2.d: Likewise.
	* testsuite/gas/i386/x86-64-evex-wig2.s: Likewise.
	* testsuite/gas/i386/i386.exp: Run evex-wig2 and
	x86-64-evex-wig2.
This commit is contained in:
H.J. Lu 2018-09-14 12:21:08 -07:00
parent 6865c0435a
commit 606cc04085
6 changed files with 68 additions and 0 deletions
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10
gas/ChangeLog
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@ -1,3 +1,13 @@
2018-09-14 H.J. Lu <hongjiu.lu@intel.com>
PR gas/23642
* testsuite/gas/i386/evex-wig2.d: New file.
* testsuite/gas/i386/evex-wig2.s: Likewise.
* testsuite/gas/i386/x86-64-evex-wig2.d: Likewise.
* testsuite/gas/i386/x86-64-evex-wig2.s: Likewise.
* testsuite/gas/i386/i386.exp: Run evex-wig2 and
x86-64-evex-wig2.
2018-09-14 H.J. Lu <hongjiu.lu@intel.com>
PR gas/23642

17
gas/testsuite/gas/i386/evex-wig2.d Normal file
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@ -0,0 +1,17 @@
#as: -mevexwig=1
#objdump: -dw
#name: i386 non-WIG EVEX insns with -mevexwig=1
.*: +file format .*
Disassembly of section .text:
0+ <_start>:
+[a-f0-9]+: 62 f1 56 38 2a f0 vcvtsi2ss %eax,\{rd-sae\},%xmm5,%xmm6
+[a-f0-9]+: 62 f1 56 08 2a f0 vcvtsi2ss %eax,%xmm5,%xmm6
+[a-f0-9]+: 62 f1 57 08 2a f0 vcvtsi2sd %eax,%xmm5,%xmm6
+[a-f0-9]+: 62 f1 56 38 7b f0 vcvtusi2ss %eax,\{rd-sae\},%xmm5,%xmm6
+[a-f0-9]+: 62 f1 56 08 7b f0 vcvtusi2ss %eax,%xmm5,%xmm6
+[a-f0-9]+: 62 f1 57 08 7b f0 vcvtusi2sd %eax,%xmm5,%xmm6
#pass

11
gas/testsuite/gas/i386/evex-wig2.s Normal file
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@ -0,0 +1,11 @@
# Check non-WIG EVEX instructions with -mevexwig=1
.allow_index_reg
.text
_start:
vcvtsi2ss %eax, {rd-sae}, %xmm5, %xmm6
{evex} vcvtsi2ss %eax, %xmm5, %xmm6
{evex} vcvtsi2sd %eax, %xmm5, %xmm6
vcvtusi2ss %eax, {rd-sae}, %xmm5, %xmm6
{evex} vcvtusi2ss %eax, %xmm5, %xmm6
{evex} vcvtusi2sd %eax, %xmm5, %xmm6

2
gas/testsuite/gas/i386/i386.exp
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@ -233,6 +233,7 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_32_check]]
run_dump_test "evex-lig512-intel"
run_dump_test "evex-wig1"
run_dump_test "evex-wig1-intel"
run_dump_test "evex-wig2"
run_dump_test "sse2avx"
run_list_test "inval-avx" "-al"
run_list_test "inval-avx512f" "-al"
@ -748,6 +749,7 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t
run_dump_test "x86-64-evex-lig512-intel"
run_dump_test "x86-64-evex-wig1"
run_dump_test "x86-64-evex-wig1-intel"
run_dump_test "x86-64-evex-wig2"
run_dump_test "x86-64-sse2avx"
run_list_test "x86-64-inval-avx" "-al"
run_list_test "x86-64-inval-avx512f" "-al"

17
gas/testsuite/gas/i386/x86-64-evex-wig2.d Normal file
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#as: -mevexwig=1
#objdump: -dw
#name: x86-64 non-WIG EVEX insns with -mevexwig=1
.*: +file format .*
Disassembly of section .text:
0+ <_start>:
+[a-f0-9]+: 62 f1 36 30 2a f0 vcvtsi2ss %eax,\{rd-sae\},%xmm25,%xmm6
+[a-f0-9]+: 62 f1 36 00 2a f0 vcvtsi2ss %eax,%xmm25,%xmm6
+[a-f0-9]+: 62 f1 37 00 2a f0 vcvtsi2sd %eax,%xmm25,%xmm6
+[a-f0-9]+: 62 f1 36 30 7b f0 vcvtusi2ss %eax,\{rd-sae\},%xmm25,%xmm6
+[a-f0-9]+: 62 f1 36 00 7b f0 vcvtusi2ss %eax,%xmm25,%xmm6
+[a-f0-9]+: 62 f1 07 08 7b f0 vcvtusi2sd %eax,%xmm15,%xmm6
#pass

11
gas/testsuite/gas/i386/x86-64-evex-wig2.s Normal file
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@ -0,0 +1,11 @@
# Check non-WIG EVEX instructions with -mevexwig=1
.allow_index_reg
.text
_start:
vcvtsi2ss %eax, {rd-sae}, %xmm25, %xmm6
vcvtsi2ss %eax, %xmm25, %xmm6
vcvtsi2sd %eax, %xmm25, %xmm6
vcvtusi2ss %eax, {rd-sae}, %xmm25, %xmm6
vcvtusi2ss %eax, %xmm25, %xmm6
vcvtusi2sd %eax, %xmm15, %xmm6