2004-10-30 Andrew Cagney <cagney@gnu.org>
* mips-tdep.h: Add comments on registers. (MIPS_UNUSED_REGNUM): Define. * config/mips/tm-mips.h (ZERO_REGNUM, UNUSED_REGNUM) (T9_REGNUM, V0_REGNUM, A0_REGNUM): Delete. * irix5-nat.c, mipsv4-nat.c, mips-linux-tdep.c: Update. * mips-linux-nat.c, remote-mips.c: Update.
This commit is contained in:
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@ -1,5 +1,12 @@
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2004-10-30 Andrew Cagney <cagney@gnu.org>
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2004-10-30 Andrew Cagney <cagney@gnu.org>
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* mips-tdep.h: Add comments on registers.
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(MIPS_UNUSED_REGNUM): Define.
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* config/mips/tm-mips.h (ZERO_REGNUM, UNUSED_REGNUM)
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(T9_REGNUM, V0_REGNUM, A0_REGNUM): Delete.
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* irix5-nat.c, mipsv4-nat.c, mips-linux-tdep.c: Update.
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* mips-linux-nat.c, remote-mips.c: Update.
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* config/mips/tm-mips.h (t_insn): Delete.
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* config/mips/tm-mips.h (t_insn): Delete.
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* mips-tdep.c (mips_fetch_instruction, mips_skip_trampoline_code):
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* mips-tdep.c (mips_fetch_instruction, mips_skip_trampoline_code):
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Replace t_insn with ULONGEST.
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Replace t_insn with ULONGEST.
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@ -43,20 +43,8 @@ extern int mips_step_skips_delay (CORE_ADDR);
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#define STEP_SKIPS_DELAY_P (1)
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#define STEP_SKIPS_DELAY_P (1)
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#define STEP_SKIPS_DELAY(pc) (mips_step_skips_delay (pc))
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#define STEP_SKIPS_DELAY(pc) (mips_step_skips_delay (pc))
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/* Register numbers of various important registers.
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Note that some of these values are "real" register numbers,
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and correspond to the general registers of the machine,
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and some are "phony" register numbers which are too large
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to be actual register numbers as far as the user is concerned
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but do serve to get the desired values when passed to read_register. */
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#define ZERO_REGNUM 0 /* read-only register, always 0 */
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#define V0_REGNUM 2 /* Function integer return value */
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#define A0_REGNUM 4 /* Loc of first arg during a subr call */
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#define T9_REGNUM 25 /* Contains address of callee in PIC */
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#define RA_REGNUM 31 /* Contains return address value */
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#define RA_REGNUM 31 /* Contains return address value */
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#define PS_REGNUM 32 /* Contains processor status */
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#define PS_REGNUM 32 /* Contains processor status */
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#define UNUSED_REGNUM 73 /* Never used, FIXME */
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#define FIRST_EMBED_REGNUM 74 /* First CP0 register for embedded use */
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#define FIRST_EMBED_REGNUM 74 /* First CP0 register for embedded use */
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#define PRID_REGNUM 89 /* Processor ID */
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#define PRID_REGNUM 89 /* Processor ID */
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#define LAST_EMBED_REGNUM 89 /* Last one */
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#define LAST_EMBED_REGNUM 89 /* Last one */
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@ -182,7 +182,7 @@ get_longjmp_target (CORE_ADDR *pc)
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CORE_ADDR jb_addr;
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CORE_ADDR jb_addr;
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buf = alloca (TARGET_PTR_BIT / TARGET_CHAR_BIT);
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buf = alloca (TARGET_PTR_BIT / TARGET_CHAR_BIT);
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jb_addr = read_register (A0_REGNUM);
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jb_addr = read_register (MIPS_A0_REGNUM);
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if (target_read_memory (jb_addr + JB_PC * JB_ELEMENT_SIZE, buf,
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if (target_read_memory (jb_addr + JB_PC * JB_ELEMENT_SIZE, buf,
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TARGET_PTR_BIT / TARGET_CHAR_BIT))
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TARGET_PTR_BIT / TARGET_CHAR_BIT))
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@ -24,13 +24,13 @@
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/* Pseudo registers can not be read. ptrace does not provide a way to
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/* Pseudo registers can not be read. ptrace does not provide a way to
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read (or set) PS_REGNUM, and there's no point in reading or setting
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read (or set) PS_REGNUM, and there's no point in reading or setting
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ZERO_REGNUM. We also can not set BADVADDR, CAUSE, or FCRIR via
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MIPS_ZERO_REGNUM. We also can not set BADVADDR, CAUSE, or FCRIR
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ptrace(). */
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via ptrace(). */
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int
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int
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mips_linux_cannot_fetch_register (int regno)
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mips_linux_cannot_fetch_register (int regno)
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{
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{
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if (regno > ZERO_REGNUM && regno < ZERO_REGNUM + 32)
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if (regno > MIPS_ZERO_REGNUM && regno < MIPS_ZERO_REGNUM + 32)
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return 0;
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return 0;
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else if (regno >= mips_regnum (current_gdbarch)->fp0
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else if (regno >= mips_regnum (current_gdbarch)->fp0
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&& regno <= mips_regnum (current_gdbarch)->fp0 + 32)
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&& regno <= mips_regnum (current_gdbarch)->fp0 + 32)
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@ -50,7 +50,7 @@ mips_linux_cannot_fetch_register (int regno)
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int
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int
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mips_linux_cannot_store_register (int regno)
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mips_linux_cannot_store_register (int regno)
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{
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{
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if (regno > ZERO_REGNUM && regno < ZERO_REGNUM + 32)
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if (regno > MIPS_ZERO_REGNUM && regno < MIPS_ZERO_REGNUM + 32)
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return 0;
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return 0;
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else if (regno >= FP0_REGNUM && regno <= FP0_REGNUM + 32)
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else if (regno >= FP0_REGNUM && regno <= FP0_REGNUM + 32)
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return 0;
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return 0;
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@ -76,7 +76,7 @@ mips_linux_get_longjmp_target (CORE_ADDR *pc)
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CORE_ADDR jb_addr;
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CORE_ADDR jb_addr;
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char buf[TARGET_PTR_BIT / TARGET_CHAR_BIT];
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char buf[TARGET_PTR_BIT / TARGET_CHAR_BIT];
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jb_addr = read_register (A0_REGNUM);
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jb_addr = read_register (MIPS_A0_REGNUM);
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if (target_read_memory (jb_addr
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if (target_read_memory (jb_addr
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+ MIPS_LINUX_JB_PC * MIPS_LINUX_JB_ELEMENT_SIZE,
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+ MIPS_LINUX_JB_PC * MIPS_LINUX_JB_ELEMENT_SIZE,
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@ -129,7 +129,7 @@ supply_gregset (elf_gregset_t *gregsetp)
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(char *)(regp + EF_CP0_CAUSE));
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(char *)(regp + EF_CP0_CAUSE));
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/* Fill inaccessible registers with zero. */
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/* Fill inaccessible registers with zero. */
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regcache_raw_supply (current_regcache, UNUSED_REGNUM, zerobuf);
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regcache_raw_supply (current_regcache, MIPS_UNUSED_REGNUM, zerobuf);
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for (regi = FIRST_EMBED_REGNUM; regi < LAST_EMBED_REGNUM; regi++)
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for (regi = FIRST_EMBED_REGNUM; regi < LAST_EMBED_REGNUM; regi++)
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regcache_raw_supply (current_regcache, regi, zerobuf);
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regcache_raw_supply (current_regcache, regi, zerobuf);
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}
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}
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@ -367,7 +367,7 @@ mips64_linux_get_longjmp_target (CORE_ADDR *pc)
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void *buf = alloca (TARGET_PTR_BIT / TARGET_CHAR_BIT);
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void *buf = alloca (TARGET_PTR_BIT / TARGET_CHAR_BIT);
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int element_size = TARGET_PTR_BIT == 32 ? 4 : 8;
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int element_size = TARGET_PTR_BIT == 32 ? 4 : 8;
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jb_addr = read_register (A0_REGNUM);
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jb_addr = read_register (MIPS_A0_REGNUM);
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if (target_read_memory (jb_addr + MIPS64_LINUX_JB_PC * element_size,
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if (target_read_memory (jb_addr + MIPS64_LINUX_JB_PC * element_size,
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buf, TARGET_PTR_BIT / TARGET_CHAR_BIT))
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buf, TARGET_PTR_BIT / TARGET_CHAR_BIT))
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@ -408,7 +408,7 @@ mips64_supply_gregset (mips64_elf_gregset_t *gregsetp)
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(char *)(regp + MIPS64_EF_CP0_CAUSE));
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(char *)(regp + MIPS64_EF_CP0_CAUSE));
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/* Fill inaccessible registers with zero. */
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/* Fill inaccessible registers with zero. */
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regcache_raw_supply (current_regcache, UNUSED_REGNUM, zerobuf);
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regcache_raw_supply (current_regcache, MIPS_UNUSED_REGNUM, zerobuf);
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for (regi = FIRST_EMBED_REGNUM; regi < LAST_EMBED_REGNUM; regi++)
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for (regi = FIRST_EMBED_REGNUM; regi < LAST_EMBED_REGNUM; regi++)
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regcache_raw_supply (current_regcache, regi, zerobuf);
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regcache_raw_supply (current_regcache, regi, zerobuf);
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}
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}
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@ -5374,10 +5374,6 @@ mips_dump_tdep (struct gdbarch *current_gdbarch, struct ui_file *file)
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fprintf_unfiltered (file,
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fprintf_unfiltered (file,
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"mips_dump_tdep: TRACE_SET # %s\n",
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"mips_dump_tdep: TRACE_SET # %s\n",
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XSTRING (TRACE_SET (X, STATE)));
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XSTRING (TRACE_SET (X, STATE)));
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#endif
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#ifdef UNUSED_REGNUM
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fprintf_unfiltered (file,
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"mips_dump_tdep: UNUSED_REGNUM = %d\n", UNUSED_REGNUM);
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#endif
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#endif
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fprintf_unfiltered (file,
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fprintf_unfiltered (file,
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"mips_dump_tdep: VM_MIN_ADDRESS = %ld\n",
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"mips_dump_tdep: VM_MIN_ADDRESS = %ld\n",
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@ -61,13 +61,20 @@ struct mips_regnum
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};
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};
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extern const struct mips_regnum *mips_regnum (struct gdbarch *gdbarch);
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extern const struct mips_regnum *mips_regnum (struct gdbarch *gdbarch);
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/* Register numbers of various important registers. Note that some of
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these values are "real" register numbers, and correspond to the
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general registers of the machine, and some are "phony" register
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numbers which are too large to be actual register numbers as far as
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the user is concerned but do serve to get the desired values when
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passed to read_register. */
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enum
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enum
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{
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{
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MIPS_ZERO_REGNUM = 0,
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MIPS_ZERO_REGNUM = 0, /* Read-only register, always 0. */
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MIPS_AT_REGNUM = 1,
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MIPS_AT_REGNUM = 1,
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MIPS_V0_REGNUM = 2,
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MIPS_V0_REGNUM = 2, /* Function integer return value. */
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MIPS_A0_REGNUM = 4,
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MIPS_A0_REGNUM = 4, /* Loc of first arg during a subr call */
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MIPS_T9_REGNUM = 25,
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MIPS_T9_REGNUM = 25, /* Contains address of callee in PIC. */
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MIPS_SP_REGNUM = 29,
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MIPS_SP_REGNUM = 29,
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MIPS_RA_REGNUM = 31,
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MIPS_RA_REGNUM = 31,
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MIPS_EMBED_LO_REGNUM = 33,
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MIPS_EMBED_LO_REGNUM = 33,
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MIPS_EMBED_BADVADDR_REGNUM = 35,
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MIPS_EMBED_BADVADDR_REGNUM = 35,
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MIPS_EMBED_CAUSE_REGNUM = 36,
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MIPS_EMBED_CAUSE_REGNUM = 36,
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MIPS_EMBED_PC_REGNUM = 37,
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MIPS_EMBED_PC_REGNUM = 37,
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MIPS_EMBED_FP0_REGNUM = 38
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MIPS_EMBED_FP0_REGNUM = 38,
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MIPS_UNUSED_REGNUM = 73 /* Never used, FIXME */
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};
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};
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/* Defined in mips-tdep.c and used in remote-mips.c */
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/* Defined in mips-tdep.c and used in remote-mips.c */
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@ -68,7 +68,7 @@ supply_gregset (gregset_t *gregsetp)
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mips_regnum (current_gdbarch)->badvaddr,
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mips_regnum (current_gdbarch)->badvaddr,
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zerobuf);
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zerobuf);
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regcache_raw_supply (current_regcache, DEPRECATED_FP_REGNUM, zerobuf);
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regcache_raw_supply (current_regcache, DEPRECATED_FP_REGNUM, zerobuf);
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regcache_raw_supply (current_regcache, UNUSED_REGNUM, zerobuf);
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regcache_raw_supply (current_regcache, MIPS_UNUSED_REGNUM, zerobuf);
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for (regi = FIRST_EMBED_REGNUM; regi <= LAST_EMBED_REGNUM; regi++)
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for (regi = FIRST_EMBED_REGNUM; regi <= LAST_EMBED_REGNUM; regi++)
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regcache_raw_supply (current_regcache, regi, zerobuf);
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regcache_raw_supply (current_regcache, regi, zerobuf);
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}
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}
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CORE_ADDR jb_addr;
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CORE_ADDR jb_addr;
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buf = alloca (TARGET_PTR_BIT / TARGET_CHAR_BIT);
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buf = alloca (TARGET_PTR_BIT / TARGET_CHAR_BIT);
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jb_addr = read_register (A0_REGNUM);
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jb_addr = read_register (MIPS_A0_REGNUM);
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if (target_read_memory (jb_addr + _JB_PC * JB_ELEMENT_SIZE, buf,
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if (target_read_memory (jb_addr + _JB_PC * JB_ELEMENT_SIZE, buf,
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TARGET_PTR_BIT / TARGET_CHAR_BIT))
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TARGET_PTR_BIT / TARGET_CHAR_BIT))
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@ -1905,7 +1905,7 @@ mips_fetch_registers (int regno)
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return;
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return;
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}
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}
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if (regno == DEPRECATED_FP_REGNUM || regno == ZERO_REGNUM)
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if (regno == DEPRECATED_FP_REGNUM || regno == MIPS_ZERO_REGNUM)
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/* DEPRECATED_FP_REGNUM on the mips is a hack which is just
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/* DEPRECATED_FP_REGNUM on the mips is a hack which is just
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supposed to read zero (see also mips-nat.c). */
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supposed to read zero (see also mips-nat.c). */
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val = 0;
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val = 0;
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