[AArch64] Implement branch over stub section.
Ensure that injection of a stub section does not break a link where there is an xpectation that flow of control can pass from one input section to another simply by linking the input sections in series. The solution here is to allow stub sections to be inserted after any input section (existing behaviour), but inject an additional branch at the start of each stub section such that control flow falling into the stub section will branch over the stub section.
This commit is contained in:
Marcus Shawcroft
Marcus Shawcroft
parent
d9ced15d6e
commit
618655192f
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@ -1,3 +1,11 @@
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2015-03-25 Marcus Shawcroft <marcus.shawcroft@arm.com>
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* elfnn-aarch64.c (_bfd_aarch64_resize_stubs): Adjust stub section
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size for initial branch.
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(elfNN_aarch64_build_stubs): Write initial branch.
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_bfd_aarch64_decode_(elfNN_aarch64_output_arch_local_syms): Write
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mapping symbol on initial branch.
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2015-03-25 Marcus Shawcroft <marcus.shawcroft@arm.com>
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* elfnn-aarch64.c (_bfd_aarch64_erratum_835769_scan):
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@ -3117,8 +3117,17 @@ _bfd_aarch64_resize_stubs (struct elf_aarch64_link_hash_table *htab)
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}
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bfd_hash_traverse (&htab->stub_hash_table, aarch64_size_one_stub, htab);
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}
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for (section = htab->stub_bfd->sections;
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section != NULL; section = section->next)
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{
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if (!strstr (section->name, STUB_SUFFIX))
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continue;
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if (section->size)
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section->size += 4;
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}
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}
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/* Determine and set the size of the stub section for a final link.
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@ -3482,6 +3491,9 @@ elfNN_aarch64_build_stubs (struct bfd_link_info *info)
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if (stub_sec->contents == NULL && size != 0)
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return FALSE;
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stub_sec->size = 0;
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bfd_putl32 (0x14000000 | (size >> 2), stub_sec->contents);
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stub_sec->size += 4;
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}
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/* Build the stubs as directed by the stub hash table. */
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@ -6501,6 +6513,10 @@ elfNN_aarch64_output_arch_local_syms (bfd *output_bfd,
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osi.sec_shndx = _bfd_elf_section_from_bfd_section
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(output_bfd, osi.sec->output_section);
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/* The first instruction in a stub is always a branch. */
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if (!elfNN_aarch64_output_map_sym (&osi, AARCH64_MAP_INSN, 0))
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return FALSE;
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bfd_hash_traverse (&htab->stub_hash_table, aarch64_map_one_stub,
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&osi);
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}
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@ -1,3 +1,11 @@
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2015-03-25 Marcus Shawcroft <marcus.shawcroft@arm.com>
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* ld-aarch64/erratum835769.d: Adjust for initial branch over stub
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section.
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* ld-aarch64/farcall-b.d: Likewise.
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* ld-aarch64/farcall-bl.d: Likewise.
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* ld-aarch64/farcall-back.d: Likewise.
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2015-03-25 Marcus Shawcroft <marcus.shawcroft@arm.com>
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* ld-aarch64/erratum835769.d: Adjust for removal of padding before
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@ -33,6 +33,7 @@ Disassembly of section .text:
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[ \t0-9a-f]+:[ \t]+aa0503e0[ \t]+mov[ \t]+x0, x5
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[ \t0-9a-f]+:[ \t]+d65f03c0[ \t]+ret
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[ \t0-9a-f]+:[ \t]+14000007[ \t]+b[ \t]+[0-9a-f]+ <__erratum_835769_veneer_0\+0x8>
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[0-9a-f]+ <__erratum_835769_veneer_2>:
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[ \t0-9a-f]+:[ \t]+9b031885[ \t]+madd[ \t]+x5, x4, x3, x6
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[ \t0-9a-f]+:[ \t0-9a-z]+[ \t]+b[ \t]+[0-9a-f]+ <a7str\+0x[0-9a-f]+>
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@ -8,12 +8,13 @@
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Disassembly of section .text:
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0000000000001000 <_start>:
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+1000: 14000002 b 1008 <__bar_veneer>
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+1000: 14000003 b 100c <__bar_veneer>
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+1004: d65f03c0 ret
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0000000000001008 <__bar_veneer>:
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1008: 90040010 adrp x16, 8001000 <bar>
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100c: 91000210 add x16, x16, #0x0
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1010: d61f0200 br x16
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[ \t]+1008:[ \t]+14000007[ \t]+b[ \t]+1024 <__bar_veneer\+0x18>
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000000000000100c <__bar_veneer>:
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100c: 90040010 adrp x16, 8001000 <bar>
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1010: 91000210 add x16, x16, #0x0
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1014: d61f0200 br x16
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...
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Disassembly of section .foo:
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@ -9,64 +9,66 @@
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Disassembly of section .text:
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0000000000001000 <_start>:
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1000: 14000412 b 2048 <__bar1_veneer>
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1004: 94000411 bl 2048 <__bar1_veneer>
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1008: 14000406 b 2020 <__bar2_veneer>
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100c: 94000405 bl 2020 <__bar2_veneer>
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1010: 14000408 b 2030 <__bar3_veneer>
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1014: 94000407 bl 2030 <__bar3_veneer>
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1000: 14000413 b 204c <__bar1_veneer>
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1004: 94000412 bl 204c <__bar1_veneer>
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1008: 14000407 b 2024 <__bar2_veneer>
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100c: 94000406 bl 2024 <__bar2_veneer>
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1010: 14000409 b 2034 <__bar3_veneer>
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1014: 94000408 bl 2034 <__bar3_veneer>
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1018: d65f03c0 ret
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...
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000000000000201c <_back>:
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201c: d65f03c0 ret
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0000000000002020 <__bar2_veneer>:
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2020: f07ffff0 adrp x16, 100001000 <bar1\+0x1000>
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2024: 91002210 add x16, x16, #0x8
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2028: d61f0200 br x16
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202c: 00000000 .inst 0x00000000 ; undefined
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[ \t]+2020:[ \t]+14000013[ \t]+b[ \t]+206c <__bar1_veneer\+0x20>
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0000000000002024 <__bar2_veneer>:
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2024: f07ffff0 adrp x16, 100001000 <bar1\+0x1000>
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2028: 91002210 add x16, x16, #0x8
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202c: d61f0200 br x16
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2030: 00000000 .inst 0x00000000 ; undefined
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0000000000002030 <__bar3_veneer>:
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2030: 58000090 ldr x16, 2040 <__bar3_veneer\+0x10>
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2034: 10000011 adr x17, 2034 <__bar3_veneer\+0x4>
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2038: 8b110210 add x16, x16, x17
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203c: d61f0200 br x16
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2040: ffffffdc .word 0xffffffdc
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2044: 00000000 .word 0x00000000
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0000000000002034 <__bar3_veneer>:
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2034: 58000090 ldr x16, 2044 <__bar3_veneer\+0x10>
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2038: 10000011 adr x17, 2038 <__bar3_veneer\+0x4>
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203c: 8b110210 add x16, x16, x17
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2040: d61f0200 br x16
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2044: ffffffd8 .word 0xffffffd8
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2048: 00000000 .word 0x00000000
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0000000000002048 <__bar1_veneer>:
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2048: d07ffff0 adrp x16, 100000000 <bar1>
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204c: 91000210 add x16, x16, #0x0
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2050: d61f0200 br x16
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000000000000204c <__bar1_veneer>:
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204c: d07ffff0 adrp x16, 100000000 <bar1>
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2050: 91000210 add x16, x16, #0x0
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2054: d61f0200 br x16
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...
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Disassembly of section .foo:
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0000000100000000 <bar1>:
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100000000: d65f03c0 ret
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100000004: 14000805 b 100002018 <___start_veneer>
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100000004: 14000806 b 10000201c <___start_veneer>
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...
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0000000100001008 <bar2>:
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100001008: d65f03c0 ret
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10000100c: 14000403 b 100002018 <___start_veneer>
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10000100c: 14000404 b 10000201c <___start_veneer>
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...
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0000000100002010 <bar3>:
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100002010: d65f03c0 ret
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100002014: 14000007 b 100002030 <___back_veneer>
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100002014: 14000008 b 100002034 <___back_veneer>
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0000000100002018 <___start_veneer>:
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100002018: 58000090 ldr x16, 100002028 <___start_veneer\+0x10>
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10000201c: 10000011 adr x17, 10000201c <___start_veneer\+0x4>
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100002020: 8b110210 add x16, x16, x17
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100002024: d61f0200 br x16
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100002028: ffffefe4 .word 0xffffefe4
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10000202c: fffffffe .word 0xfffffffe
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[ \t]+100002018:[ \t]+1400000d[ \t]+b[ \t]+10000204c <___back_veneer\+0x18>
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000000010000201c <___start_veneer>:
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10000201c: 58000090 ldr x16, 10000202c <___start_veneer\+0x10>
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100002020: 10000011 adr x17, 100002020 <___start_veneer\+0x4>
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100002024: 8b110210 add x16, x16, x17
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100002028: d61f0200 br x16
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10000202c: ffffefe0 .word 0xffffefe0
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100002030: fffffffe .word 0xfffffffe
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0000000100002030 <___back_veneer>:
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100002030: 90800010 adrp x16, 2000 <_start\+0x1000>
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100002034: 91007210 add x16, x16, #0x1c
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100002038: d61f0200 br x16
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0000000100002034 <___back_veneer>:
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100002034: 90800010 adrp x16, 2000 <_start\+0x1000>
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100002038: 91007210 add x16, x16, #0x1c
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10000203c: d61f0200 br x16
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...
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@ -8,13 +8,13 @@
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Disassembly of section .text:
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0000000000001000 <_start>:
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+1000: 94000002 bl 1008 <__bar_veneer>
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+1000: 94000003 bl 100c <__bar_veneer>
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+1004: d65f03c0 ret
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0000000000001008 <__bar_veneer>:
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1008: 90040010 adrp x16, 8001000 <bar>
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100c: 91000210 add x16, x16, #0x0
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1010: d61f0200 br x16
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[ \t]+1008:[ \t]+14000007[ \t]+b[ \t]+1024 <__bar_veneer\+0x18>
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000000000000100c <__bar_veneer>:
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100c: 90040010 adrp x16, 8001000 <bar>
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1010: 91000210 add x16, x16, #0x0
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1014: d61f0200 br x16
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...
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Disassembly of section .foo:
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