Revert the last change.

This commit is contained in:
H.J. Lu 2011-03-05 04:31:41 +00:00
parent 64794aa4b4
commit 61ff971fde
4 changed files with 6 additions and 26 deletions

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@ -1,12 +1,3 @@
2011-03-04 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (x86_cie_stack_alignment): New.
(md_begin): Set x86_cie_data_alignment if it isn't set. Set
x86_cie_stack_alignment.
(i386_target_format): Set x86_cie_data_alignment to -4 for x32.
(tc_x86_frame_initial_instructions): Use x86_cie_stack_alignment
instead of x86_cie_data_alignment on SP and RA.
2011-03-02 Nick Clifton <nickc@redhat.com> 2011-03-02 Nick Clifton <nickc@redhat.com>
* ecoff.c: Incldue filenames.h * ecoff.c: Incldue filenames.h

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@ -502,9 +502,6 @@ unsigned int x86_dwarf2_return_column;
/* The dwarf2 data alignment, adjusted for 32 or 64 bit. */ /* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
int x86_cie_data_alignment; int x86_cie_data_alignment;
/* The dwarf2 stack alignment, adjusted for 32 or 64 bit. */
static int x86_cie_stack_alignment;
/* Interface to relax_segment. /* Interface to relax_segment.
There are 3 major relax states for 386 jump insns because the There are 3 major relax states for 386 jump insns because the
different types of jumps add different sizes to frags when we're different types of jumps add different sizes to frags when we're
@ -2381,15 +2378,12 @@ md_begin ()
#else #else
x86_dwarf2_return_column = 16; x86_dwarf2_return_column = 16;
#endif #endif
if (!x86_cie_data_alignment) x86_cie_data_alignment = -8;
x86_cie_data_alignment = -8;
x86_cie_stack_alignment = -8;
} }
else else
{ {
x86_dwarf2_return_column = 8; x86_dwarf2_return_column = 8;
x86_cie_data_alignment = -4; x86_cie_data_alignment = -4;
x86_cie_stack_alignment = -4;
} }
} }
@ -8642,7 +8636,6 @@ i386_target_format (void)
use_rela_relocations = 1; use_rela_relocations = 1;
object_64bit = 1; object_64bit = 1;
disallow_64bit_reloc = 1; disallow_64bit_reloc = 1;
x86_cie_data_alignment = -4;
format = ELF_TARGET_FORMAT32; format = ELF_TARGET_FORMAT32;
break; break;
} }
@ -9052,8 +9045,8 @@ tc_x86_frame_initial_instructions (void)
input_line_pointer = saved_input; input_line_pointer = saved_input;
} }
cfi_add_CFA_def_cfa (sp_regno[flag_code >> 1], -x86_cie_stack_alignment); cfi_add_CFA_def_cfa (sp_regno[flag_code >> 1], -x86_cie_data_alignment);
cfi_add_CFA_offset (x86_dwarf2_return_column, x86_cie_stack_alignment); cfi_add_CFA_offset (x86_dwarf2_return_column, x86_cie_data_alignment);
} }
int int

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@ -1,7 +1,3 @@
2011-03-04 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/ilp32/cfi/cfi-x86_64.d: Updated.
2011-02-28 Maciej W. Rozycki <macro@codesourcery.com> 2011-02-28 Maciej W. Rozycki <macro@codesourcery.com>
* gas/mips/alnv_ps-swap.d: New test for ALNV.PS instruction * gas/mips/alnv_ps-swap.d: New test for ALNV.PS instruction

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@ -7,7 +7,7 @@ Contents of the .eh_frame section:
Version: 1 Version: 1
Augmentation: "zR" Augmentation: "zR"
Code alignment factor: 1 Code alignment factor: 1
Data alignment factor: -4 Data alignment factor: -8
Return address column: 16 Return address column: 16
Augmentation data: 1b Augmentation data: 1b
@ -55,7 +55,7 @@ Contents of the .eh_frame section:
Version: 1 Version: 1
Augmentation: "zR" Augmentation: "zR"
Code alignment factor: 1 Code alignment factor: 1
Data alignment factor: -4 Data alignment factor: -8
Return address column: 16 Return address column: 16
Augmentation data: 1b Augmentation data: 1b
@ -88,7 +88,7 @@ Contents of the .eh_frame section:
Version: 1 Version: 1
Augmentation: "zR" Augmentation: "zR"
Code alignment factor: 1 Code alignment factor: 1
Data alignment factor: -4 Data alignment factor: -8
Return address column: 16 Return address column: 16
Augmentation data: 1b Augmentation data: 1b