Revert the last change.
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64794aa4b4
commit
61ff971fde
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@ -1,12 +1,3 @@
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2011-03-04 H.J. Lu <hongjiu.lu@intel.com>
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* config/tc-i386.c (x86_cie_stack_alignment): New.
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(md_begin): Set x86_cie_data_alignment if it isn't set. Set
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x86_cie_stack_alignment.
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(i386_target_format): Set x86_cie_data_alignment to -4 for x32.
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(tc_x86_frame_initial_instructions): Use x86_cie_stack_alignment
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instead of x86_cie_data_alignment on SP and RA.
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2011-03-02 Nick Clifton <nickc@redhat.com>
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2011-03-02 Nick Clifton <nickc@redhat.com>
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* ecoff.c: Incldue filenames.h
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* ecoff.c: Incldue filenames.h
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@ -502,9 +502,6 @@ unsigned int x86_dwarf2_return_column;
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/* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
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/* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
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int x86_cie_data_alignment;
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int x86_cie_data_alignment;
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/* The dwarf2 stack alignment, adjusted for 32 or 64 bit. */
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static int x86_cie_stack_alignment;
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/* Interface to relax_segment.
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/* Interface to relax_segment.
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There are 3 major relax states for 386 jump insns because the
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There are 3 major relax states for 386 jump insns because the
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different types of jumps add different sizes to frags when we're
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different types of jumps add different sizes to frags when we're
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@ -2381,15 +2378,12 @@ md_begin ()
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#else
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#else
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x86_dwarf2_return_column = 16;
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x86_dwarf2_return_column = 16;
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#endif
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#endif
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if (!x86_cie_data_alignment)
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x86_cie_data_alignment = -8;
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x86_cie_data_alignment = -8;
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x86_cie_stack_alignment = -8;
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}
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}
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else
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else
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{
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{
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x86_dwarf2_return_column = 8;
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x86_dwarf2_return_column = 8;
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x86_cie_data_alignment = -4;
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x86_cie_data_alignment = -4;
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x86_cie_stack_alignment = -4;
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}
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}
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}
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}
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@ -8642,7 +8636,6 @@ i386_target_format (void)
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use_rela_relocations = 1;
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use_rela_relocations = 1;
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object_64bit = 1;
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object_64bit = 1;
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disallow_64bit_reloc = 1;
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disallow_64bit_reloc = 1;
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x86_cie_data_alignment = -4;
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format = ELF_TARGET_FORMAT32;
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format = ELF_TARGET_FORMAT32;
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break;
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break;
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}
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}
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@ -9052,8 +9045,8 @@ tc_x86_frame_initial_instructions (void)
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input_line_pointer = saved_input;
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input_line_pointer = saved_input;
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}
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}
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cfi_add_CFA_def_cfa (sp_regno[flag_code >> 1], -x86_cie_stack_alignment);
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cfi_add_CFA_def_cfa (sp_regno[flag_code >> 1], -x86_cie_data_alignment);
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cfi_add_CFA_offset (x86_dwarf2_return_column, x86_cie_stack_alignment);
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cfi_add_CFA_offset (x86_dwarf2_return_column, x86_cie_data_alignment);
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}
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}
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int
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int
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@ -1,7 +1,3 @@
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2011-03-04 H.J. Lu <hongjiu.lu@intel.com>
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* gas/i386/ilp32/cfi/cfi-x86_64.d: Updated.
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2011-02-28 Maciej W. Rozycki <macro@codesourcery.com>
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2011-02-28 Maciej W. Rozycki <macro@codesourcery.com>
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* gas/mips/alnv_ps-swap.d: New test for ALNV.PS instruction
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* gas/mips/alnv_ps-swap.d: New test for ALNV.PS instruction
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@ -7,7 +7,7 @@ Contents of the .eh_frame section:
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Version: 1
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Version: 1
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Augmentation: "zR"
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Augmentation: "zR"
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Code alignment factor: 1
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Code alignment factor: 1
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Data alignment factor: -4
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Data alignment factor: -8
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Return address column: 16
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Return address column: 16
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Augmentation data: 1b
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Augmentation data: 1b
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@ -55,7 +55,7 @@ Contents of the .eh_frame section:
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Version: 1
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Version: 1
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Augmentation: "zR"
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Augmentation: "zR"
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Code alignment factor: 1
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Code alignment factor: 1
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Data alignment factor: -4
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Data alignment factor: -8
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Return address column: 16
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Return address column: 16
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Augmentation data: 1b
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Augmentation data: 1b
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@ -88,7 +88,7 @@ Contents of the .eh_frame section:
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Version: 1
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Version: 1
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Augmentation: "zR"
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Augmentation: "zR"
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Code alignment factor: 1
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Code alignment factor: 1
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Data alignment factor: -4
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Data alignment factor: -8
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Return address column: 16
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Return address column: 16
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Augmentation data: 1b
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Augmentation data: 1b
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