sim: sh: convert to nrun
A lot of cpu state is stored in global variables, as is memory handling. The sim_size support needs unwinding at some point. But at least this is an improvement on the status quo.
This commit is contained in:
parent
5fa71a1b13
commit
62454d3da2
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@ -1,3 +1,26 @@
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2015-03-28 Mike Frysinger <vapier@gentoo.org>
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* Makefile.in (SIM_RUN_OBJS, SIM_EXTRA_CFLAGS): Delete.
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(SIM_OBJS): Change to $(SIM_NEW_COMMON_OBJS).
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* interp.c: Delete run-sim.h include. Include sim-main.h, sim-base.h,
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and sim-options.h.
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(SEXT, SEXT32): Undefine.
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(sim_write): Delete prototype.
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(regstacktype, saved_state_type): Move to sim-main.h.
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(target_little_endian): Replace with CURRENT_TARGET_BYTE_ORDER.
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(host_little_endian): Replace with CURRENT_HOST_BYTE_ORDER.
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(sim_kind, myname, tracing, sim_stop, sim_trace, sim_set_profile,
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sim_set_profile_size, sim_load, sim_set_callbacks,
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sim_complete_command): Delete.
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(sim_size): Mark static.
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(init_pointers): Delete host_little_endian setup.
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(sim_resume): Delete tracing check.
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(free_state): New cleanup function.
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(sim_open): Rewrite to use new common logic.
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(sim_create_inferior): Call init_dsp.
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* sim-main.h: New file.
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* tconfig.h: Delete file.
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2015-03-28 Mike Frysinger <vapier@gentoo.org>
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* gencode.c (ppi_gensim): Convert old style prototype with ppi_insn.
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@ -1,7 +1,7 @@
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# Makefile template for Configure for the SH sim library.
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# Copyright (C) 1990-2015 Free Software Foundation, Inc.
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# Written by Cygnus Support.
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#
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#
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# This program is free software; you can redistribute it and/or modify
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# it under the terms of the GNU General Public License as published by
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# the Free Software Foundation; either version 3 of the License, or
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@ -17,11 +17,14 @@
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## COMMON_PRE_CONFIG_FRAG
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# Use the deprecated run frontend until we migrate to nrun.o
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SIM_RUN_OBJS = run.o
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SIM_EXTRA_CFLAGS = -DSIM_USE_DEPRECATED_RUN_FRONTEND
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SIM_OBJS = interp.o table.o sim-load.o
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SIM_OBJS = \
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interp.o \
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$(SIM_NEW_COMMON_OBJS) \
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sim-cpu.o \
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sim-engine.o \
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sim-hload.o \
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sim-stop.o \
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table.o
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SIM_EXTRA_LIBS = -lm
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SIM_EXTRA_CLEAN = sh-clean
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278
sim/sh/interp.c
278
sim/sh/interp.c
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@ -67,7 +67,10 @@
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#include "gdb/callback.h"
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#include "gdb/remote-sim.h"
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#include "gdb/sim-sh.h"
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#include "run-sim.h"
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#include "sim-main.h"
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#include "sim-base.h"
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#include "sim-options.h"
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/* This file is local - if newlib changes, then so should this. */
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#include "syscall.h"
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@ -91,9 +94,11 @@
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#define SIGTRAP 5
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#endif
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extern unsigned short sh_jump_table[], sh_dsp_table[0x1000], ppi_table[];
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/* TODO: Stop using these names. */
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#undef SEXT
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#undef SEXT32
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int sim_write (SIM_DESC sd, SIM_ADDR addr, const unsigned char *buffer, int size);
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extern unsigned short sh_jump_table[], sh_dsp_table[0x1000], ppi_table[];
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#define O_RECOMPILE 85
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#define DEFINE_TABLE
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@ -103,108 +108,7 @@ int sim_write (SIM_DESC sd, SIM_ADDR addr, const unsigned char *buffer, int size
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for a quit. */
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#define POLL_QUIT_INTERVAL 0x60000
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typedef struct
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{
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int regs[20];
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} regstacktype;
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typedef union
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{
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struct
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{
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int regs[16];
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int pc;
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/* System registers. For sh-dsp this also includes A0 / X0 / X1 / Y0 / Y1
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which are located in fregs, i.e. strictly speaking, these are
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out-of-bounds accesses of sregs.i . This wart of the code could be
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fixed by making fregs part of sregs, and including pc too - to avoid
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alignment repercussions - but this would cause very onerous union /
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structure nesting, which would only be managable with anonymous
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unions and structs. */
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union
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{
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struct
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{
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int mach;
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int macl;
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int pr;
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int dummy3, dummy4;
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int fpul; /* A1 for sh-dsp - but only for movs etc. */
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int fpscr; /* dsr for sh-dsp */
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} named;
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int i[7];
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} sregs;
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/* sh3e / sh-dsp */
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union fregs_u
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{
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float f[16];
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double d[8];
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int i[16];
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}
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fregs[2];
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/* Control registers; on the SH4, ldc / stc is privileged, except when
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accessing gbr. */
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union
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{
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struct
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{
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int sr;
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int gbr;
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int vbr;
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int ssr;
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int spc;
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int mod;
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/* sh-dsp */
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int rs;
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int re;
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/* sh3 */
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int bank[8];
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int dbr; /* debug base register */
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int sgr; /* saved gr15 */
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int ldst; /* load/store flag (boolean) */
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int tbr;
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int ibcr; /* sh2a bank control register */
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int ibnr; /* sh2a bank number register */
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} named;
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int i[16];
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} cregs;
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unsigned char *insn_end;
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int ticks;
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int stalls;
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int memstalls;
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int cycles;
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int insts;
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int prevlock;
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int thislock;
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int exception;
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int end_of_registers;
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int msize;
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#define PROFILE_FREQ 1
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#define PROFILE_SHIFT 2
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int profile;
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unsigned short *profile_hist;
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unsigned char *memory;
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int xyram_select, xram_start, yram_start;
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unsigned char *xmem;
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unsigned char *ymem;
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unsigned char *xmem_offset;
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unsigned char *ymem_offset;
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unsigned long bfd_mach;
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regstacktype *regstack;
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}
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asregs;
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int asints[40];
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} saved_state_type;
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/* TODO: Move into sim_cpu. */
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saved_state_type saved_state;
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struct loop_bounds { unsigned char *start, *end; };
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/* These variables are at file scope so that functions other than
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sim_resume can use the fetch/store macros */
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static int target_little_endian;
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#define target_little_endian (CURRENT_TARGET_BYTE_ORDER == LITTLE_ENDIAN)
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static int global_endianw, endianb;
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static int target_dsp;
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static int host_little_endian;
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#define host_little_endian (CURRENT_HOST_BYTE_ORDER == LITTLE_ENDIAN)
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static char **prog_argv;
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static int maskw = 0;
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static int maskl = 0;
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static SIM_OPEN_KIND sim_kind;
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static char *myname;
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static int tracing = 0;
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/* Short hand definitions of the registers */
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#define SBIT(x) ((x)&sbit)
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@ -1687,7 +1586,7 @@ mcalloc (size_t nmemb, size_t size)
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/* Set the memory size to the power of two provided. */
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void
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static void
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sim_size (int power)
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{
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sim_memory_size = power;
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@ -1809,10 +1708,6 @@ init_dsp (struct bfd *abfd)
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static void
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init_pointers (void)
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{
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host_little_endian = 0;
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* (char*) &host_little_endian = 1;
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host_little_endian &= 1;
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if (saved_state.asregs.msize != 1 << sim_memory_size)
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{
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sim_size (sim_memory_size);
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@ -1869,13 +1764,6 @@ gotcall (int from, int to)
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#define MMASKB ((saved_state.asregs.msize -1) & ~0)
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int
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sim_stop (SIM_DESC sd)
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{
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raise_exception (SIGINT);
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return 1;
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}
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void
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sim_resume (SIM_DESC sd, int step, int siggnal)
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{
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insts++;
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#endif
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top:
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if (tracing)
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fprintf (stderr, "PC: %08lx, insn: %04x\n",
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(unsigned long) PH2T (insn_ptr), iword);
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#include "code.c"
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return length;
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}
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int
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sim_trace (SIM_DESC sd)
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{
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tracing = 1;
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sim_resume (sd, 0, 0);
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tracing = 0;
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return 1;
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}
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void
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sim_stop_reason (SIM_DESC sd, enum sim_stop *reason, int *sigrc)
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{
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}
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}
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void
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sim_set_profile (int n)
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static void
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free_state (SIM_DESC sd)
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{
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saved_state.asregs.profile = n;
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}
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void
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sim_set_profile_size (int n)
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{
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sim_profile_size = n;
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if (STATE_MODULES (sd) != NULL)
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sim_module_uninstall (sd);
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sim_cpu_free_all (sd);
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sim_state_free (sd);
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}
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SIM_DESC
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sim_open (SIM_OPEN_KIND kind, host_callback *cb, struct bfd *abfd, char **argv)
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{
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char **p;
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int endian_set = 0;
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int i;
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union
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{
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}
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mem_word;
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sim_kind = kind;
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myname = argv[0];
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SIM_DESC sd = sim_state_alloc (kind, cb);
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SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
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callback = cb;
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/* The cpu data is kept in a separately allocated chunk of memory. */
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if (sim_cpu_alloc_all (sd, 1, /*cgen_cpu_max_extra_bytes ()*/0) != SIM_RC_OK)
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{
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free_state (sd);
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return 0;
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}
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if (sim_pre_argv_init (sd, argv[0]) != SIM_RC_OK)
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{
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free_state (sd);
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return 0;
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}
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/* getopt will print the error message so we just have to exit if this fails.
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FIXME: Hmmm... in the case of gdb we need getopt to call
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print_filtered. */
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if (sim_parse_args (sd, argv) != SIM_RC_OK)
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{
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free_state (sd);
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return 0;
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}
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/* Check for/establish the a reference program image. */
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if (sim_analyze_program (sd,
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(STATE_PROG_ARGV (sd) != NULL
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? *STATE_PROG_ARGV (sd)
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: NULL), abfd) != SIM_RC_OK)
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{
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free_state (sd);
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return 0;
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}
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/* Configure/verify the target byte order and other runtime
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configuration options. */
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if (sim_config (sd) != SIM_RC_OK)
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{
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sim_module_uninstall (sd);
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return 0;
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}
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if (sim_post_argv_init (sd) != SIM_RC_OK)
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{
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/* Uninstall the modules to avoid memory leaks,
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file descriptor leaks, etc. */
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sim_module_uninstall (sd);
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return 0;
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}
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for (p = argv + 1; *p != NULL; ++p)
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{
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if (strcmp (*p, "-E") == 0)
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{
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++p;
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if (*p == NULL)
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{
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/* FIXME: This doesn't use stderr, but then the rest of the
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file doesn't either. */
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callback->printf_filtered (callback, "Missing argument to `-E'.\n");
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return 0;
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}
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target_little_endian = strcmp (*p, "big") != 0;
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endian_set = 1;
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}
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else if (isdigit (**p))
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if (isdigit (**p))
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parse_and_set_memory_size (*p);
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}
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if (abfd != NULL && ! endian_set)
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target_little_endian = ! bfd_big_endian (abfd);
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if (abfd)
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init_dsp (abfd);
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@ -2560,8 +2465,7 @@ sim_open (SIM_OPEN_KIND kind, host_callback *cb, struct bfd *abfd, char **argv)
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mem_word.c[i] = i;
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endianb = mem_word.i >> (target_little_endian ? 0 : 24) & 0xff;
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/* fudge our descriptor for now */
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return (SIM_DESC) 1;
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return sd;
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}
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static void
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@ -2582,31 +2486,6 @@ sim_close (SIM_DESC sd, int quitting)
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/* nothing to do */
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}
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SIM_RC
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sim_load (SIM_DESC sd, const char *prog, bfd *abfd, int from_tty)
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{
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extern bfd *sim_load_file (); /* ??? Don't know where this should live. */
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bfd *prog_bfd;
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prog_bfd = sim_load_file (sd, myname, callback, prog, abfd,
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sim_kind == SIM_OPEN_DEBUG,
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0, sim_write);
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/* Set the bfd machine type. */
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if (prog_bfd)
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saved_state.asregs.bfd_mach = bfd_get_mach (prog_bfd);
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else if (abfd)
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saved_state.asregs.bfd_mach = bfd_get_mach (abfd);
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else
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saved_state.asregs.bfd_mach = 0;
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if (prog_bfd == NULL)
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return SIM_RC_FAIL;
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if (abfd == NULL)
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bfd_close (prog_bfd);
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return SIM_RC_OK;
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}
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SIM_RC
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sim_create_inferior (SIM_DESC sd, struct bfd *prog_bfd, char **argv, char **env)
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{
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@ -2622,6 +2501,9 @@ sim_create_inferior (SIM_DESC sd, struct bfd *prog_bfd, char **argv, char **env)
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if (prog_bfd != NULL)
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saved_state.asregs.bfd_mach = bfd_get_mach (prog_bfd);
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if (prog_bfd != NULL)
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init_dsp (prog_bfd);
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/* Record the program's arguments. */
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prog_argv = argv;
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@ -2657,15 +2539,3 @@ sim_do_command (SIM_DESC sd, const char *cmd)
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(callback->printf_filtered) (callback, "Error: \"%s\" is not a valid SH simulator command.\n", cmd);
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}
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}
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void
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sim_set_callbacks (host_callback *p)
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{
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callback = p;
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}
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char **
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sim_complete_command (SIM_DESC sd, const char *text, const char *word)
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{
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return NULL;
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}
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@ -0,0 +1,154 @@
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/* Moxie Simulator definition.
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Copyright (C) 2009-2015 Free Software Foundation, Inc.
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This file is part of GDB, the GNU debugger.
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This program is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 3 of the License, or
|
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#ifndef SIM_MAIN_H
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#define SIM_MAIN_H
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#include "sim-basics.h"
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typedef address_word sim_cia;
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#define CIA_GET(cpu) saved_state.asregs.pc
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#define CIA_SET(cpu,val) saved_state.asregs.pc = (val)
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typedef struct _sim_cpu SIM_CPU;
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#include "sim-base.h"
|
||||
|
||||
typedef struct
|
||||
{
|
||||
int regs[20];
|
||||
} regstacktype;
|
||||
|
||||
typedef union
|
||||
{
|
||||
|
||||
struct
|
||||
{
|
||||
int regs[16];
|
||||
int pc;
|
||||
|
||||
/* System registers. For sh-dsp this also includes A0 / X0 / X1 / Y0 / Y1
|
||||
which are located in fregs, i.e. strictly speaking, these are
|
||||
out-of-bounds accesses of sregs.i . This wart of the code could be
|
||||
fixed by making fregs part of sregs, and including pc too - to avoid
|
||||
alignment repercussions - but this would cause very onerous union /
|
||||
structure nesting, which would only be managable with anonymous
|
||||
unions and structs. */
|
||||
union
|
||||
{
|
||||
struct
|
||||
{
|
||||
int mach;
|
||||
int macl;
|
||||
int pr;
|
||||
int dummy3, dummy4;
|
||||
int fpul; /* A1 for sh-dsp - but only for movs etc. */
|
||||
int fpscr; /* dsr for sh-dsp */
|
||||
} named;
|
||||
int i[7];
|
||||
} sregs;
|
||||
|
||||
/* sh3e / sh-dsp */
|
||||
union fregs_u
|
||||
{
|
||||
float f[16];
|
||||
double d[8];
|
||||
int i[16];
|
||||
}
|
||||
fregs[2];
|
||||
|
||||
/* Control registers; on the SH4, ldc / stc is privileged, except when
|
||||
accessing gbr. */
|
||||
union
|
||||
{
|
||||
struct
|
||||
{
|
||||
int sr;
|
||||
int gbr;
|
||||
int vbr;
|
||||
int ssr;
|
||||
int spc;
|
||||
int mod;
|
||||
/* sh-dsp */
|
||||
int rs;
|
||||
int re;
|
||||
/* sh3 */
|
||||
int bank[8];
|
||||
int dbr; /* debug base register */
|
||||
int sgr; /* saved gr15 */
|
||||
int ldst; /* load/store flag (boolean) */
|
||||
int tbr;
|
||||
int ibcr; /* sh2a bank control register */
|
||||
int ibnr; /* sh2a bank number register */
|
||||
} named;
|
||||
int i[16];
|
||||
} cregs;
|
||||
|
||||
unsigned char *insn_end;
|
||||
|
||||
int ticks;
|
||||
int stalls;
|
||||
int memstalls;
|
||||
int cycles;
|
||||
int insts;
|
||||
|
||||
int prevlock;
|
||||
int thislock;
|
||||
int exception;
|
||||
|
||||
int end_of_registers;
|
||||
|
||||
int msize;
|
||||
#define PROFILE_FREQ 1
|
||||
#define PROFILE_SHIFT 2
|
||||
int profile;
|
||||
unsigned short *profile_hist;
|
||||
unsigned char *memory;
|
||||
int xyram_select, xram_start, yram_start;
|
||||
unsigned char *xmem;
|
||||
unsigned char *ymem;
|
||||
unsigned char *xmem_offset;
|
||||
unsigned char *ymem_offset;
|
||||
unsigned long bfd_mach;
|
||||
regstacktype *regstack;
|
||||
} asregs;
|
||||
int asints[40];
|
||||
} saved_state_type;
|
||||
|
||||
/* TODO: Move into sim_cpu. */
|
||||
extern saved_state_type saved_state;
|
||||
|
||||
struct _sim_cpu {
|
||||
|
||||
sim_cpu_base base;
|
||||
};
|
||||
|
||||
struct sim_state {
|
||||
|
||||
sim_cpu *cpu[MAX_NR_PROCESSORS];
|
||||
#if (WITH_SMP)
|
||||
#define STATE_CPU(sd,n) ((sd)->cpu[n])
|
||||
#else
|
||||
#define STATE_CPU(sd,n) ((sd)->cpu[0])
|
||||
#endif
|
||||
|
||||
sim_state_base base;
|
||||
};
|
||||
|
||||
#endif
|
|
@ -1,17 +0,0 @@
|
|||
/* sh target config file */
|
||||
|
||||
/* Define this if the simulator supports profiling.
|
||||
See the mips simulator for an example.
|
||||
This enables the `-p foo' and `-s bar' options.
|
||||
The target is required to provide sim_set_profile{,_size}. */
|
||||
/* #define SIM_HAVE_PROFILE */
|
||||
|
||||
/* Define this if the simulator uses an instruction cache.
|
||||
See the h8/300 simulator for an example.
|
||||
This enables the `-c size' option to set the size of the cache.
|
||||
The target is required to provide sim_set_simcache_size. */
|
||||
/* #define SIM_HAVE_SIMCACHE */
|
||||
|
||||
/* Define this if the target cpu is bi-endian
|
||||
and the simulator supports it. */
|
||||
#define SIM_HAVE_BIENDIAN
|
Loading…
Reference in New Issue