* doc/c-alpha.texi: New file.
* doc/Makefile.am (CPU_DOCS): Add it.
* doc/all.texi, doc/as.texinfo: Add hooks for Alpha.
This commit is contained in:
Richard Henderson
parent
6439295f61
commit
625e135305
@ -1,3 +1,9 @@
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2002-02-10 Richard Henderson <rth@redhat.com>
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* doc/c-alpha.texi: New file.
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* doc/Makefile.am (CPU_DOCS): Add it.
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* doc/all.texi, doc/as.texinfo: Add hooks for Alpha.
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2002-02-09 Richard Henderson <rth@redhat.com>
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* config/tc-alpha.c (O_samegp): New.
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@ -25,6 +25,7 @@ asconfig.texi: $(CONFIG).texi
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CPU_DOCS = \
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c-a29k.texi \
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c-alpha.texi \
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c-arc.texi \
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c-arm.texi \
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c-d10v.texi \
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@ -136,6 +136,7 @@ info_TEXINFOS = as.texinfo gasp.texi
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CPU_DOCS = \
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c-a29k.texi \
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c-alpha.texi \
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c-arc.texi \
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c-arm.texi \
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c-d10v.texi \
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@ -1,4 +1,4 @@
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@c Copyright 1992, 1993, 1994, 1996, 1997, 1999, 2000, 2001
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@c Copyright 1992, 1993, 1994, 1996, 1997, 1999, 2000, 2001, 2002
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@c Free Software Foundation, Inc.
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@c This file is part of the documentation for the GAS manual
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@ -27,6 +27,7 @@
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@c CPUs of interest
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@c ================
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@set A29K
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@set ALPHA
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@set ARC
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@set ARM
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@set CRIS
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@ -29,6 +29,7 @@
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@set TARGET TARGET
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@set GENERIC
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@set A29K
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@set ALPHA
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@set ARC
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@set ARM
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@set CRIS
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@ -266,6 +267,14 @@ gcc(1), ld(1), and the Info entries for @file{binutils} and @file{ld}.
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@ifset A29K
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@c am29k has no machine-dependent assembler options
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@end ifset
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@ifset ALPHA
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@emph{Target Alpha options:}
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[@b{-m@var{cpu}}]
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[@b{-mdebug} | @b{-no-mdebug}]
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[@b{-relax}] [@b{-g}] [@b{-G@var{size}}]
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[@b{-F}] [@b{-32addr}]
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@end ifset
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@ifset ARC
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@emph{Target ARC options:}
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@ -5586,6 +5595,9 @@ subject, see the hardware manufacturer's manual.
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@ifset A29K
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* AMD29K-Dependent:: AMD 29K Dependent Features
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@end ifset
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@ifset ALPHA
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* Alpha-Dependent:: Alpha Dependent Features
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@end ifset
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@ifset ARC
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* ARC-Dependent:: ARC Dependent Features
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@end ifset
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@ -5681,14 +5693,18 @@ subject, see the hardware manufacturer's manual.
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@c node and sectioning commands; hence the repetition of @chapter BLAH
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@c in both conditional blocks.
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@ifset ARC
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@include c-arc.texi
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@end ifset
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@ifset A29K
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@include c-a29k.texi
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@end ifset
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@ifset ALPHA
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@include c-alpha.texi
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@end ifset
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@ifset ARC
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@include c-arc.texi
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@end ifset
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@ifset ARM
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@include c-arm.texi
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@end ifset
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396
gas/doc/c-alpha.texi
Normal file
396
gas/doc/c-alpha.texi
Normal file
@ -0,0 +1,396 @@
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@c Copyright 2002
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@c Free Software Foundation, Inc.
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@c This is part of the GAS manual.
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@c For copying conditions, see the file as.texinfo.
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@ifset GENERIC
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@page
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@node Alpha-Dependent
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@chapter Alpha Dependent Features
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@end ifset
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@ifclear GENERIC
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@node Machine Dependencies
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@chapter Alpha Dependent Features
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@end ifclear
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@cindex Alpha support
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@menu
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* Alpha Notes:: Notes
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* Alpha Options:: Options
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* Alpha Syntax:: Syntax
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* Alpha Floating Point:: Floating Point
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* Alpha Directives:: Alpha Machine Directives
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* Alpha Opcodes:: Opcodes
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@end menu
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@node Alpha Notes
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@section Notes
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@cindex Alpha notes
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@cindex notes for Alpha
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The documentation here is primarily for the ELF object format.
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@code{@value{AS}} also supports the ECOFF and EVAX formats, but
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features specific to these formats are not yet documented.
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@node Alpha Options
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@section Options
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@cindex Alpha options
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@cindex options for Alpha
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@table @option
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@cindex @code{-m@var{cpu}} command line option, Alpha
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@item -m@var{cpu}
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This option specifies the target processor. If an attempt is made to
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assemble an instruction which will not execute on the target processor,
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the assembler may either expand the instruction as a macro or issue an
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error message. This option is equivalent to the @code{.arch} directive.
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The following processor names are recognized:
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@code{21064},
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@code{21064a},
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@code{21066},
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@code{21068},
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@code{21164},
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@code{21164a},
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@code{21164pc},
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@code{21264},
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@code{ev4},
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@code{ev5},
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@code{lca45},
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@code{ev5},
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@code{ev56},
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@code{pca56},
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@code{ev6}.
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The special name @code{all} may be used to allow the assembler to accept
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instructions valid for any Alpha processor.
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In order to support existing practice in OSF/1 with respect to @code{.arch},
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and existing practice within @command{MILO} (the Linux ARC bootloader), the
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numbered processor names (e.g.@: 21064) enable the processor-specific PALcode
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instructions, while the ``electro-vlasic'' names (e.g.@: @code{ev4}) do not.
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@cindex @code{-mdebug} command line option, Alpha
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@cindex @code{-no-mdebug} command line option, Alpha
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@item -mdebug
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@itemx -no-mdebug
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Enables or disables the generation of @code{.mdebug} encapsulation for
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stabs directives and procedure descriptors. The default is to automatically
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enable @code{.mdebug} when the first stabs directive is seen.
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@cindex @code{-relax} command line option, Alpha
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@item -relax
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This option forces all relocations to be put into the object file, instead
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of saving space and resolving some relocations at assembly time. Note that
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this option does not propagate all symbol arithmetic into the object file,
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because not all symbol arithmetic can be represented. However, the option
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can still be useful in specific applications.
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@cindex @code{-g} command line option, Alpha
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@item -g
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This option is used when the compiler generates debug information. When
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@command{gcc} is using @command{mips-tfile} to generate debug
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information for ECOFF, local labels must be passed through to the object
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file. Otherwise this option has no effect.
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@cindex @code{-G} command line option, Alpha
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@item -G@var{size}
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A local common symbol larger than @var{size} is placed in @code{.bss},
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while smaller symbols are placed in @code{.sbss}.
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@cindex @code{-F} command line option, Alpha
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@cindex @code{-32addr} command line option, Alpha
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@item -F
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@itemx -32addr
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These options are ignored for backward compatibility.
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@end table
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@cindex Alpha Syntax
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@node Alpha Syntax
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@section Syntax
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The assembler syntax closely follow the Alpha Reference Manual;
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assembler directives and general syntax closely follow the OSF/1 and
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OpenVMS syntax, with a few differences for ELF.
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@menu
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* Alpha-Chars:: Special Characters
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* Alpha-Regs:: Register Names
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* Alpha-Relocs:: Relocations
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@end menu
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@node Alpha-Chars
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@subsection Special Characters
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@cindex line comment character, Alpha
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@cindex Alpha line comment character
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@samp{#} is the line comment character.
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@cindex line separator, Alpha
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@cindex statement separator, Alpha
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@cindex Alpha line separator
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@samp{;} can be used instead of a newline to separate statements.
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@node Alpha-Regs
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@subsection Register Names
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@cindex Alpha registers
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@cindex register names, Alpha
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The 32 integer registers are refered to as @samp{$@var{n}} or
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@samp{$r@var{n}}. In addition, registers 15, 28, 29, and 30 may
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be refered to by the symbols @samp{$fp}, @samp{$at}, @samp{$gp},
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and @samp{$sp} respectively.
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The 32 floating-point registers are refered to as @samp{$f@var{n}}.
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@node Alpha-Relocs
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@subsection Relocations
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@cindex Alpha relocations
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@cindex relocations, Alpha
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Some of these relocations are available for ECOFF, but mostly
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only for ELF. They are modeled after the relocation format
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introduced in Digial Unix 4.0, but there are additions.
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The format is @samp{!@var{tag}} or @samp{!@var{tag}!@var{number}}
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where @var{tag} is the name of the relocation. In some cases
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@var{number} is used to relate specific instructions.
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The relocation is placed at the end of the instruction like so:
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@example
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ldah $0,a($29) !gprelhigh
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lda $0,a($0) !gprellow
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ldq $1,b($29) !literal!100
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ldl $2,0($1) !lituse_base!100
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@end example
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@table @code
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@item !literal
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@itemx !literal!@var{N}
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Used with an @code{ldq} instruction to load the address of a symbol
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from the GOT.
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A sequence number @var{N} is optional, and if present is used to pair
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@code{lituse} relocations with this @code{literal} relocation. The
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@code{lituse} relocations are used by the linker to optimize the code
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||||
based on the final location of the symbol.
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||||
Note that these optimizations are dependent on the data flow of the
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program. Therefore, if @emph{any} @code{lituse} is paired with a
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@code{literal} relocation, then @emph{all} uses of the register set by
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the @code{literal} instruction must also be marked with @code{lituse}
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||||
relocations. This is because the original @code{literal} instruction
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may be deleted or transformed into another instruction.
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||||
Also note that there may be a one-to-many relationship between
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@code{literal} and @code{lituse}, but not a many-to-one. That is, if
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there are two code paths that load up the same address and feed the
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value to a single use, then the use may not use a @code{lituse}
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relocation.
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@item !lituse_base!@var{N}
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Used with any memory format instruction (e.g.@: @code{ldl}) to indicate
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that the literal is used for an address load. The offset field of the
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instruction must be zero. During relaxation, the code may be altered
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to use a gp-relative load.
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@item !lituse_jsr!@var{N}
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Used with a register branch format instruction (e.g.@: @code{jsr}) to
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indicate that the literal is used for a call. During relaxation, the
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code may be altered to use a direct branch (e.g.@: @code{bsr}).
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@item !lituse_bytoff!@var{N}
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Used with a byte mask instruction (e.g.@: @code{extbl}) to indicate
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||||
that only the low 3 bits of the address are relevant. During relaxation,
|
||||
the code may be altered to use an immediate instead of a register shift.
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||||
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||||
@item !lituse_addr!@var{N}
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Used with any other instruction to indicate that the original address
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is in fact used, and the original @code{ldq} instruction may not be
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altered or deleted. This is useful in conjunction with @code{lituse_jsr}
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to test whether a weak symbol is defined.
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||||
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||||
@example
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||||
ldq $27,foo($29) !literal!1
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||||
beq $27,is_undef !lituse_addr!1
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jsr $26,($27),foo !lituse_jsr!1
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||||
@end example
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||||
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@item !gpdisp!@var{N}
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||||
Used with @code{ldah} and @code{lda} to load the GP from the current
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||||
address, a-la the @code{ldgp} macro. The source register for the
|
||||
@code{ldah} instruction must contain the address of the @code{ldah}
|
||||
instruction. There must be exactly one @code{lda} instruction paired
|
||||
with the @code{ldah} instruction, though it may appear anywhere in
|
||||
the instruction stream. The immediate operands must be zero.
|
||||
|
||||
@example
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||||
bsr $26,foo
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ldah $29,0($26) !gpdisp!1
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lda $29,0($29) !gpdisp!1
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@end example
|
||||
|
||||
@item !gprelhigh
|
||||
Used with an @code{ldah} instruction to add the high 16 bits of a
|
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32-bit displacement from the GP.
|
||||
|
||||
@item !gprellow
|
||||
Used with any memory format instruction to add the low 16 bits of a
|
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32-bit displacement from the GP.
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||||
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||||
@item !gprel
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||||
Used with any memory format instruction to add a 16-bit displacement
|
||||
from the GP.
|
||||
|
||||
@item !samegp
|
||||
Used with any branch format instruction to skip the GP load at the
|
||||
target address. The referenced symbol must have the same GP as the
|
||||
source object file, and it must be declared to either not use @code{$27}
|
||||
or perform a standard GP load in the first two instructions via the
|
||||
@code{.prologue} directive.
|
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@end table
|
||||
|
||||
@node Alpha Floating Point
|
||||
@section Floating Point
|
||||
@cindex floating point, Alpha (@sc{ieee})
|
||||
@cindex Alpha floating point (@sc{ieee})
|
||||
The Alpha family uses both @sc{ieee} and VAX floating-point numbers.
|
||||
|
||||
@node Alpha Directives
|
||||
@section Alpha Assembler Directives
|
||||
|
||||
@command{@value{AS}} for the Alpha supports many additional directives for
|
||||
compatibility with the native assembler. This section describes them only
|
||||
briefly.
|
||||
|
||||
@cindex Alpha-only directives
|
||||
These are the additional directives in @code{@value{AS}} for the Alpha:
|
||||
|
||||
@table @code
|
||||
@item .arch @var{cpu}
|
||||
Specifies the target processor. This is equivalent to the
|
||||
@option{-m@var{cpu}} command-line option. @xref{Alpha Options, Options},
|
||||
for a list of values for @var{cpu}.
|
||||
|
||||
@item .ent @var{function}[, @var{n}]
|
||||
Mark the beginning of @var{function}. An optional number may follow for
|
||||
compatibility with the OSF/1 assembler, but is ignored. When generating
|
||||
@code{.mdebug} information, this will create a procedure descriptor for
|
||||
the function. In ELF, it will mark the symbol as a function a-la the
|
||||
generic @code{.type} directive.
|
||||
|
||||
@item .end @var{function}
|
||||
Mark the end of @var{function}. In ELF, it will set the size of the symbol
|
||||
a-la the generic @code{.size} directive.
|
||||
|
||||
@item .mask @var{mask}, @var{offset}
|
||||
Indicate which of the integer registers are saved in the current
|
||||
function's stack frame. @var{mask} is interpreted a bit mask in which
|
||||
bit @var{n} set indicates that register @var{n} is saved. The registers
|
||||
are saved in a block located @var{offset} bytes from the @dfn{canonical
|
||||
frame address} (CFA) which is the value of the stack pointer on entry to
|
||||
the function. The registers are saved sequentially, except that the
|
||||
return address register (normally @code{$26}) is saved first.
|
||||
|
||||
This and the other directives that describe the stack frame are
|
||||
currently only used when generating @code{.mdebug} information. They
|
||||
may in the future be used to generate DWARF2 @code{.debug_frame} unwind
|
||||
information for hand written assembly.
|
||||
|
||||
@item .fmask @var{mask}, @var{offset}
|
||||
Indicate which of the floating-point registers are saved in the current
|
||||
stack frame. The @var{mask} and @var{offset} parameters are interpreted
|
||||
as with @code{.mask}.
|
||||
|
||||
@item .frame @var{framereg}, @var{frameoffset}, @var{retreg}[, @var{argoffset}]
|
||||
Describes the shape of the stack frame. The frame pointer in use is
|
||||
@var{framereg}; normally this is either @code{$fp} or @code{$sp}. The
|
||||
frame pointer is @var{frameoffset} bytes below the CFA. The return
|
||||
address is initially located in @var{retreg} until it is saved as
|
||||
indicated in @code{.mask}. For compatibility with OSF/1 an optional
|
||||
@var{argoffset} parameter is accepted and ignored. It is believed to
|
||||
indicate the offset from the CFA to the saved argument registers.
|
||||
|
||||
@item .prologue @var{n}
|
||||
Indicate that the stack frame is set up and all registers have been
|
||||
spilled. The argument @var{n} indicates whether and how the function
|
||||
uses the incoming @dfn{procedure vector} (the address of the called
|
||||
function) in @code{$27}. 0 indicates that @code{$27} is not used; 1
|
||||
indicates that the first two instructions of the function use @code{$27}
|
||||
to perform a load of the GP register; 2 indicates that @code{$27} is
|
||||
used in some non-standard way and so the linker cannot elide the load of
|
||||
the procedure vector during relaxation.
|
||||
|
||||
@item .gprel32 @var{expression}
|
||||
Computes the difference between the address in @var{expression} and the
|
||||
GP for the current object file, and stores it in 4 bytes. In addition
|
||||
to being smaller than a full 8 byte address, this also does not require
|
||||
a dynamic relocation when used in a shared library.
|
||||
|
||||
@item .t_floating @var{expression}
|
||||
Stores @var{expression} as an @sc{ieee} double precision value.
|
||||
|
||||
@item .s_floating @var{expression}
|
||||
Stores @var{expression} as an @sc{ieee} single precision value.
|
||||
|
||||
@item .f_floating @var{expression}
|
||||
Stores @var{expression} as a VAX F format value.
|
||||
|
||||
@item .g_floating @var{expression}
|
||||
Stores @var{expression} as a VAX G format value.
|
||||
|
||||
@item .d_floating @var{expression}
|
||||
Stores @var{expression} as a VAX D format value.
|
||||
|
||||
@item .set @var{feature}
|
||||
Enables or disables various assembler features. Using the positive
|
||||
name of the feature enables while using @samp{no@var{feature}} disables.
|
||||
|
||||
@table @code
|
||||
@item at
|
||||
Indicates that macro expansions may clobber the @dfn{assembler
|
||||
temporary} (@code{$at} or @code{$28}) register. Some macros may not be
|
||||
expanded without this and will generate an error message if @code{noat}
|
||||
is in effect. When @code{at} is in effect, a warning will be generated
|
||||
if @code{$at} is used by the programmer.
|
||||
|
||||
@item macro
|
||||
Enables the expasion of macro instructions. Note that variants of real
|
||||
instructions, such as @code{br label} vs @code{br $31,label} are
|
||||
considered alternate forms and not macros.
|
||||
|
||||
@item move
|
||||
@itemx reorder
|
||||
@itemx volatile
|
||||
These control whether and how the assembler may re-order instructions.
|
||||
Accepted for compatibility with the OSF/1 assembler, but @command{@value{AS}}
|
||||
does not do instruction scheduling, so these features are ignored.
|
||||
@end table
|
||||
@end table
|
||||
|
||||
The following directives are recognized for compatibility with the OSF/1
|
||||
assembler but are ignored.
|
||||
|
||||
@example
|
||||
.proc .aproc
|
||||
.reguse .livereg
|
||||
.option .aent
|
||||
.ugen .eflag
|
||||
.alias .noalias
|
||||
@end example
|
||||
|
||||
@node Alpha Opcodes
|
||||
@section Opcodes
|
||||
For detailed information on the Alpha machine instruction set, see the
|
||||
@c Attempt to work around a very overfull hbox.
|
||||
@iftex
|
||||
Alpha Architecture Handbook located at
|
||||
@smallfonts
|
||||
@example
|
||||
ftp://ftp.digital.com/pub/Digital/info/semiconductor/literature/alphaahb.pdf
|
||||
@end example
|
||||
@textfonts
|
||||
@end iftex
|
||||
@ifnottex
|
||||
@uref{ftp://ftp.digital.com/pub/Digital/info/semiconductor/literature/alphaahb.pdf,Alpha Architecture Handbook}.
|
||||
@end ifnottex
|
||||
Loading…
Reference in New Issue
Block a user