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* cgen-engine.h (EXTRACT_MSB0_SINT): Renamed from EXTRACT_MSB0_INT. 

(EXTRACT_LSB0_SINT): Renamed from EXTRACT_LSB0_INT.
plus regenerate cgen files
This commit is contained in:
Doug Evans 2009-11-23 09:37:09 +00:00
parent c90188f694
commit 62836bf48e
23 changed files with 288 additions and 281 deletions
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5
sim/common/ChangeLog
View File

@ -1,3 +1,8 @@
2009-11-23 Doug Evans <dje@sebabeach.org>
* cgen-engine.h (EXTRACT_MSB0_SINT): Renamed from EXTRACT_MSB0_INT.
(EXTRACT_LSB0_SINT): Renamed from EXTRACT_LSB0_INT.
2009-11-22 Doug Evans <dje@sebabeach.org>
* cgen-engine.h (EXTRACT_MSB0_LGSINT, EXTRACT_MSB0_LGUINT): Define.

4
sim/common/cgen-engine.h
View File

@ -51,14 +51,14 @@ along with this program. If not, see <http://www.gnu.org/licenses/>. */
/* Instruction field support macros. */
#define EXTRACT_MSB0_INT(val, total, start, length) \
#define EXTRACT_MSB0_SINT(val, total, start, length) \
(((INT) (val) << ((sizeof (INT) * 8) - (total) + (start))) \
>> ((sizeof (INT) * 8) - (length)))
#define EXTRACT_MSB0_UINT(val, total, start, length) \
(((UINT) (val) << ((sizeof (UINT) * 8) - (total) + (start))) \
>> ((sizeof (UINT) * 8) - (length)))
#define EXTRACT_LSB0_INT(val, total, start, length) \
#define EXTRACT_LSB0_SINT(val, total, start, length) \
(((INT) (val) << ((sizeof (INT) * 8) - (start) - 1)) \
>> ((sizeof (INT) * 8) - (length)))
#define EXTRACT_LSB0_UINT(val, total, start, length) \

10
sim/cris/cpuv10.h
View File

@ -596,7 +596,7 @@ struct scache {
f_operand2 = EXTRACT_LSB0_UINT (insn, 16, 15, 4); \
f_mode = EXTRACT_LSB0_UINT (insn, 16, 11, 2); \
f_opcode = EXTRACT_LSB0_UINT (insn, 16, 9, 4); \
f_s6 = EXTRACT_LSB0_INT (insn, 16, 5, 6); \
f_s6 = EXTRACT_LSB0_SINT (insn, 16, 5, 6); \
#define EXTRACT_IFMT_MOVECBR_VARS \
UINT f_operand2; \
@ -924,7 +924,7 @@ struct scache {
f_operand2 = EXTRACT_LSB0_UINT (insn, 16, 15, 4); \
f_mode = EXTRACT_LSB0_UINT (insn, 16, 11, 2); \
f_opcode_hi = EXTRACT_LSB0_UINT (insn, 16, 9, 2); \
f_disp9_hi = EXTRACT_LSB0_INT (insn, 16, 0, 1); \
f_disp9_hi = EXTRACT_LSB0_SINT (insn, 16, 0, 1); \
f_disp9_lo = EXTRACT_LSB0_UINT (insn, 16, 7, 7); \
{\
SI tmp_abslo;\
@ -947,7 +947,7 @@ struct scache {
f_operand2 = EXTRACT_LSB0_UINT (insn, 16, 15, 4); \
f_mode = EXTRACT_LSB0_UINT (insn, 16, 11, 2); \
f_opcode_hi = EXTRACT_LSB0_UINT (insn, 16, 9, 2); \
f_disp9_hi = EXTRACT_LSB0_INT (insn, 16, 0, 1); \
f_disp9_hi = EXTRACT_LSB0_SINT (insn, 16, 0, 1); \
f_disp9_lo = EXTRACT_LSB0_UINT (insn, 16, 7, 7); \
{\
SI tmp_abslo;\
@ -1058,7 +1058,7 @@ struct scache {
f_operand2 = EXTRACT_LSB0_UINT (insn, 16, 15, 4); \
f_mode = EXTRACT_LSB0_UINT (insn, 16, 11, 2); \
f_opcode_hi = EXTRACT_LSB0_UINT (insn, 16, 9, 2); \
f_s8 = EXTRACT_LSB0_INT (insn, 16, 7, 8); \
f_s8 = EXTRACT_LSB0_SINT (insn, 16, 7, 8); \
#define EXTRACT_IFMT_BDAPQPC_VARS \
UINT f_operand2; \
@ -1071,7 +1071,7 @@ struct scache {
f_operand2 = EXTRACT_LSB0_UINT (insn, 16, 15, 4); \
f_mode = EXTRACT_LSB0_UINT (insn, 16, 11, 2); \
f_opcode_hi = EXTRACT_LSB0_UINT (insn, 16, 9, 2); \
f_s8 = EXTRACT_LSB0_INT (insn, 16, 7, 8); \
f_s8 = EXTRACT_LSB0_SINT (insn, 16, 7, 8); \
/* Collection of various things for the trace handler to use. */

8
sim/cris/cpuv32.h
View File

@ -709,7 +709,7 @@ struct scache {
f_operand2 = EXTRACT_LSB0_UINT (insn, 16, 15, 4); \
f_mode = EXTRACT_LSB0_UINT (insn, 16, 11, 2); \
f_opcode = EXTRACT_LSB0_UINT (insn, 16, 9, 4); \
f_s6 = EXTRACT_LSB0_INT (insn, 16, 5, 6); \
f_s6 = EXTRACT_LSB0_SINT (insn, 16, 5, 6); \
#define EXTRACT_IFMT_MOVECBR_VARS \
UINT f_operand2; \
@ -1082,7 +1082,7 @@ struct scache {
f_operand2 = EXTRACT_LSB0_UINT (insn, 16, 15, 4); \
f_mode = EXTRACT_LSB0_UINT (insn, 16, 11, 2); \
f_opcode_hi = EXTRACT_LSB0_UINT (insn, 16, 9, 2); \
f_disp9_hi = EXTRACT_LSB0_INT (insn, 16, 0, 1); \
f_disp9_hi = EXTRACT_LSB0_SINT (insn, 16, 0, 1); \
f_disp9_lo = EXTRACT_LSB0_UINT (insn, 16, 7, 7); \
{\
SI tmp_abslo;\
@ -1105,7 +1105,7 @@ struct scache {
f_operand2 = EXTRACT_LSB0_UINT (insn, 16, 15, 4); \
f_mode = EXTRACT_LSB0_UINT (insn, 16, 11, 2); \
f_opcode_hi = EXTRACT_LSB0_UINT (insn, 16, 9, 2); \
f_disp9_hi = EXTRACT_LSB0_INT (insn, 16, 0, 1); \
f_disp9_hi = EXTRACT_LSB0_SINT (insn, 16, 0, 1); \
f_disp9_lo = EXTRACT_LSB0_UINT (insn, 16, 7, 7); \
{\
SI tmp_abslo;\
@ -1251,7 +1251,7 @@ struct scache {
f_operand2 = EXTRACT_LSB0_UINT (insn, 16, 15, 4); \
f_mode = EXTRACT_LSB0_UINT (insn, 16, 11, 2); \
f_opcode_hi = EXTRACT_LSB0_UINT (insn, 16, 9, 2); \
f_s8 = EXTRACT_LSB0_INT (insn, 16, 7, 8); \
f_s8 = EXTRACT_LSB0_SINT (insn, 16, 7, 8); \
#define EXTRACT_IFMT_FIDXI_VARS \
UINT f_operand2; \

14
sim/cris/decodev10.c
View File

@ -2499,7 +2499,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
INT f_s6;
f_operand2 = EXTRACT_LSB0_UINT (insn, 16, 15, 4);
f_s6 = EXTRACT_LSB0_INT (insn, 16, 5, 6);
f_s6 = EXTRACT_LSB0_SINT (insn, 16, 5, 6);
/* Record the fields for the semantic handler. */
FLD (f_s6) = f_s6;
@ -3006,7 +3006,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
INT f_s6;
f_operand2 = EXTRACT_LSB0_UINT (insn, 16, 15, 4);
f_s6 = EXTRACT_LSB0_INT (insn, 16, 5, 6);
f_s6 = EXTRACT_LSB0_SINT (insn, 16, 5, 6);
/* Record the fields for the semantic handler. */
FLD (f_operand2) = f_operand2;
@ -4634,7 +4634,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
INT f_s6;
f_operand2 = EXTRACT_LSB0_UINT (insn, 16, 15, 4);
f_s6 = EXTRACT_LSB0_INT (insn, 16, 5, 6);
f_s6 = EXTRACT_LSB0_SINT (insn, 16, 5, 6);
/* Record the fields for the semantic handler. */
FLD (f_operand2) = f_operand2;
@ -4855,7 +4855,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
f_operand2 = EXTRACT_LSB0_UINT (insn, 16, 15, 4);
f_disp9_lo = EXTRACT_LSB0_UINT (insn, 16, 7, 7);
f_disp9_hi = EXTRACT_LSB0_INT (insn, 16, 0, 1);
f_disp9_hi = EXTRACT_LSB0_SINT (insn, 16, 0, 1);
{
SI tmp_abslo;
SI tmp_absval;
@ -4889,7 +4889,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
INT f_disp9;
f_disp9_lo = EXTRACT_LSB0_UINT (insn, 16, 7, 7);
f_disp9_hi = EXTRACT_LSB0_INT (insn, 16, 0, 1);
f_disp9_hi = EXTRACT_LSB0_SINT (insn, 16, 0, 1);
{
SI tmp_abslo;
SI tmp_absval;
@ -5308,7 +5308,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
INT f_s8;
f_operand2 = EXTRACT_LSB0_UINT (insn, 16, 15, 4);
f_s8 = EXTRACT_LSB0_INT (insn, 16, 7, 8);
f_s8 = EXTRACT_LSB0_SINT (insn, 16, 7, 8);
/* Record the fields for the semantic handler. */
FLD (f_operand2) = f_operand2;
@ -5333,7 +5333,7 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
#define FLD(f) abuf->fields.sfmt_addoq.f
INT f_s8;
f_s8 = EXTRACT_LSB0_INT (insn, 16, 7, 8);
f_s8 = EXTRACT_LSB0_SINT (insn, 16, 7, 8);
/* Record the fields for the semantic handler. */
FLD (f_s8) = f_s8;

12
sim/cris/decodev32.c
View File

@ -1985,7 +1985,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc,
INT f_s6;
f_operand2 = EXTRACT_LSB0_UINT (insn, 16, 15, 4);
f_s6 = EXTRACT_LSB0_INT (insn, 16, 5, 6);
f_s6 = EXTRACT_LSB0_SINT (insn, 16, 5, 6);
/* Record the fields for the semantic handler. */
FLD (f_s6) = f_s6;
@ -2492,7 +2492,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc,
INT f_s6;
f_operand2 = EXTRACT_LSB0_UINT (insn, 16, 15, 4);
f_s6 = EXTRACT_LSB0_INT (insn, 16, 5, 6);
f_s6 = EXTRACT_LSB0_SINT (insn, 16, 5, 6);
/* Record the fields for the semantic handler. */
FLD (f_operand2) = f_operand2;
@ -4110,7 +4110,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc,
INT f_s6;
f_operand2 = EXTRACT_LSB0_UINT (insn, 16, 15, 4);
f_s6 = EXTRACT_LSB0_INT (insn, 16, 5, 6);
f_s6 = EXTRACT_LSB0_SINT (insn, 16, 5, 6);
/* Record the fields for the semantic handler. */
FLD (f_operand2) = f_operand2;
@ -4432,7 +4432,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc,
f_operand2 = EXTRACT_LSB0_UINT (insn, 16, 15, 4);
f_disp9_lo = EXTRACT_LSB0_UINT (insn, 16, 7, 7);
f_disp9_hi = EXTRACT_LSB0_INT (insn, 16, 0, 1);
f_disp9_hi = EXTRACT_LSB0_SINT (insn, 16, 0, 1);
{
SI tmp_abslo;
SI tmp_absval;
@ -4466,7 +4466,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc,
INT f_disp9;
f_disp9_lo = EXTRACT_LSB0_UINT (insn, 16, 7, 7);
f_disp9_hi = EXTRACT_LSB0_INT (insn, 16, 0, 1);
f_disp9_hi = EXTRACT_LSB0_SINT (insn, 16, 0, 1);
{
SI tmp_abslo;
SI tmp_absval;
@ -4836,7 +4836,7 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc,
INT f_s8;
f_operand2 = EXTRACT_LSB0_UINT (insn, 16, 15, 4);
f_s8 = EXTRACT_LSB0_INT (insn, 16, 7, 8);
f_s8 = EXTRACT_LSB0_SINT (insn, 16, 7, 8);
/* Record the fields for the semantic handler. */
FLD (f_operand2) = f_operand2;

60
sim/frv/cpu.h
View File

@ -1816,7 +1816,7 @@ struct scache {
f_GRk = EXTRACT_LSB0_UINT (insn, 32, 30, 6); \
f_op = EXTRACT_LSB0_UINT (insn, 32, 24, 7); \
f_GRi = EXTRACT_LSB0_UINT (insn, 32, 17, 6); \
f_d12 = EXTRACT_LSB0_INT (insn, 32, 11, 12); \
f_d12 = EXTRACT_LSB0_SINT (insn, 32, 11, 12); \
#define EXTRACT_IFMT_SMULI_VARS \
UINT f_pack; \
@ -1831,7 +1831,7 @@ struct scache {
f_GRk = EXTRACT_LSB0_UINT (insn, 32, 30, 6); \
f_op = EXTRACT_LSB0_UINT (insn, 32, 24, 7); \
f_GRi = EXTRACT_LSB0_UINT (insn, 32, 17, 6); \
f_d12 = EXTRACT_LSB0_INT (insn, 32, 11, 12); \
f_d12 = EXTRACT_LSB0_SINT (insn, 32, 11, 12); \
#define EXTRACT_IFMT_ADDICC_VARS \
UINT f_pack; \
@ -1848,7 +1848,7 @@ struct scache {
f_op = EXTRACT_LSB0_UINT (insn, 32, 24, 7); \
f_GRi = EXTRACT_LSB0_UINT (insn, 32, 17, 6); \
f_ICCi_1 = EXTRACT_LSB0_UINT (insn, 32, 11, 2); \
f_s10 = EXTRACT_LSB0_INT (insn, 32, 9, 10); \
f_s10 = EXTRACT_LSB0_SINT (insn, 32, 9, 10); \
#define EXTRACT_IFMT_SMULICC_VARS \
UINT f_pack; \
@ -1865,7 +1865,7 @@ struct scache {
f_op = EXTRACT_LSB0_UINT (insn, 32, 24, 7); \
f_GRi = EXTRACT_LSB0_UINT (insn, 32, 17, 6); \
f_ICCi_1 = EXTRACT_LSB0_UINT (insn, 32, 11, 2); \
f_s10 = EXTRACT_LSB0_INT (insn, 32, 9, 10); \
f_s10 = EXTRACT_LSB0_SINT (insn, 32, 9, 10); \
#define EXTRACT_IFMT_CMPB_VARS \
UINT f_pack; \
@ -1929,7 +1929,7 @@ struct scache {
f_GRk = EXTRACT_LSB0_UINT (insn, 32, 30, 6); \
f_op = EXTRACT_LSB0_UINT (insn, 32, 24, 7); \
f_misc_null_4 = EXTRACT_LSB0_UINT (insn, 32, 17, 2); \
f_s16 = EXTRACT_LSB0_INT (insn, 32, 15, 16); \
f_s16 = EXTRACT_LSB0_SINT (insn, 32, 15, 16); \
#define EXTRACT_IFMT_LDBF_VARS \
UINT f_pack; \
@ -2029,7 +2029,7 @@ struct scache {
f_GRk = EXTRACT_LSB0_UINT (insn, 32, 30, 6); \
f_op = EXTRACT_LSB0_UINT (insn, 32, 24, 7); \
f_GRi = EXTRACT_LSB0_UINT (insn, 32, 17, 6); \
f_d12 = EXTRACT_LSB0_INT (insn, 32, 11, 12); \
f_d12 = EXTRACT_LSB0_SINT (insn, 32, 11, 12); \
#define EXTRACT_IFMT_LDBFI_VARS \
UINT f_pack; \
@ -2044,7 +2044,7 @@ struct scache {
f_FRk = EXTRACT_LSB0_UINT (insn, 32, 30, 6); \
f_op = EXTRACT_LSB0_UINT (insn, 32, 24, 7); \
f_GRi = EXTRACT_LSB0_UINT (insn, 32, 17, 6); \
f_d12 = EXTRACT_LSB0_INT (insn, 32, 11, 12); \
f_d12 = EXTRACT_LSB0_SINT (insn, 32, 11, 12); \
#define EXTRACT_IFMT_LDDI_VARS \
UINT f_pack; \
@ -2059,7 +2059,7 @@ struct scache {
f_GRk = EXTRACT_LSB0_UINT (insn, 32, 30, 6); \
f_op = EXTRACT_LSB0_UINT (insn, 32, 24, 7); \
f_GRi = EXTRACT_LSB0_UINT (insn, 32, 17, 6); \
f_d12 = EXTRACT_LSB0_INT (insn, 32, 11, 12); \
f_d12 = EXTRACT_LSB0_SINT (insn, 32, 11, 12); \
#define EXTRACT_IFMT_LDDFI_VARS \
UINT f_pack; \
@ -2074,7 +2074,7 @@ struct scache {
f_FRk = EXTRACT_LSB0_UINT (insn, 32, 30, 6); \
f_op = EXTRACT_LSB0_UINT (insn, 32, 24, 7); \
f_GRi = EXTRACT_LSB0_UINT (insn, 32, 17, 6); \
f_d12 = EXTRACT_LSB0_INT (insn, 32, 11, 12); \
f_d12 = EXTRACT_LSB0_SINT (insn, 32, 11, 12); \
#define EXTRACT_IFMT_CLDBF_VARS \
UINT f_pack; \
@ -2192,7 +2192,7 @@ struct scache {
f_ICCi_2_null = EXTRACT_LSB0_UINT (insn, 32, 26, 2); \
f_op = EXTRACT_LSB0_UINT (insn, 32, 24, 7); \
f_hint = EXTRACT_LSB0_UINT (insn, 32, 17, 2); \
f_label16 = ((((EXTRACT_LSB0_INT (insn, 32, 15, 16)) << (2))) + (pc)); \
f_label16 = ((((EXTRACT_LSB0_SINT (insn, 32, 15, 16)) << (2))) + (pc)); \
#define EXTRACT_IFMT_BNO_VARS \
UINT f_pack; \
@ -2226,7 +2226,7 @@ struct scache {
f_ICCi_2 = EXTRACT_LSB0_UINT (insn, 32, 26, 2); \
f_op = EXTRACT_LSB0_UINT (insn, 32, 24, 7); \
f_hint = EXTRACT_LSB0_UINT (insn, 32, 17, 2); \
f_label16 = ((((EXTRACT_LSB0_INT (insn, 32, 15, 16)) << (2))) + (pc)); \
f_label16 = ((((EXTRACT_LSB0_SINT (insn, 32, 15, 16)) << (2))) + (pc)); \
#define EXTRACT_IFMT_FBRA_VARS \
UINT f_pack; \
@ -2243,7 +2243,7 @@ struct scache {
f_FCCi_2_null = EXTRACT_LSB0_UINT (insn, 32, 26, 2); \
f_op = EXTRACT_LSB0_UINT (insn, 32, 24, 7); \
f_hint = EXTRACT_LSB0_UINT (insn, 32, 17, 2); \
f_label16 = ((((EXTRACT_LSB0_INT (insn, 32, 15, 16)) << (2))) + (pc)); \
f_label16 = ((((EXTRACT_LSB0_SINT (insn, 32, 15, 16)) << (2))) + (pc)); \
#define EXTRACT_IFMT_FBNO_VARS \
UINT f_pack; \
@ -2277,7 +2277,7 @@ struct scache {
f_FCCi_2 = EXTRACT_LSB0_UINT (insn, 32, 26, 2); \
f_op = EXTRACT_LSB0_UINT (insn, 32, 24, 7); \
f_hint = EXTRACT_LSB0_UINT (insn, 32, 17, 2); \
f_label16 = ((((EXTRACT_LSB0_INT (insn, 32, 15, 16)) << (2))) + (pc)); \
f_label16 = ((((EXTRACT_LSB0_SINT (insn, 32, 15, 16)) << (2))) + (pc)); \
#define EXTRACT_IFMT_BCTRLR_VARS \
UINT f_pack; \
@ -2563,7 +2563,7 @@ struct scache {
f_LI_off = EXTRACT_LSB0_UINT (insn, 32, 25, 1); \
f_op = EXTRACT_LSB0_UINT (insn, 32, 24, 7); \
f_GRi = EXTRACT_LSB0_UINT (insn, 32, 17, 6); \
f_d12 = EXTRACT_LSB0_INT (insn, 32, 11, 12); \
f_d12 = EXTRACT_LSB0_SINT (insn, 32, 11, 12); \
#define EXTRACT_IFMT_CALLIL_VARS \
UINT f_pack; \
@ -2580,7 +2580,7 @@ struct scache {
f_LI_on = EXTRACT_LSB0_UINT (insn, 32, 25, 1); \
f_op = EXTRACT_LSB0_UINT (insn, 32, 24, 7); \
f_GRi = EXTRACT_LSB0_UINT (insn, 32, 17, 6); \
f_d12 = EXTRACT_LSB0_INT (insn, 32, 11, 12); \
f_d12 = EXTRACT_LSB0_SINT (insn, 32, 11, 12); \
#define EXTRACT_IFMT_CALL_VARS \
UINT f_pack; \
@ -2593,7 +2593,7 @@ struct scache {
length = 4; \
f_pack = EXTRACT_LSB0_UINT (insn, 32, 31, 1); \
f_op = EXTRACT_LSB0_UINT (insn, 32, 24, 7); \
f_labelH6 = EXTRACT_LSB0_INT (insn, 32, 30, 6); \
f_labelH6 = EXTRACT_LSB0_SINT (insn, 32, 30, 6); \
f_labelL18 = EXTRACT_LSB0_UINT (insn, 32, 17, 18); \
{\
f_label24 = ((((((((f_labelH6) << (18))) | (f_labelL18))) << (2))) + (pc));\
@ -2772,7 +2772,7 @@ struct scache {
f_ICCi_2_null = EXTRACT_LSB0_UINT (insn, 32, 26, 2); \
f_op = EXTRACT_LSB0_UINT (insn, 32, 24, 7); \
f_GRi = EXTRACT_LSB0_UINT (insn, 32, 17, 6); \
f_d12 = EXTRACT_LSB0_INT (insn, 32, 11, 12); \
f_d12 = EXTRACT_LSB0_SINT (insn, 32, 11, 12); \
#define EXTRACT_IFMT_TINO_VARS \
UINT f_pack; \
@ -2806,7 +2806,7 @@ struct scache {
f_ICCi_2 = EXTRACT_LSB0_UINT (insn, 32, 26, 2); \
f_op = EXTRACT_LSB0_UINT (insn, 32, 24, 7); \
f_GRi = EXTRACT_LSB0_UINT (insn, 32, 17, 6); \
f_d12 = EXTRACT_LSB0_INT (insn, 32, 11, 12); \
f_d12 = EXTRACT_LSB0_SINT (insn, 32, 11, 12); \
#define EXTRACT_IFMT_FTIRA_VARS \
UINT f_pack; \
@ -2823,7 +2823,7 @@ struct scache {
f_ICCi_2_null = EXTRACT_LSB0_UINT (insn, 32, 26, 2); \
f_op = EXTRACT_LSB0_UINT (insn, 32, 24, 7); \
f_GRi = EXTRACT_LSB0_UINT (insn, 32, 17, 6); \
f_d12 = EXTRACT_LSB0_INT (insn, 32, 11, 12); \
f_d12 = EXTRACT_LSB0_SINT (insn, 32, 11, 12); \
#define EXTRACT_IFMT_FTINO_VARS \
UINT f_pack; \
@ -2857,7 +2857,7 @@ struct scache {
f_FCCi_2 = EXTRACT_LSB0_UINT (insn, 32, 26, 2); \
f_op = EXTRACT_LSB0_UINT (insn, 32, 24, 7); \
f_GRi = EXTRACT_LSB0_UINT (insn, 32, 17, 6); \
f_d12 = EXTRACT_LSB0_INT (insn, 32, 11, 12); \
f_d12 = EXTRACT_LSB0_SINT (insn, 32, 11, 12); \
#define EXTRACT_IFMT_BREAK_VARS \
UINT f_pack; \
@ -3249,7 +3249,7 @@ struct scache {
f_CPRk = EXTRACT_LSB0_UINT (insn, 32, 30, 6); \
f_op = EXTRACT_LSB0_UINT (insn, 32, 24, 7); \
f_CPRi = EXTRACT_LSB0_UINT (insn, 32, 17, 6); \
f_s6_1 = EXTRACT_LSB0_INT (insn, 32, 11, 6); \
f_s6_1 = EXTRACT_LSB0_SINT (insn, 32, 11, 6); \
f_CPRj = EXTRACT_LSB0_UINT (insn, 32, 5, 6); \
#define EXTRACT_IFMT_CLRGR_VARS \
@ -3582,7 +3582,7 @@ struct scache {
f_FRk = EXTRACT_LSB0_UINT (insn, 32, 30, 6); \
f_op = EXTRACT_LSB0_UINT (insn, 32, 24, 7); \
f_ope1 = EXTRACT_LSB0_UINT (insn, 32, 11, 6); \
f_u12_h = EXTRACT_LSB0_INT (insn, 32, 17, 6); \
f_u12_h = EXTRACT_LSB0_SINT (insn, 32, 17, 6); \
f_u12_l = EXTRACT_LSB0_UINT (insn, 32, 5, 6); \
{\
f_u12 = ((((f_u12_h) << (6))) | (f_u12_l));\
@ -3603,7 +3603,7 @@ struct scache {
f_FRk = EXTRACT_LSB0_UINT (insn, 32, 30, 6); \
f_op = EXTRACT_LSB0_UINT (insn, 32, 24, 7); \
f_ope1 = EXTRACT_LSB0_UINT (insn, 32, 11, 6); \
f_u12_h = EXTRACT_LSB0_INT (insn, 32, 17, 6); \
f_u12_h = EXTRACT_LSB0_SINT (insn, 32, 17, 6); \
f_u12_l = EXTRACT_LSB0_UINT (insn, 32, 5, 6); \
{\
f_u12 = ((((f_u12_h) << (6))) | (f_u12_l));\
@ -3624,7 +3624,7 @@ struct scache {
f_FRk = EXTRACT_LSB0_UINT (insn, 32, 30, 6); \
f_op = EXTRACT_LSB0_UINT (insn, 32, 24, 7); \
f_ope1 = EXTRACT_LSB0_UINT (insn, 32, 11, 6); \
f_u12_h = EXTRACT_LSB0_INT (insn, 32, 17, 6); \
f_u12_h = EXTRACT_LSB0_SINT (insn, 32, 17, 6); \
f_u12_l = EXTRACT_LSB0_UINT (insn, 32, 5, 6); \
{\
f_u12 = ((((f_u12_h) << (6))) | (f_u12_l));\
@ -3647,7 +3647,7 @@ struct scache {
f_FRi_null = EXTRACT_LSB0_UINT (insn, 32, 17, 6); \
f_ope1 = EXTRACT_LSB0_UINT (insn, 32, 11, 6); \
f_misc_null_11 = EXTRACT_LSB0_UINT (insn, 32, 5, 1); \
f_s5 = EXTRACT_LSB0_INT (insn, 32, 4, 5); \
f_s5 = EXTRACT_LSB0_SINT (insn, 32, 4, 5); \
#define EXTRACT_IFMT_MHSETHIH_VARS \
UINT f_pack; \
@ -3666,7 +3666,7 @@ struct scache {
f_FRi_null = EXTRACT_LSB0_UINT (insn, 32, 17, 6); \
f_ope1 = EXTRACT_LSB0_UINT (insn, 32, 11, 6); \
f_misc_null_11 = EXTRACT_LSB0_UINT (insn, 32, 5, 1); \
f_s5 = EXTRACT_LSB0_INT (insn, 32, 4, 5); \
f_s5 = EXTRACT_LSB0_SINT (insn, 32, 4, 5); \
#define EXTRACT_IFMT_MHDSETH_VARS \
UINT f_pack; \
@ -3685,7 +3685,7 @@ struct scache {
f_FRi_null = EXTRACT_LSB0_UINT (insn, 32, 17, 6); \
f_ope1 = EXTRACT_LSB0_UINT (insn, 32, 11, 6); \
f_misc_null_11 = EXTRACT_LSB0_UINT (insn, 32, 5, 1); \
f_s5 = EXTRACT_LSB0_INT (insn, 32, 4, 5); \
f_s5 = EXTRACT_LSB0_SINT (insn, 32, 4, 5); \
#define EXTRACT_IFMT_MAND_VARS \
UINT f_pack; \
@ -3812,7 +3812,7 @@ struct scache {
f_op = EXTRACT_LSB0_UINT (insn, 32, 24, 7); \
f_ACC40Si = EXTRACT_LSB0_UINT (insn, 32, 17, 6); \
f_ope1 = EXTRACT_LSB0_UINT (insn, 32, 11, 6); \
f_s6 = EXTRACT_LSB0_INT (insn, 32, 5, 6); \
f_s6 = EXTRACT_LSB0_SINT (insn, 32, 5, 6); \
#define EXTRACT_IFMT_MDCUTSSI_VARS \
UINT f_pack; \
@ -3829,7 +3829,7 @@ struct scache {
f_op = EXTRACT_LSB0_UINT (insn, 32, 24, 7); \
f_ACC40Si = EXTRACT_LSB0_UINT (insn, 32, 17, 6); \
f_ope1 = EXTRACT_LSB0_UINT (insn, 32, 11, 6); \
f_s6 = EXTRACT_LSB0_INT (insn, 32, 5, 6); \
f_s6 = EXTRACT_LSB0_SINT (insn, 32, 5, 6); \
#define EXTRACT_IFMT_MDROTLI_VARS \
UINT f_pack; \
@ -3846,7 +3846,7 @@ struct scache {
f_op = EXTRACT_LSB0_UINT (insn, 32, 24, 7); \
f_FRi = EXTRACT_LSB0_UINT (insn, 32, 17, 6); \
f_ope1 = EXTRACT_LSB0_UINT (insn, 32, 11, 6); \
f_s6 = EXTRACT_LSB0_INT (insn, 32, 5, 6); \
f_s6 = EXTRACT_LSB0_SINT (insn, 32, 5, 6); \
#define EXTRACT_IFMT_MQSATHS_VARS \
UINT f_pack; \

84
sim/frv/decode.c
View File

@ -3864,7 +3864,7 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc,
f_GRk = EXTRACT_LSB0_UINT (insn, 32, 30, 6);
f_GRi = EXTRACT_LSB0_UINT (insn, 32, 17, 6);
f_d12 = EXTRACT_LSB0_INT (insn, 32, 11, 12);
f_d12 = EXTRACT_LSB0_SINT (insn, 32, 11, 12);
/* Record the fields for the semantic handler. */
FLD (f_GRi) = f_GRi;
@ -3895,7 +3895,7 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc,
f_GRk = EXTRACT_LSB0_UINT (insn, 32, 30, 6);
f_GRi = EXTRACT_LSB0_UINT (insn, 32, 17, 6);
f_d12 = EXTRACT_LSB0_INT (insn, 32, 11, 12);
f_d12 = EXTRACT_LSB0_SINT (insn, 32, 11, 12);
/* Record the fields for the semantic handler. */
FLD (f_GRi) = f_GRi;
@ -3926,7 +3926,7 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc,
f_GRk = EXTRACT_LSB0_UINT (insn, 32, 30, 6);
f_GRi = EXTRACT_LSB0_UINT (insn, 32, 17, 6);
f_d12 = EXTRACT_LSB0_INT (insn, 32, 11, 12);
f_d12 = EXTRACT_LSB0_SINT (insn, 32, 11, 12);
/* Record the fields for the semantic handler. */
FLD (f_GRi) = f_GRi;
@ -3959,7 +3959,7 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc,
f_GRk = EXTRACT_LSB0_UINT (insn, 32, 30, 6);
f_GRi = EXTRACT_LSB0_UINT (insn, 32, 17, 6);
f_ICCi_1 = EXTRACT_LSB0_UINT (insn, 32, 11, 2);
f_s10 = EXTRACT_LSB0_INT (insn, 32, 9, 10);
f_s10 = EXTRACT_LSB0_SINT (insn, 32, 9, 10);
/* Record the fields for the semantic handler. */
FLD (f_GRi) = f_GRi;
@ -3995,7 +3995,7 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc,
f_GRk = EXTRACT_LSB0_UINT (insn, 32, 30, 6);
f_GRi = EXTRACT_LSB0_UINT (insn, 32, 17, 6);
f_ICCi_1 = EXTRACT_LSB0_UINT (insn, 32, 11, 2);
f_s10 = EXTRACT_LSB0_INT (insn, 32, 9, 10);
f_s10 = EXTRACT_LSB0_SINT (insn, 32, 9, 10);
/* Record the fields for the semantic handler. */
FLD (f_GRi) = f_GRi;
@ -4031,7 +4031,7 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc,
f_GRk = EXTRACT_LSB0_UINT (insn, 32, 30, 6);
f_GRi = EXTRACT_LSB0_UINT (insn, 32, 17, 6);
f_ICCi_1 = EXTRACT_LSB0_UINT (insn, 32, 11, 2);
f_s10 = EXTRACT_LSB0_INT (insn, 32, 9, 10);
f_s10 = EXTRACT_LSB0_SINT (insn, 32, 9, 10);
/* Record the fields for the semantic handler. */
FLD (f_GRi) = f_GRi;
@ -4067,7 +4067,7 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc,
f_GRk = EXTRACT_LSB0_UINT (insn, 32, 30, 6);
f_GRi = EXTRACT_LSB0_UINT (insn, 32, 17, 6);
f_ICCi_1 = EXTRACT_LSB0_UINT (insn, 32, 11, 2);
f_s10 = EXTRACT_LSB0_INT (insn, 32, 9, 10);
f_s10 = EXTRACT_LSB0_SINT (insn, 32, 9, 10);
/* Record the fields for the semantic handler. */
FLD (f_GRi) = f_GRi;
@ -4184,7 +4184,7 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc,
INT f_s16;
f_GRk = EXTRACT_LSB0_UINT (insn, 32, 30, 6);
f_s16 = EXTRACT_LSB0_INT (insn, 32, 15, 16);
f_s16 = EXTRACT_LSB0_SINT (insn, 32, 15, 16);
/* Record the fields for the semantic handler. */
FLD (f_s16) = f_s16;
@ -5178,7 +5178,7 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc,
f_GRk = EXTRACT_LSB0_UINT (insn, 32, 30, 6);
f_GRi = EXTRACT_LSB0_UINT (insn, 32, 17, 6);
f_d12 = EXTRACT_LSB0_INT (insn, 32, 11, 12);
f_d12 = EXTRACT_LSB0_SINT (insn, 32, 11, 12);
/* Record the fields for the semantic handler. */
FLD (f_GRi) = f_GRi;
@ -5209,7 +5209,7 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc,
f_FRk = EXTRACT_LSB0_UINT (insn, 32, 30, 6);
f_GRi = EXTRACT_LSB0_UINT (insn, 32, 17, 6);
f_d12 = EXTRACT_LSB0_INT (insn, 32, 11, 12);
f_d12 = EXTRACT_LSB0_SINT (insn, 32, 11, 12);
/* Record the fields for the semantic handler. */
FLD (f_GRi) = f_GRi;
@ -5240,7 +5240,7 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc,
f_GRk = EXTRACT_LSB0_UINT (insn, 32, 30, 6);
f_GRi = EXTRACT_LSB0_UINT (insn, 32, 17, 6);
f_d12 = EXTRACT_LSB0_INT (insn, 32, 11, 12);
f_d12 = EXTRACT_LSB0_SINT (insn, 32, 11, 12);
/* Record the fields for the semantic handler. */
FLD (f_GRi) = f_GRi;
@ -5271,7 +5271,7 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc,
f_FRk = EXTRACT_LSB0_UINT (insn, 32, 30, 6);
f_GRi = EXTRACT_LSB0_UINT (insn, 32, 17, 6);
f_d12 = EXTRACT_LSB0_INT (insn, 32, 11, 12);
f_d12 = EXTRACT_LSB0_SINT (insn, 32, 11, 12);
/* Record the fields for the semantic handler. */
FLD (f_GRi) = f_GRi;
@ -5302,7 +5302,7 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc,
f_GRk = EXTRACT_LSB0_UINT (insn, 32, 30, 6);
f_GRi = EXTRACT_LSB0_UINT (insn, 32, 17, 6);
f_d12 = EXTRACT_LSB0_INT (insn, 32, 11, 12);
f_d12 = EXTRACT_LSB0_SINT (insn, 32, 11, 12);
/* Record the fields for the semantic handler. */
FLD (f_GRi) = f_GRi;
@ -5333,7 +5333,7 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc,
f_FRk = EXTRACT_LSB0_UINT (insn, 32, 30, 6);
f_GRi = EXTRACT_LSB0_UINT (insn, 32, 17, 6);
f_d12 = EXTRACT_LSB0_INT (insn, 32, 11, 12);
f_d12 = EXTRACT_LSB0_SINT (insn, 32, 11, 12);
/* Record the fields for the semantic handler. */
FLD (f_GRi) = f_GRi;
@ -5364,7 +5364,7 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc,
f_GRk = EXTRACT_LSB0_UINT (insn, 32, 30, 6);
f_GRi = EXTRACT_LSB0_UINT (insn, 32, 17, 6);
f_d12 = EXTRACT_LSB0_INT (insn, 32, 11, 12);
f_d12 = EXTRACT_LSB0_SINT (insn, 32, 11, 12);
/* Record the fields for the semantic handler. */
FLD (f_GRi) = f_GRi;
@ -5395,7 +5395,7 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc,
f_FRk = EXTRACT_LSB0_UINT (insn, 32, 30, 6);
f_GRi = EXTRACT_LSB0_UINT (insn, 32, 17, 6);
f_d12 = EXTRACT_LSB0_INT (insn, 32, 11, 12);
f_d12 = EXTRACT_LSB0_SINT (insn, 32, 11, 12);
/* Record the fields for the semantic handler. */
FLD (f_GRi) = f_GRi;
@ -5426,7 +5426,7 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc,
f_GRk = EXTRACT_LSB0_UINT (insn, 32, 30, 6);
f_GRi = EXTRACT_LSB0_UINT (insn, 32, 17, 6);
f_d12 = EXTRACT_LSB0_INT (insn, 32, 11, 12);
f_d12 = EXTRACT_LSB0_SINT (insn, 32, 11, 12);
/* Record the fields for the semantic handler. */
FLD (f_GRi) = f_GRi;
@ -5456,7 +5456,7 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc,
f_FRk = EXTRACT_LSB0_UINT (insn, 32, 30, 6);
f_GRi = EXTRACT_LSB0_UINT (insn, 32, 17, 6);
f_d12 = EXTRACT_LSB0_INT (insn, 32, 11, 12);
f_d12 = EXTRACT_LSB0_SINT (insn, 32, 11, 12);
/* Record the fields for the semantic handler. */
FLD (f_GRi) = f_GRi;
@ -5486,7 +5486,7 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc,
f_FRk = EXTRACT_LSB0_UINT (insn, 32, 30, 6);
f_GRi = EXTRACT_LSB0_UINT (insn, 32, 17, 6);
f_d12 = EXTRACT_LSB0_INT (insn, 32, 11, 12);
f_d12 = EXTRACT_LSB0_SINT (insn, 32, 11, 12);
/* Record the fields for the semantic handler. */
FLD (f_GRi) = f_GRi;
@ -6647,7 +6647,7 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc,
f_GRk = EXTRACT_LSB0_UINT (insn, 32, 30, 6);
f_GRi = EXTRACT_LSB0_UINT (insn, 32, 17, 6);
f_d12 = EXTRACT_LSB0_INT (insn, 32, 11, 12);
f_d12 = EXTRACT_LSB0_SINT (insn, 32, 11, 12);
/* Record the fields for the semantic handler. */
FLD (f_GRi) = f_GRi;
@ -6678,7 +6678,7 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc,
f_FRk = EXTRACT_LSB0_UINT (insn, 32, 30, 6);
f_GRi = EXTRACT_LSB0_UINT (insn, 32, 17, 6);
f_d12 = EXTRACT_LSB0_INT (insn, 32, 11, 12);
f_d12 = EXTRACT_LSB0_SINT (insn, 32, 11, 12);
/* Record the fields for the semantic handler. */
FLD (f_FRk) = f_FRk;
@ -6709,7 +6709,7 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc,
f_GRk = EXTRACT_LSB0_UINT (insn, 32, 30, 6);
f_GRi = EXTRACT_LSB0_UINT (insn, 32, 17, 6);
f_d12 = EXTRACT_LSB0_INT (insn, 32, 11, 12);
f_d12 = EXTRACT_LSB0_SINT (insn, 32, 11, 12);
/* Record the fields for the semantic handler. */
FLD (f_GRk) = f_GRk;
@ -6740,7 +6740,7 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc,
f_FRk = EXTRACT_LSB0_UINT (insn, 32, 30, 6);
f_GRi = EXTRACT_LSB0_UINT (insn, 32, 17, 6);
f_d12 = EXTRACT_LSB0_INT (insn, 32, 11, 12);
f_d12 = EXTRACT_LSB0_SINT (insn, 32, 11, 12);
/* Record the fields for the semantic handler. */
FLD (f_FRk) = f_FRk;
@ -6804,7 +6804,7 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc,
f_GRk = EXTRACT_LSB0_UINT (insn, 32, 30, 6);
f_GRi = EXTRACT_LSB0_UINT (insn, 32, 17, 6);
f_d12 = EXTRACT_LSB0_INT (insn, 32, 11, 12);
f_d12 = EXTRACT_LSB0_SINT (insn, 32, 11, 12);
/* Record the fields for the semantic handler. */
FLD (f_GRi) = f_GRi;
@ -7270,7 +7270,7 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc,
SI f_label16;
f_hint = EXTRACT_LSB0_UINT (insn, 32, 17, 2);
f_label16 = ((((EXTRACT_LSB0_INT (insn, 32, 15, 16)) << (2))) + (pc));
f_label16 = ((((EXTRACT_LSB0_SINT (insn, 32, 15, 16)) << (2))) + (pc));
/* Record the fields for the semantic handler. */
FLD (f_hint) = f_hint;
@ -7296,7 +7296,7 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc,
SI f_label16;
f_hint = EXTRACT_LSB0_UINT (insn, 32, 17, 2);
f_label16 = ((((EXTRACT_LSB0_INT (insn, 32, 15, 16)) << (2))) + (pc));
f_label16 = ((((EXTRACT_LSB0_SINT (insn, 32, 15, 16)) << (2))) + (pc));
/* Record the fields for the semantic handler. */
FLD (f_hint) = f_hint;
@ -7318,7 +7318,7 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc,
f_ICCi_2 = EXTRACT_LSB0_UINT (insn, 32, 26, 2);
f_hint = EXTRACT_LSB0_UINT (insn, 32, 17, 2);
f_label16 = ((((EXTRACT_LSB0_INT (insn, 32, 15, 16)) << (2))) + (pc));
f_label16 = ((((EXTRACT_LSB0_SINT (insn, 32, 15, 16)) << (2))) + (pc));
/* Record the fields for the semantic handler. */
FLD (f_ICCi_2) = f_ICCi_2;
@ -7348,7 +7348,7 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc,
f_FCCi_2 = EXTRACT_LSB0_UINT (insn, 32, 26, 2);
f_hint = EXTRACT_LSB0_UINT (insn, 32, 17, 2);
f_label16 = ((((EXTRACT_LSB0_INT (insn, 32, 15, 16)) << (2))) + (pc));
f_label16 = ((((EXTRACT_LSB0_SINT (insn, 32, 15, 16)) << (2))) + (pc));
/* Record the fields for the semantic handler. */
FLD (f_FCCi_2) = f_FCCi_2;
@ -7663,7 +7663,7 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc,
f_LI = EXTRACT_LSB0_UINT (insn, 32, 25, 1);
f_GRi = EXTRACT_LSB0_UINT (insn, 32, 17, 6);
f_d12 = EXTRACT_LSB0_INT (insn, 32, 11, 12);
f_d12 = EXTRACT_LSB0_SINT (insn, 32, 11, 12);
/* Record the fields for the semantic handler. */
FLD (f_GRi) = f_GRi;
@ -7691,7 +7691,7 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc,
UINT f_labelL18;
INT f_label24;
f_labelH6 = EXTRACT_LSB0_INT (insn, 32, 30, 6);
f_labelH6 = EXTRACT_LSB0_SINT (insn, 32, 30, 6);
f_labelL18 = EXTRACT_LSB0_UINT (insn, 32, 17, 18);
{
f_label24 = ((((((((f_labelH6) << (18))) | (f_labelL18))) << (2))) + (pc));
@ -7863,7 +7863,7 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc,
INT f_d12;
f_GRi = EXTRACT_LSB0_UINT (insn, 32, 17, 6);
f_d12 = EXTRACT_LSB0_INT (insn, 32, 11, 12);
f_d12 = EXTRACT_LSB0_SINT (insn, 32, 11, 12);
/* Record the fields for the semantic handler. */
FLD (f_GRi) = f_GRi;
@ -7897,7 +7897,7 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc,
f_ICCi_2 = EXTRACT_LSB0_UINT (insn, 32, 26, 2);
f_GRi = EXTRACT_LSB0_UINT (insn, 32, 17, 6);
f_d12 = EXTRACT_LSB0_INT (insn, 32, 11, 12);
f_d12 = EXTRACT_LSB0_SINT (insn, 32, 11, 12);
/* Record the fields for the semantic handler. */
FLD (f_GRi) = f_GRi;
@ -7933,7 +7933,7 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc,
f_FCCi_2 = EXTRACT_LSB0_UINT (insn, 32, 26, 2);
f_GRi = EXTRACT_LSB0_UINT (insn, 32, 17, 6);
f_d12 = EXTRACT_LSB0_INT (insn, 32, 11, 12);
f_d12 = EXTRACT_LSB0_SINT (insn, 32, 11, 12);
/* Record the fields for the semantic handler. */
FLD (f_FCCi_2) = f_FCCi_2;
@ -9571,7 +9571,7 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc,
INT f_u12;
f_FRk = EXTRACT_LSB0_UINT (insn, 32, 30, 6);
f_u12_h = EXTRACT_LSB0_INT (insn, 32, 17, 6);
f_u12_h = EXTRACT_LSB0_SINT (insn, 32, 17, 6);
f_u12_l = EXTRACT_LSB0_UINT (insn, 32, 5, 6);
{
f_u12 = ((((f_u12_h) << (6))) | (f_u12_l));
@ -9604,7 +9604,7 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc,
INT f_u12;
f_FRk = EXTRACT_LSB0_UINT (insn, 32, 30, 6);
f_u12_h = EXTRACT_LSB0_INT (insn, 32, 17, 6);
f_u12_h = EXTRACT_LSB0_SINT (insn, 32, 17, 6);
f_u12_l = EXTRACT_LSB0_UINT (insn, 32, 5, 6);
{
f_u12 = ((((f_u12_h) << (6))) | (f_u12_l));
@ -9637,7 +9637,7 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc,
INT f_u12;
f_FRk = EXTRACT_LSB0_UINT (insn, 32, 30, 6);
f_u12_h = EXTRACT_LSB0_INT (insn, 32, 17, 6);
f_u12_h = EXTRACT_LSB0_SINT (insn, 32, 17, 6);
f_u12_l = EXTRACT_LSB0_UINT (insn, 32, 5, 6);
{
f_u12 = ((((f_u12_h) << (6))) | (f_u12_l));
@ -9671,7 +9671,7 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc,
INT f_s5;
f_FRk = EXTRACT_LSB0_UINT (insn, 32, 30, 6);
f_s5 = EXTRACT_LSB0_INT (insn, 32, 4, 5);
f_s5 = EXTRACT_LSB0_SINT (insn, 32, 4, 5);
/* Record the fields for the semantic handler. */
FLD (f_FRk) = f_FRk;
@ -9699,7 +9699,7 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc,
INT f_s5;
f_FRk = EXTRACT_LSB0_UINT (insn, 32, 30, 6);
f_s5 = EXTRACT_LSB0_INT (insn, 32, 4, 5);
f_s5 = EXTRACT_LSB0_SINT (insn, 32, 4, 5);
/* Record the fields for the semantic handler. */
FLD (f_FRk) = f_FRk;
@ -9727,7 +9727,7 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc,
INT f_s5;
f_FRk = EXTRACT_LSB0_UINT (insn, 32, 30, 6);
f_s5 = EXTRACT_LSB0_INT (insn, 32, 4, 5);
f_s5 = EXTRACT_LSB0_SINT (insn, 32, 4, 5);
/* Record the fields for the semantic handler. */
FLD (f_FRk) = f_FRk;
@ -10023,7 +10023,7 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc,
f_FRk = EXTRACT_LSB0_UINT (insn, 32, 30, 6);
f_ACC40Si = EXTRACT_LSB0_UINT (insn, 32, 17, 6);
f_s6 = EXTRACT_LSB0_INT (insn, 32, 5, 6);
f_s6 = EXTRACT_LSB0_SINT (insn, 32, 5, 6);
/* Record the fields for the semantic handler. */
FLD (f_ACC40Si) = f_ACC40Si;
@ -10054,7 +10054,7 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc,
f_FRk = EXTRACT_LSB0_UINT (insn, 32, 30, 6);
f_ACC40Si = EXTRACT_LSB0_UINT (insn, 32, 17, 6);
f_s6 = EXTRACT_LSB0_INT (insn, 32, 5, 6);
f_s6 = EXTRACT_LSB0_SINT (insn, 32, 5, 6);
/* Record the fields for the semantic handler. */
FLD (f_ACC40Si) = f_ACC40Si;
@ -10124,7 +10124,7 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc,
f_FRk = EXTRACT_LSB0_UINT (insn, 32, 30, 6);
f_FRi = EXTRACT_LSB0_UINT (insn, 32, 17, 6);
f_s6 = EXTRACT_LSB0_INT (insn, 32, 5, 6);
f_s6 = EXTRACT_LSB0_SINT (insn, 32, 5, 6);
/* Record the fields for the semantic handler. */
FLD (f_FRi) = f_FRi;

8
sim/iq2000/cpu.h
View File

@ -278,7 +278,7 @@ struct scache {
f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
f_rs = EXTRACT_LSB0_UINT (insn, 32, 25, 5); \
f_rt = EXTRACT_LSB0_UINT (insn, 32, 20, 5); \
f_offset = ((((EXTRACT_LSB0_INT (insn, 32, 15, 16)) << (2))) + (((pc) + (4)))); \
f_offset = ((((EXTRACT_LSB0_SINT (insn, 32, 15, 16)) << (2))) + (((pc) + (4)))); \
#define EXTRACT_IFMT_BBV_VARS \
UINT f_opcode; \
@ -291,7 +291,7 @@ struct scache {
f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
f_rs = EXTRACT_LSB0_UINT (insn, 32, 25, 5); \
f_rt = EXTRACT_LSB0_UINT (insn, 32, 20, 5); \
f_offset = ((((EXTRACT_LSB0_INT (insn, 32, 15, 16)) << (2))) + (((pc) + (4)))); \
f_offset = ((((EXTRACT_LSB0_SINT (insn, 32, 15, 16)) << (2))) + (((pc) + (4)))); \
#define EXTRACT_IFMT_BGEZ_VARS \
UINT f_opcode; \
@ -304,7 +304,7 @@ struct scache {
f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
f_rs = EXTRACT_LSB0_UINT (insn, 32, 25, 5); \
f_rt = EXTRACT_LSB0_UINT (insn, 32, 20, 5); \
f_offset = ((((EXTRACT_LSB0_INT (insn, 32, 15, 16)) << (2))) + (((pc) + (4)))); \
f_offset = ((((EXTRACT_LSB0_SINT (insn, 32, 15, 16)) << (2))) + (((pc) + (4)))); \
#define EXTRACT_IFMT_JALR_VARS \
UINT f_opcode; \
@ -437,7 +437,7 @@ struct scache {
f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
f_rs = EXTRACT_LSB0_UINT (insn, 32, 25, 5); \
f_rt = EXTRACT_LSB0_UINT (insn, 32, 20, 5); \
f_offset = ((((EXTRACT_LSB0_INT (insn, 32, 15, 16)) << (2))) + (((pc) + (4)))); \
f_offset = ((((EXTRACT_LSB0_SINT (insn, 32, 15, 16)) << (2))) + (((pc) + (4)))); \
#define EXTRACT_IFMT_CFC0_VARS \
UINT f_opcode; \

8
sim/iq2000/decode.c
View File

@ -1070,7 +1070,7 @@ iq2000bf_decode (SIM_CPU *current_cpu, IADDR pc,
f_rs = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
f_rt = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
f_offset = ((((EXTRACT_LSB0_INT (insn, 32, 15, 16)) << (2))) + (((pc) + (4))));
f_offset = ((((EXTRACT_LSB0_SINT (insn, 32, 15, 16)) << (2))) + (((pc) + (4))));
/* Record the fields for the semantic handler. */
FLD (f_rt) = f_rt;
@ -1099,7 +1099,7 @@ iq2000bf_decode (SIM_CPU *current_cpu, IADDR pc,
f_rs = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
f_rt = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
f_offset = ((((EXTRACT_LSB0_INT (insn, 32, 15, 16)) << (2))) + (((pc) + (4))));
f_offset = ((((EXTRACT_LSB0_SINT (insn, 32, 15, 16)) << (2))) + (((pc) + (4))));
/* Record the fields for the semantic handler. */
FLD (f_rs) = f_rs;
@ -1126,7 +1126,7 @@ iq2000bf_decode (SIM_CPU *current_cpu, IADDR pc,
SI f_offset;
f_rs = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
f_offset = ((((EXTRACT_LSB0_INT (insn, 32, 15, 16)) << (2))) + (((pc) + (4))));
f_offset = ((((EXTRACT_LSB0_SINT (insn, 32, 15, 16)) << (2))) + (((pc) + (4))));
/* Record the fields for the semantic handler. */
FLD (f_rs) = f_rs;
@ -1152,7 +1152,7 @@ iq2000bf_decode (SIM_CPU *current_cpu, IADDR pc,
SI f_offset;
f_rs = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
f_offset = ((((EXTRACT_LSB0_INT (insn, 32, 15, 16)) << (2))) + (((pc) + (4))));
f_offset = ((((EXTRACT_LSB0_SINT (insn, 32, 15, 16)) << (2))) + (((pc) + (4))));
/* Record the fields for the semantic handler. */
FLD (f_rs) = f_rs;

6
sim/lm32/cpu.h
View File

@ -198,7 +198,7 @@ struct scache {
f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
f_r0 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); \
f_r1 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); \
f_imm = EXTRACT_LSB0_INT (insn, 32, 15, 16); \
f_imm = EXTRACT_LSB0_SINT (insn, 32, 15, 16); \
#define EXTRACT_IFMT_ANDI_VARS \
UINT f_opcode; \
@ -248,7 +248,7 @@ struct scache {
#define EXTRACT_IFMT_BI_CODE \
length = 4; \
f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
f_call = ((pc) + (((int) (((EXTRACT_LSB0_INT (insn, 32, 25, 26)) << (6))) >> (4)))); \
f_call = ((pc) + (((int) (((EXTRACT_LSB0_SINT (insn, 32, 25, 26)) << (6))) >> (4)))); \
#define EXTRACT_IFMT_BE_VARS \
UINT f_opcode; \
@ -261,7 +261,7 @@ struct scache {
f_opcode = EXTRACT_LSB0_UINT (insn, 32, 31, 6); \
f_r0 = EXTRACT_LSB0_UINT (insn, 32, 25, 5); \
f_r1 = EXTRACT_LSB0_UINT (insn, 32, 20, 5); \
f_branch = ((pc) + (((int) (((EXTRACT_LSB0_INT (insn, 32, 15, 16)) << (16))) >> (14)))); \
f_branch = ((pc) + (((int) (((EXTRACT_LSB0_SINT (insn, 32, 15, 16)) << (16))) >> (14)))); \
#define EXTRACT_IFMT_ORI_VARS \
UINT f_opcode; \

20
sim/lm32/decode.c
View File

@ -392,7 +392,7 @@ lm32bf_decode (SIM_CPU *current_cpu, IADDR pc,
f_r0 = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
f_r1 = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
f_imm = EXTRACT_LSB0_INT (insn, 32, 15, 16);
f_imm = EXTRACT_LSB0_SINT (insn, 32, 15, 16);
/* Record the fields for the semantic handler. */
FLD (f_imm) = f_imm;
@ -474,7 +474,7 @@ lm32bf_decode (SIM_CPU *current_cpu, IADDR pc,
#define FLD(f) abuf->fields.sfmt_bi.f
SI f_call;
f_call = ((pc) + (((int) (((EXTRACT_LSB0_INT (insn, 32, 25, 26)) << (6))) >> (4))));
f_call = ((pc) + (((int) (((EXTRACT_LSB0_SINT (insn, 32, 25, 26)) << (6))) >> (4))));
/* Record the fields for the semantic handler. */
FLD (i_call) = f_call;
@ -495,7 +495,7 @@ lm32bf_decode (SIM_CPU *current_cpu, IADDR pc,
f_r0 = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
f_r1 = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
f_branch = ((pc) + (((int) (((EXTRACT_LSB0_INT (insn, 32, 15, 16)) << (16))) >> (14))));
f_branch = ((pc) + (((int) (((EXTRACT_LSB0_SINT (insn, 32, 15, 16)) << (16))) >> (14))));
/* Record the fields for the semantic handler. */
FLD (f_r0) = f_r0;
@ -531,7 +531,7 @@ lm32bf_decode (SIM_CPU *current_cpu, IADDR pc,
#define FLD(f) abuf->fields.sfmt_bi.f
SI f_call;
f_call = ((pc) + (((int) (((EXTRACT_LSB0_INT (insn, 32, 25, 26)) << (6))) >> (4))));
f_call = ((pc) + (((int) (((EXTRACT_LSB0_SINT (insn, 32, 25, 26)) << (6))) >> (4))));
/* Record the fields for the semantic handler. */
FLD (i_call) = f_call;
@ -575,7 +575,7 @@ lm32bf_decode (SIM_CPU *current_cpu, IADDR pc,
f_r0 = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
f_r1 = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
f_imm = EXTRACT_LSB0_INT (insn, 32, 15, 16);
f_imm = EXTRACT_LSB0_SINT (insn, 32, 15, 16);
/* Record the fields for the semantic handler. */
FLD (f_imm) = f_imm;
@ -598,7 +598,7 @@ lm32bf_decode (SIM_CPU *current_cpu, IADDR pc,
f_r0 = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
f_r1 = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
f_imm = EXTRACT_LSB0_INT (insn, 32, 15, 16);
f_imm = EXTRACT_LSB0_SINT (insn, 32, 15, 16);
/* Record the fields for the semantic handler. */
FLD (f_imm) = f_imm;
@ -621,7 +621,7 @@ lm32bf_decode (SIM_CPU *current_cpu, IADDR pc,
f_r0 = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
f_r1 = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
f_imm = EXTRACT_LSB0_INT (insn, 32, 15, 16);
f_imm = EXTRACT_LSB0_SINT (insn, 32, 15, 16);
/* Record the fields for the semantic handler. */
FLD (f_imm) = f_imm;
@ -687,7 +687,7 @@ lm32bf_decode (SIM_CPU *current_cpu, IADDR pc,
f_r0 = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
f_r1 = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
f_imm = EXTRACT_LSB0_INT (insn, 32, 15, 16);
f_imm = EXTRACT_LSB0_SINT (insn, 32, 15, 16);
/* Record the fields for the semantic handler. */
FLD (f_imm) = f_imm;
@ -730,7 +730,7 @@ lm32bf_decode (SIM_CPU *current_cpu, IADDR pc,
f_r0 = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
f_r1 = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
f_imm = EXTRACT_LSB0_INT (insn, 32, 15, 16);
f_imm = EXTRACT_LSB0_SINT (insn, 32, 15, 16);
/* Record the fields for the semantic handler. */
FLD (f_imm) = f_imm;
@ -753,7 +753,7 @@ lm32bf_decode (SIM_CPU *current_cpu, IADDR pc,
f_r0 = EXTRACT_LSB0_UINT (insn, 32, 25, 5);
f_r1 = EXTRACT_LSB0_UINT (insn, 32, 20, 5);
f_imm = EXTRACT_LSB0_INT (insn, 32, 15, 16);
f_imm = EXTRACT_LSB0_SINT (insn, 32, 15, 16);
/* Record the fields for the semantic handler. */
FLD (f_imm) = f_imm;

24
sim/m32r/cpu.h
View File

@ -331,7 +331,7 @@ struct scache {
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \
f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \
f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); \
f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16); \
#define EXTRACT_IFMT_AND3_VARS \
UINT f_op1; \
@ -372,7 +372,7 @@ struct scache {
length = 2; \
f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
f_simm8 = EXTRACT_MSB0_INT (insn, 16, 8, 8); \
f_simm8 = EXTRACT_MSB0_SINT (insn, 16, 8, 8); \
#define EXTRACT_IFMT_ADDV3_VARS \
UINT f_op1; \
@ -387,7 +387,7 @@ struct scache {
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \
f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \
f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); \
f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16); \
#define EXTRACT_IFMT_BC8_VARS \
UINT f_op1; \
@ -398,7 +398,7 @@ struct scache {
length = 2; \
f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
f_disp8 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4)))); \
f_disp8 = ((((EXTRACT_MSB0_SINT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4)))); \
#define EXTRACT_IFMT_BC24_VARS \
UINT f_op1; \
@ -409,7 +409,7 @@ struct scache {
length = 4; \
f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \
f_disp24 = ((((EXTRACT_MSB0_INT (insn, 32, 8, 24)) << (2))) + (pc)); \
f_disp24 = ((((EXTRACT_MSB0_SINT (insn, 32, 8, 24)) << (2))) + (pc)); \
#define EXTRACT_IFMT_BEQ_VARS \
UINT f_op1; \
@ -424,7 +424,7 @@ struct scache {
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \
f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \
f_disp16 = ((((EXTRACT_MSB0_INT (insn, 32, 16, 16)) << (2))) + (pc)); \
f_disp16 = ((((EXTRACT_MSB0_SINT (insn, 32, 16, 16)) << (2))) + (pc)); \
#define EXTRACT_IFMT_BEQZ_VARS \
UINT f_op1; \
@ -439,7 +439,7 @@ struct scache {
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \
f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \
f_disp16 = ((((EXTRACT_MSB0_INT (insn, 32, 16, 16)) << (2))) + (pc)); \
f_disp16 = ((((EXTRACT_MSB0_SINT (insn, 32, 16, 16)) << (2))) + (pc)); \
#define EXTRACT_IFMT_CMP_VARS \
UINT f_op1; \
@ -467,7 +467,7 @@ struct scache {
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \
f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \
f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); \
f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16); \
#define EXTRACT_IFMT_DIV_VARS \
UINT f_op1; \
@ -482,7 +482,7 @@ struct scache {
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \
f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \
f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); \
f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16); \
#define EXTRACT_IFMT_JL_VARS \
UINT f_op1; \
@ -521,7 +521,7 @@ struct scache {
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \
f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \
f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); \
f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16); \
#define EXTRACT_IFMT_MVFACHI_VARS \
UINT f_op1; \
@ -629,7 +629,7 @@ struct scache {
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \
f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \
f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); \
f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16); \
#define EXTRACT_IFMT_TRAP_VARS \
UINT f_op1; \
@ -670,7 +670,7 @@ struct scache {
f_uimm3 = EXTRACT_MSB0_UINT (insn, 32, 5, 3); \
f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \
f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); \
f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16); \
#define EXTRACT_IFMT_BTST_VARS \
UINT f_op1; \

24
sim/m32r/cpu2.h
View File

@ -362,7 +362,7 @@ struct scache {
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \
f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \
f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); \
f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16); \
#define EXTRACT_IFMT_AND3_VARS \
UINT f_op1; \
@ -403,7 +403,7 @@ struct scache {
length = 2; \
f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
f_simm8 = EXTRACT_MSB0_INT (insn, 16, 8, 8); \
f_simm8 = EXTRACT_MSB0_SINT (insn, 16, 8, 8); \
#define EXTRACT_IFMT_ADDV3_VARS \
UINT f_op1; \
@ -418,7 +418,7 @@ struct scache {
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \
f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \
f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); \
f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16); \
#define EXTRACT_IFMT_BC8_VARS \
UINT f_op1; \
@ -429,7 +429,7 @@ struct scache {
length = 2; \
f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
f_disp8 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4)))); \
f_disp8 = ((((EXTRACT_MSB0_SINT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4)))); \
#define EXTRACT_IFMT_BC24_VARS \
UINT f_op1; \
@ -440,7 +440,7 @@ struct scache {
length = 4; \
f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \
f_disp24 = ((((EXTRACT_MSB0_INT (insn, 32, 8, 24)) << (2))) + (pc)); \
f_disp24 = ((((EXTRACT_MSB0_SINT (insn, 32, 8, 24)) << (2))) + (pc)); \
#define EXTRACT_IFMT_BEQ_VARS \
UINT f_op1; \
@ -455,7 +455,7 @@ struct scache {
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \
f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \
f_disp16 = ((((EXTRACT_MSB0_INT (insn, 32, 16, 16)) << (2))) + (pc)); \
f_disp16 = ((((EXTRACT_MSB0_SINT (insn, 32, 16, 16)) << (2))) + (pc)); \
#define EXTRACT_IFMT_BEQZ_VARS \
UINT f_op1; \
@ -470,7 +470,7 @@ struct scache {
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \
f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \
f_disp16 = ((((EXTRACT_MSB0_INT (insn, 32, 16, 16)) << (2))) + (pc)); \
f_disp16 = ((((EXTRACT_MSB0_SINT (insn, 32, 16, 16)) << (2))) + (pc)); \
#define EXTRACT_IFMT_CMP_VARS \
UINT f_op1; \
@ -498,7 +498,7 @@ struct scache {
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \
f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \
f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); \
f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16); \
#define EXTRACT_IFMT_CMPZ_VARS \
UINT f_op1; \
@ -526,7 +526,7 @@ struct scache {
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \
f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \
f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); \
f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16); \
#define EXTRACT_IFMT_JC_VARS \
UINT f_op1; \
@ -565,7 +565,7 @@ struct scache {
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \
f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \
f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); \
f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16); \
#define EXTRACT_IFMT_MACHI_A_VARS \
UINT f_op1; \
@ -711,7 +711,7 @@ struct scache {
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \
f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \
f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); \
f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16); \
#define EXTRACT_IFMT_TRAP_VARS \
UINT f_op1; \
@ -767,7 +767,7 @@ struct scache {
f_uimm3 = EXTRACT_MSB0_UINT (insn, 32, 5, 3); \
f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \
f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); \
f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16); \
#define EXTRACT_IFMT_BTST_VARS \
UINT f_op1; \

24
sim/m32r/cpux.h
View File

@ -362,7 +362,7 @@ struct scache {
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \
f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \
f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); \
f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16); \
#define EXTRACT_IFMT_AND3_VARS \
UINT f_op1; \
@ -403,7 +403,7 @@ struct scache {
length = 2; \
f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
f_simm8 = EXTRACT_MSB0_INT (insn, 16, 8, 8); \
f_simm8 = EXTRACT_MSB0_SINT (insn, 16, 8, 8); \
#define EXTRACT_IFMT_ADDV3_VARS \
UINT f_op1; \
@ -418,7 +418,7 @@ struct scache {
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \
f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \
f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); \
f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16); \
#define EXTRACT_IFMT_BC8_VARS \
UINT f_op1; \
@ -429,7 +429,7 @@ struct scache {
length = 2; \
f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
f_disp8 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4)))); \
f_disp8 = ((((EXTRACT_MSB0_SINT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4)))); \
#define EXTRACT_IFMT_BC24_VARS \
UINT f_op1; \
@ -440,7 +440,7 @@ struct scache {
length = 4; \
f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \
f_disp24 = ((((EXTRACT_MSB0_INT (insn, 32, 8, 24)) << (2))) + (pc)); \
f_disp24 = ((((EXTRACT_MSB0_SINT (insn, 32, 8, 24)) << (2))) + (pc)); \
#define EXTRACT_IFMT_BEQ_VARS \
UINT f_op1; \
@ -455,7 +455,7 @@ struct scache {
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \
f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \
f_disp16 = ((((EXTRACT_MSB0_INT (insn, 32, 16, 16)) << (2))) + (pc)); \
f_disp16 = ((((EXTRACT_MSB0_SINT (insn, 32, 16, 16)) << (2))) + (pc)); \
#define EXTRACT_IFMT_BEQZ_VARS \
UINT f_op1; \
@ -470,7 +470,7 @@ struct scache {
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \
f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \
f_disp16 = ((((EXTRACT_MSB0_INT (insn, 32, 16, 16)) << (2))) + (pc)); \
f_disp16 = ((((EXTRACT_MSB0_SINT (insn, 32, 16, 16)) << (2))) + (pc)); \
#define EXTRACT_IFMT_CMP_VARS \
UINT f_op1; \
@ -498,7 +498,7 @@ struct scache {
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \
f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \
f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); \
f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16); \
#define EXTRACT_IFMT_CMPZ_VARS \
UINT f_op1; \
@ -526,7 +526,7 @@ struct scache {
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \
f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \
f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); \
f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16); \
#define EXTRACT_IFMT_JC_VARS \
UINT f_op1; \
@ -565,7 +565,7 @@ struct scache {
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \
f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \
f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); \
f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16); \
#define EXTRACT_IFMT_MACHI_A_VARS \
UINT f_op1; \
@ -711,7 +711,7 @@ struct scache {
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \
f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \
f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); \
f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16); \
#define EXTRACT_IFMT_TRAP_VARS \
UINT f_op1; \
@ -767,7 +767,7 @@ struct scache {
f_uimm3 = EXTRACT_MSB0_UINT (insn, 32, 5, 3); \
f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \
f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); \
f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16); \
#define EXTRACT_IFMT_BTST_VARS \
UINT f_op1; \

44
sim/m32r/decode.c
View File

@ -625,7 +625,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16);
/* Record the fields for the semantic handler. */
FLD (f_simm16) = f_simm16;
@ -722,7 +722,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
INT f_simm8;
f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
f_simm8 = EXTRACT_MSB0_INT (insn, 16, 8, 8);
f_simm8 = EXTRACT_MSB0_SINT (insn, 16, 8, 8);
/* Record the fields for the semantic handler. */
FLD (f_r1) = f_r1;
@ -784,7 +784,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16);
/* Record the fields for the semantic handler. */
FLD (f_simm16) = f_simm16;
@ -844,7 +844,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
#define FLD(f) abuf->fields.sfmt_bl8.f
SI f_disp8;
f_disp8 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4))));
f_disp8 = ((((EXTRACT_MSB0_SINT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4))));
/* Record the fields for the semantic handler. */
FLD (i_disp8) = f_disp8;
@ -867,7 +867,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
#define FLD(f) abuf->fields.sfmt_bl24.f
SI f_disp24;
f_disp24 = ((((EXTRACT_MSB0_INT (insn, 32, 8, 24)) << (2))) + (pc));
f_disp24 = ((((EXTRACT_MSB0_SINT (insn, 32, 8, 24)) << (2))) + (pc));
/* Record the fields for the semantic handler. */
FLD (i_disp24) = f_disp24;
@ -894,7 +894,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
f_disp16 = ((((EXTRACT_MSB0_INT (insn, 32, 16, 16)) << (2))) + (pc));
f_disp16 = ((((EXTRACT_MSB0_SINT (insn, 32, 16, 16)) << (2))) + (pc));
/* Record the fields for the semantic handler. */
FLD (f_r1) = f_r1;
@ -925,7 +925,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
SI f_disp16;
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
f_disp16 = ((((EXTRACT_MSB0_INT (insn, 32, 16, 16)) << (2))) + (pc));
f_disp16 = ((((EXTRACT_MSB0_SINT (insn, 32, 16, 16)) << (2))) + (pc));
/* Record the fields for the semantic handler. */
FLD (f_r2) = f_r2;
@ -951,7 +951,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
#define FLD(f) abuf->fields.sfmt_bl8.f
SI f_disp8;
f_disp8 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4))));
f_disp8 = ((((EXTRACT_MSB0_SINT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4))));
/* Record the fields for the semantic handler. */
FLD (i_disp8) = f_disp8;
@ -975,7 +975,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
#define FLD(f) abuf->fields.sfmt_bl24.f
SI f_disp24;
f_disp24 = ((((EXTRACT_MSB0_INT (insn, 32, 8, 24)) << (2))) + (pc));
f_disp24 = ((((EXTRACT_MSB0_SINT (insn, 32, 8, 24)) << (2))) + (pc));
/* Record the fields for the semantic handler. */
FLD (i_disp24) = f_disp24;
@ -999,7 +999,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
#define FLD(f) abuf->fields.sfmt_bl8.f
SI f_disp8;
f_disp8 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4))));
f_disp8 = ((((EXTRACT_MSB0_SINT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4))));
/* Record the fields for the semantic handler. */
FLD (i_disp8) = f_disp8;
@ -1022,7 +1022,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
#define FLD(f) abuf->fields.sfmt_bl24.f
SI f_disp24;
f_disp24 = ((((EXTRACT_MSB0_INT (insn, 32, 8, 24)) << (2))) + (pc));
f_disp24 = ((((EXTRACT_MSB0_SINT (insn, 32, 8, 24)) << (2))) + (pc));
/* Record the fields for the semantic handler. */
FLD (i_disp24) = f_disp24;
@ -1077,7 +1077,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
INT f_simm16;
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16);
/* Record the fields for the semantic handler. */
FLD (f_simm16) = f_simm16;
@ -1219,7 +1219,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16);
/* Record the fields for the semantic handler. */
FLD (f_simm16) = f_simm16;
@ -1282,7 +1282,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16);
/* Record the fields for the semantic handler. */
FLD (f_simm16) = f_simm16;
@ -1345,7 +1345,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16);
/* Record the fields for the semantic handler. */
FLD (f_simm16) = f_simm16;
@ -1435,7 +1435,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
INT f_simm8;
f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
f_simm8 = EXTRACT_MSB0_INT (insn, 16, 8, 8);
f_simm8 = EXTRACT_MSB0_SINT (insn, 16, 8, 8);
/* Record the fields for the semantic handler. */
FLD (f_simm8) = f_simm8;
@ -1463,7 +1463,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
INT f_simm16;
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16);
/* Record the fields for the semantic handler. */
FLD (f_simm16) = f_simm16;
@ -1792,7 +1792,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16);
/* Record the fields for the semantic handler. */
FLD (f_simm16) = f_simm16;
@ -1884,7 +1884,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16);
/* Record the fields for the semantic handler. */
FLD (f_simm16) = f_simm16;
@ -1947,7 +1947,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16);
/* Record the fields for the semantic handler. */
FLD (f_simm16) = f_simm16;
@ -2010,7 +2010,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16);
/* Record the fields for the semantic handler. */
FLD (f_simm16) = f_simm16;
@ -2161,7 +2161,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
f_uimm3 = EXTRACT_MSB0_UINT (insn, 32, 5, 3);
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16);
/* Record the fields for the semantic handler. */
FLD (f_simm16) = f_simm16;

48
sim/m32r/decode2.c
View File

@ -814,7 +814,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc,
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16);
/* Record the fields for the semantic handler. */
FLD (f_simm16) = f_simm16;
@ -911,7 +911,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc,
INT f_simm8;
f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
f_simm8 = EXTRACT_MSB0_INT (insn, 16, 8, 8);
f_simm8 = EXTRACT_MSB0_SINT (insn, 16, 8, 8);
/* Record the fields for the semantic handler. */
FLD (f_r1) = f_r1;
@ -973,7 +973,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc,
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16);
/* Record the fields for the semantic handler. */
FLD (f_simm16) = f_simm16;
@ -1033,7 +1033,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc,
#define FLD(f) abuf->fields.sfmt_bl8.f
SI f_disp8;
f_disp8 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4))));
f_disp8 = ((((EXTRACT_MSB0_SINT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4))));
/* Record the fields for the semantic handler. */
FLD (i_disp8) = f_disp8;
@ -1056,7 +1056,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc,
#define FLD(f) abuf->fields.sfmt_bl24.f
SI f_disp24;
f_disp24 = ((((EXTRACT_MSB0_INT (insn, 32, 8, 24)) << (2))) + (pc));
f_disp24 = ((((EXTRACT_MSB0_SINT (insn, 32, 8, 24)) << (2))) + (pc));
/* Record the fields for the semantic handler. */
FLD (i_disp24) = f_disp24;
@ -1083,7 +1083,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc,
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
f_disp16 = ((((EXTRACT_MSB0_INT (insn, 32, 16, 16)) << (2))) + (pc));
f_disp16 = ((((EXTRACT_MSB0_SINT (insn, 32, 16, 16)) << (2))) + (pc));
/* Record the fields for the semantic handler. */
FLD (f_r1) = f_r1;
@ -1114,7 +1114,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc,
SI f_disp16;
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
f_disp16 = ((((EXTRACT_MSB0_INT (insn, 32, 16, 16)) << (2))) + (pc));
f_disp16 = ((((EXTRACT_MSB0_SINT (insn, 32, 16, 16)) << (2))) + (pc));
/* Record the fields for the semantic handler. */
FLD (f_r2) = f_r2;
@ -1140,7 +1140,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc,
#define FLD(f) abuf->fields.sfmt_bl8.f
SI f_disp8;
f_disp8 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4))));
f_disp8 = ((((EXTRACT_MSB0_SINT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4))));
/* Record the fields for the semantic handler. */
FLD (i_disp8) = f_disp8;
@ -1164,7 +1164,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc,
#define FLD(f) abuf->fields.sfmt_bl24.f
SI f_disp24;
f_disp24 = ((((EXTRACT_MSB0_INT (insn, 32, 8, 24)) << (2))) + (pc));
f_disp24 = ((((EXTRACT_MSB0_SINT (insn, 32, 8, 24)) << (2))) + (pc));
/* Record the fields for the semantic handler. */
FLD (i_disp24) = f_disp24;
@ -1188,7 +1188,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc,
#define FLD(f) abuf->fields.sfmt_bl8.f
SI f_disp8;
f_disp8 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4))));
f_disp8 = ((((EXTRACT_MSB0_SINT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4))));
/* Record the fields for the semantic handler. */
FLD (i_disp8) = f_disp8;
@ -1212,7 +1212,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc,
#define FLD(f) abuf->fields.sfmt_bl24.f
SI f_disp24;
f_disp24 = ((((EXTRACT_MSB0_INT (insn, 32, 8, 24)) << (2))) + (pc));
f_disp24 = ((((EXTRACT_MSB0_SINT (insn, 32, 8, 24)) << (2))) + (pc));
/* Record the fields for the semantic handler. */
FLD (i_disp24) = f_disp24;
@ -1236,7 +1236,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc,
#define FLD(f) abuf->fields.sfmt_bl8.f
SI f_disp8;
f_disp8 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4))));
f_disp8 = ((((EXTRACT_MSB0_SINT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4))));
/* Record the fields for the semantic handler. */
FLD (i_disp8) = f_disp8;
@ -1259,7 +1259,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc,
#define FLD(f) abuf->fields.sfmt_bl24.f
SI f_disp24;
f_disp24 = ((((EXTRACT_MSB0_INT (insn, 32, 8, 24)) << (2))) + (pc));
f_disp24 = ((((EXTRACT_MSB0_SINT (insn, 32, 8, 24)) << (2))) + (pc));
/* Record the fields for the semantic handler. */
FLD (i_disp24) = f_disp24;
@ -1314,7 +1314,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc,
INT f_simm16;
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16);
/* Record the fields for the semantic handler. */
FLD (f_simm16) = f_simm16;
@ -1506,7 +1506,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc,
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16);
/* Record the fields for the semantic handler. */
FLD (f_simm16) = f_simm16;
@ -1569,7 +1569,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc,
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16);
/* Record the fields for the semantic handler. */
FLD (f_simm16) = f_simm16;
@ -1632,7 +1632,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc,
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16);
/* Record the fields for the semantic handler. */
FLD (f_simm16) = f_simm16;
@ -1722,7 +1722,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc,
INT f_simm8;
f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
f_simm8 = EXTRACT_MSB0_INT (insn, 16, 8, 8);
f_simm8 = EXTRACT_MSB0_SINT (insn, 16, 8, 8);
/* Record the fields for the semantic handler. */
FLD (f_simm8) = f_simm8;
@ -1750,7 +1750,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc,
INT f_simm16;
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16);
/* Record the fields for the semantic handler. */
FLD (f_simm16) = f_simm16;
@ -2101,7 +2101,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc,
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16);
/* Record the fields for the semantic handler. */
FLD (f_simm16) = f_simm16;
@ -2193,7 +2193,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc,
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16);
/* Record the fields for the semantic handler. */
FLD (f_simm16) = f_simm16;
@ -2256,7 +2256,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc,
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16);
/* Record the fields for the semantic handler. */
FLD (f_simm16) = f_simm16;
@ -2319,7 +2319,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc,
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16);
/* Record the fields for the semantic handler. */
FLD (f_simm16) = f_simm16;
@ -2708,7 +2708,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc,
f_uimm3 = EXTRACT_MSB0_UINT (insn, 32, 5, 3);
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16);
/* Record the fields for the semantic handler. */
FLD (f_simm16) = f_simm16;

48
sim/m32r/decodex.c
View File

@ -755,7 +755,7 @@ m32rxf_decode (SIM_CPU *current_cpu, IADDR pc,
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16);
/* Record the fields for the semantic handler. */
FLD (f_simm16) = f_simm16;
@ -852,7 +852,7 @@ m32rxf_decode (SIM_CPU *current_cpu, IADDR pc,
INT f_simm8;
f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
f_simm8 = EXTRACT_MSB0_INT (insn, 16, 8, 8);
f_simm8 = EXTRACT_MSB0_SINT (insn, 16, 8, 8);
/* Record the fields for the semantic handler. */
FLD (f_r1) = f_r1;
@ -914,7 +914,7 @@ m32rxf_decode (SIM_CPU *current_cpu, IADDR pc,
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16);
/* Record the fields for the semantic handler. */
FLD (f_simm16) = f_simm16;
@ -974,7 +974,7 @@ m32rxf_decode (SIM_CPU *current_cpu, IADDR pc,
#define FLD(f) abuf->fields.sfmt_bl8.f
SI f_disp8;
f_disp8 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4))));
f_disp8 = ((((EXTRACT_MSB0_SINT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4))));
/* Record the fields for the semantic handler. */
FLD (i_disp8) = f_disp8;
@ -997,7 +997,7 @@ m32rxf_decode (SIM_CPU *current_cpu, IADDR pc,
#define FLD(f) abuf->fields.sfmt_bl24.f
SI f_disp24;
f_disp24 = ((((EXTRACT_MSB0_INT (insn, 32, 8, 24)) << (2))) + (pc));
f_disp24 = ((((EXTRACT_MSB0_SINT (insn, 32, 8, 24)) << (2))) + (pc));
/* Record the fields for the semantic handler. */
FLD (i_disp24) = f_disp24;
@ -1024,7 +1024,7 @@ m32rxf_decode (SIM_CPU *current_cpu, IADDR pc,
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
f_disp16 = ((((EXTRACT_MSB0_INT (insn, 32, 16, 16)) << (2))) + (pc));
f_disp16 = ((((EXTRACT_MSB0_SINT (insn, 32, 16, 16)) << (2))) + (pc));
/* Record the fields for the semantic handler. */
FLD (f_r1) = f_r1;
@ -1055,7 +1055,7 @@ m32rxf_decode (SIM_CPU *current_cpu, IADDR pc,
SI f_disp16;
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
f_disp16 = ((((EXTRACT_MSB0_INT (insn, 32, 16, 16)) << (2))) + (pc));
f_disp16 = ((((EXTRACT_MSB0_SINT (insn, 32, 16, 16)) << (2))) + (pc));
/* Record the fields for the semantic handler. */
FLD (f_r2) = f_r2;
@ -1081,7 +1081,7 @@ m32rxf_decode (SIM_CPU *current_cpu, IADDR pc,
#define FLD(f) abuf->fields.sfmt_bl8.f
SI f_disp8;
f_disp8 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4))));
f_disp8 = ((((EXTRACT_MSB0_SINT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4))));
/* Record the fields for the semantic handler. */
FLD (i_disp8) = f_disp8;
@ -1105,7 +1105,7 @@ m32rxf_decode (SIM_CPU *current_cpu, IADDR pc,
#define FLD(f) abuf->fields.sfmt_bl24.f
SI f_disp24;
f_disp24 = ((((EXTRACT_MSB0_INT (insn, 32, 8, 24)) << (2))) + (pc));
f_disp24 = ((((EXTRACT_MSB0_SINT (insn, 32, 8, 24)) << (2))) + (pc));
/* Record the fields for the semantic handler. */
FLD (i_disp24) = f_disp24;
@ -1129,7 +1129,7 @@ m32rxf_decode (SIM_CPU *current_cpu, IADDR pc,
#define FLD(f) abuf->fields.sfmt_bl8.f
SI f_disp8;
f_disp8 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4))));
f_disp8 = ((((EXTRACT_MSB0_SINT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4))));
/* Record the fields for the semantic handler. */
FLD (i_disp8) = f_disp8;
@ -1153,7 +1153,7 @@ m32rxf_decode (SIM_CPU *current_cpu, IADDR pc,
#define FLD(f) abuf->fields.sfmt_bl24.f
SI f_disp24;
f_disp24 = ((((EXTRACT_MSB0_INT (insn, 32, 8, 24)) << (2))) + (pc));
f_disp24 = ((((EXTRACT_MSB0_SINT (insn, 32, 8, 24)) << (2))) + (pc));
/* Record the fields for the semantic handler. */
FLD (i_disp24) = f_disp24;
@ -1177,7 +1177,7 @@ m32rxf_decode (SIM_CPU *current_cpu, IADDR pc,
#define FLD(f) abuf->fields.sfmt_bl8.f
SI f_disp8;
f_disp8 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4))));
f_disp8 = ((((EXTRACT_MSB0_SINT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4))));
/* Record the fields for the semantic handler. */
FLD (i_disp8) = f_disp8;
@ -1200,7 +1200,7 @@ m32rxf_decode (SIM_CPU *current_cpu, IADDR pc,
#define FLD(f) abuf->fields.sfmt_bl24.f
SI f_disp24;
f_disp24 = ((((EXTRACT_MSB0_INT (insn, 32, 8, 24)) << (2))) + (pc));
f_disp24 = ((((EXTRACT_MSB0_SINT (insn, 32, 8, 24)) << (2))) + (pc));
/* Record the fields for the semantic handler. */
FLD (i_disp24) = f_disp24;
@ -1255,7 +1255,7 @@ m32rxf_decode (SIM_CPU *current_cpu, IADDR pc,
INT f_simm16;
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16);
/* Record the fields for the semantic handler. */
FLD (f_simm16) = f_simm16;
@ -1447,7 +1447,7 @@ m32rxf_decode (SIM_CPU *current_cpu, IADDR pc,
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16);
/* Record the fields for the semantic handler. */
FLD (f_simm16) = f_simm16;
@ -1510,7 +1510,7 @@ m32rxf_decode (SIM_CPU *current_cpu, IADDR pc,
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16);
/* Record the fields for the semantic handler. */
FLD (f_simm16) = f_simm16;
@ -1573,7 +1573,7 @@ m32rxf_decode (SIM_CPU *current_cpu, IADDR pc,
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16);
/* Record the fields for the semantic handler. */
FLD (f_simm16) = f_simm16;
@ -1663,7 +1663,7 @@ m32rxf_decode (SIM_CPU *current_cpu, IADDR pc,
INT f_simm8;
f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
f_simm8 = EXTRACT_MSB0_INT (insn, 16, 8, 8);
f_simm8 = EXTRACT_MSB0_SINT (insn, 16, 8, 8);
/* Record the fields for the semantic handler. */
FLD (f_simm8) = f_simm8;
@ -1691,7 +1691,7 @@ m32rxf_decode (SIM_CPU *current_cpu, IADDR pc,
INT f_simm16;
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16);
/* Record the fields for the semantic handler. */
FLD (f_simm16) = f_simm16;
@ -2042,7 +2042,7 @@ m32rxf_decode (SIM_CPU *current_cpu, IADDR pc,
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16);
/* Record the fields for the semantic handler. */
FLD (f_simm16) = f_simm16;
@ -2134,7 +2134,7 @@ m32rxf_decode (SIM_CPU *current_cpu, IADDR pc,
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16);
/* Record the fields for the semantic handler. */
FLD (f_simm16) = f_simm16;
@ -2197,7 +2197,7 @@ m32rxf_decode (SIM_CPU *current_cpu, IADDR pc,
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16);
/* Record the fields for the semantic handler. */
FLD (f_simm16) = f_simm16;
@ -2260,7 +2260,7 @@ m32rxf_decode (SIM_CPU *current_cpu, IADDR pc,
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16);
/* Record the fields for the semantic handler. */
FLD (f_simm16) = f_simm16;
@ -2649,7 +2649,7 @@ m32rxf_decode (SIM_CPU *current_cpu, IADDR pc,
f_uimm3 = EXTRACT_MSB0_UINT (insn, 32, 5, 3);
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16);
/* Record the fields for the semantic handler. */
FLD (f_simm16) = f_simm16;

2
sim/sh64/ChangeLog
View File

@ -6,6 +6,8 @@
* decode-compact.h: Regenerate.
* decode-media.c: Regenerate.
* decode-media.h: Regenerate.
* defs-compact.h: Regenerate.
* defs-media.h: Regenerate.
2009-11-03 Doug Evans <dje@sebabeach.org>

18
sim/sh64/decode-compact.c
View File

@ -2855,7 +2855,7 @@ sh64_compact_decode (SIM_CPU *current_cpu, IADDR pc,
#define FLD(f) abuf->fields.sfmt_bf_compact.f
SI f_disp8;
f_disp8 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (1))) + (((pc) + (4))));
f_disp8 = ((((EXTRACT_MSB0_SINT (insn, 16, 8, 8)) << (1))) + (((pc) + (4))));
/* Record the fields for the semantic handler. */
FLD (i_disp8) = f_disp8;
@ -2878,7 +2878,7 @@ sh64_compact_decode (SIM_CPU *current_cpu, IADDR pc,
#define FLD(f) abuf->fields.sfmt_bf_compact.f
SI f_disp8;
f_disp8 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (1))) + (((pc) + (4))));
f_disp8 = ((((EXTRACT_MSB0_SINT (insn, 16, 8, 8)) << (1))) + (((pc) + (4))));
/* Record the fields for the semantic handler. */
FLD (i_disp8) = f_disp8;
@ -2901,7 +2901,7 @@ sh64_compact_decode (SIM_CPU *current_cpu, IADDR pc,
#define FLD(f) abuf->fields.sfmt_bra_compact.f
SI f_disp12;
f_disp12 = ((((EXTRACT_MSB0_INT (insn, 16, 4, 12)) << (1))) + (((pc) + (4))));
f_disp12 = ((((EXTRACT_MSB0_SINT (insn, 16, 4, 12)) << (1))) + (((pc) + (4))));
/* Record the fields for the semantic handler. */
FLD (i_disp12) = f_disp12;
@ -2967,7 +2967,7 @@ sh64_compact_decode (SIM_CPU *current_cpu, IADDR pc,
#define FLD(f) abuf->fields.sfmt_bra_compact.f
SI f_disp12;
f_disp12 = ((((EXTRACT_MSB0_INT (insn, 16, 4, 12)) << (1))) + (((pc) + (4))));
f_disp12 = ((((EXTRACT_MSB0_SINT (insn, 16, 4, 12)) << (1))) + (((pc) + (4))));
/* Record the fields for the semantic handler. */
FLD (i_disp12) = f_disp12;
@ -3766,7 +3766,7 @@ sh64_compact_decode (SIM_CPU *current_cpu, IADDR pc,
f_dn = ((EXTRACT_MSB0_UINT (insn, 32, 4, 3)) << (1));
f_rm = EXTRACT_MSB0_UINT (insn, 32, 8, 4);
f_imm12x8 = ((EXTRACT_MSB0_INT (insn, 32, 20, 12)) << (3));
f_imm12x8 = ((EXTRACT_MSB0_SINT (insn, 32, 20, 12)) << (3));
/* Record the fields for the semantic handler. */
FLD (f_imm12x8) = f_imm12x8;
@ -3797,7 +3797,7 @@ sh64_compact_decode (SIM_CPU *current_cpu, IADDR pc,
f_rn = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
f_dm = ((EXTRACT_MSB0_UINT (insn, 32, 8, 3)) << (1));
f_imm12x8 = ((EXTRACT_MSB0_INT (insn, 32, 20, 12)) << (3));
f_imm12x8 = ((EXTRACT_MSB0_SINT (insn, 32, 20, 12)) << (3));
/* Record the fields for the semantic handler. */
FLD (f_dm) = f_dm;
@ -4405,7 +4405,7 @@ sh64_compact_decode (SIM_CPU *current_cpu, IADDR pc,
INT f_imm20;
f_rn = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
f_imm20_hi = EXTRACT_MSB0_INT (insn, 32, 8, 4);
f_imm20_hi = EXTRACT_MSB0_SINT (insn, 32, 8, 4);
f_imm20_lo = EXTRACT_MSB0_UINT (insn, 32, 16, 16);
f_imm20 = ((((f_imm20_hi) << (16))) | (f_imm20_lo));
@ -5022,7 +5022,7 @@ sh64_compact_decode (SIM_CPU *current_cpu, IADDR pc,
f_rn = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
f_rm = EXTRACT_MSB0_UINT (insn, 32, 8, 4);
f_imm12x4 = ((EXTRACT_MSB0_INT (insn, 32, 20, 12)) << (2));
f_imm12x4 = ((EXTRACT_MSB0_SINT (insn, 32, 20, 12)) << (2));
/* Record the fields for the semantic handler. */
FLD (f_imm12x4) = f_imm12x4;
@ -5053,7 +5053,7 @@ sh64_compact_decode (SIM_CPU *current_cpu, IADDR pc,
f_rn = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
f_rm = EXTRACT_MSB0_UINT (insn, 32, 8, 4);
f_imm12x4 = ((EXTRACT_MSB0_INT (insn, 32, 20, 12)) << (2));
f_imm12x4 = ((EXTRACT_MSB0_SINT (insn, 32, 20, 12)) << (2));
/* Record the fields for the semantic handler. */
FLD (f_imm12x4) = f_imm12x4;

58
sim/sh64/decode-media.c
View File

@ -1587,7 +1587,7 @@ sh64_media_decode (SIM_CPU *current_cpu, IADDR pc,
UINT f_dest;
f_left = EXTRACT_MSB0_UINT (insn, 32, 6, 6);
f_disp10 = EXTRACT_MSB0_INT (insn, 32, 12, 10);
f_disp10 = EXTRACT_MSB0_SINT (insn, 32, 12, 10);
f_dest = EXTRACT_MSB0_UINT (insn, 32, 22, 6);
/* Record the fields for the semantic handler. */
@ -1675,7 +1675,7 @@ sh64_media_decode (SIM_CPU *current_cpu, IADDR pc,
UINT f_tra;
f_left = EXTRACT_MSB0_UINT (insn, 32, 6, 6);
f_imm6 = EXTRACT_MSB0_INT (insn, 32, 16, 6);
f_imm6 = EXTRACT_MSB0_SINT (insn, 32, 16, 6);
f_tra = EXTRACT_MSB0_UINT (insn, 32, 25, 3);
/* Record the fields for the semantic handler. */
@ -2127,7 +2127,7 @@ sh64_media_decode (SIM_CPU *current_cpu, IADDR pc,
UINT f_dest;
f_left = EXTRACT_MSB0_UINT (insn, 32, 6, 6);
f_disp10x8 = ((EXTRACT_MSB0_INT (insn, 32, 12, 10)) << (3));
f_disp10x8 = ((EXTRACT_MSB0_SINT (insn, 32, 12, 10)) << (3));
f_dest = EXTRACT_MSB0_UINT (insn, 32, 22, 6);
/* Record the fields for the semantic handler. */
@ -2158,7 +2158,7 @@ sh64_media_decode (SIM_CPU *current_cpu, IADDR pc,
UINT f_dest;
f_left = EXTRACT_MSB0_UINT (insn, 32, 6, 6);
f_disp10x8 = ((EXTRACT_MSB0_INT (insn, 32, 12, 10)) << (3));
f_disp10x8 = ((EXTRACT_MSB0_SINT (insn, 32, 12, 10)) << (3));
f_dest = EXTRACT_MSB0_UINT (insn, 32, 22, 6);
/* Record the fields for the semantic handler. */
@ -2190,7 +2190,7 @@ sh64_media_decode (SIM_CPU *current_cpu, IADDR pc,
UINT f_dest;
f_left = EXTRACT_MSB0_UINT (insn, 32, 6, 6);
f_disp10x4 = ((EXTRACT_MSB0_INT (insn, 32, 12, 10)) << (2));
f_disp10x4 = ((EXTRACT_MSB0_SINT (insn, 32, 12, 10)) << (2));
f_dest = EXTRACT_MSB0_UINT (insn, 32, 22, 6);
/* Record the fields for the semantic handler. */
@ -2499,7 +2499,7 @@ sh64_media_decode (SIM_CPU *current_cpu, IADDR pc,
UINT f_dest;
f_left = EXTRACT_MSB0_UINT (insn, 32, 6, 6);
f_disp10x8 = ((EXTRACT_MSB0_INT (insn, 32, 12, 10)) << (3));
f_disp10x8 = ((EXTRACT_MSB0_SINT (insn, 32, 12, 10)) << (3));
f_dest = EXTRACT_MSB0_UINT (insn, 32, 22, 6);
/* Record the fields for the semantic handler. */
@ -2530,7 +2530,7 @@ sh64_media_decode (SIM_CPU *current_cpu, IADDR pc,
UINT f_dest;
f_left = EXTRACT_MSB0_UINT (insn, 32, 6, 6);
f_disp10x4 = ((EXTRACT_MSB0_INT (insn, 32, 12, 10)) << (2));
f_disp10x4 = ((EXTRACT_MSB0_SINT (insn, 32, 12, 10)) << (2));
f_dest = EXTRACT_MSB0_UINT (insn, 32, 22, 6);
/* Record the fields for the semantic handler. */
@ -2660,7 +2660,7 @@ sh64_media_decode (SIM_CPU *current_cpu, IADDR pc,
UINT f_dest;
f_left = EXTRACT_MSB0_UINT (insn, 32, 6, 6);
f_disp6 = EXTRACT_MSB0_INT (insn, 32, 16, 6);
f_disp6 = EXTRACT_MSB0_SINT (insn, 32, 16, 6);
f_dest = EXTRACT_MSB0_UINT (insn, 32, 22, 6);
/* Record the fields for the semantic handler. */
@ -2746,7 +2746,7 @@ sh64_media_decode (SIM_CPU *current_cpu, IADDR pc,
UINT f_dest;
f_left = EXTRACT_MSB0_UINT (insn, 32, 6, 6);
f_disp10 = EXTRACT_MSB0_INT (insn, 32, 12, 10);
f_disp10 = EXTRACT_MSB0_SINT (insn, 32, 12, 10);
f_dest = EXTRACT_MSB0_UINT (insn, 32, 22, 6);
/* Record the fields for the semantic handler. */
@ -2777,7 +2777,7 @@ sh64_media_decode (SIM_CPU *current_cpu, IADDR pc,
UINT f_dest;
f_left = EXTRACT_MSB0_UINT (insn, 32, 6, 6);
f_disp10x4 = ((EXTRACT_MSB0_INT (insn, 32, 12, 10)) << (2));
f_disp10x4 = ((EXTRACT_MSB0_SINT (insn, 32, 12, 10)) << (2));
f_dest = EXTRACT_MSB0_UINT (insn, 32, 22, 6);
/* Record the fields for the semantic handler. */
@ -2808,7 +2808,7 @@ sh64_media_decode (SIM_CPU *current_cpu, IADDR pc,
UINT f_dest;
f_left = EXTRACT_MSB0_UINT (insn, 32, 6, 6);
f_disp10x8 = ((EXTRACT_MSB0_INT (insn, 32, 12, 10)) << (3));
f_disp10x8 = ((EXTRACT_MSB0_SINT (insn, 32, 12, 10)) << (3));
f_dest = EXTRACT_MSB0_UINT (insn, 32, 22, 6);
/* Record the fields for the semantic handler. */
@ -2839,7 +2839,7 @@ sh64_media_decode (SIM_CPU *current_cpu, IADDR pc,
UINT f_dest;
f_left = EXTRACT_MSB0_UINT (insn, 32, 6, 6);
f_disp10x2 = ((EXTRACT_MSB0_INT (insn, 32, 12, 10)) << (1));
f_disp10x2 = ((EXTRACT_MSB0_SINT (insn, 32, 12, 10)) << (1));
f_dest = EXTRACT_MSB0_UINT (insn, 32, 22, 6);
/* Record the fields for the semantic handler. */
@ -2870,7 +2870,7 @@ sh64_media_decode (SIM_CPU *current_cpu, IADDR pc,
UINT f_dest;
f_left = EXTRACT_MSB0_UINT (insn, 32, 6, 6);
f_disp6 = EXTRACT_MSB0_INT (insn, 32, 16, 6);
f_disp6 = EXTRACT_MSB0_SINT (insn, 32, 16, 6);
f_dest = EXTRACT_MSB0_UINT (insn, 32, 22, 6);
/* Record the fields for the semantic handler. */
@ -2901,7 +2901,7 @@ sh64_media_decode (SIM_CPU *current_cpu, IADDR pc,
UINT f_dest;
f_left = EXTRACT_MSB0_UINT (insn, 32, 6, 6);
f_disp6 = EXTRACT_MSB0_INT (insn, 32, 16, 6);
f_disp6 = EXTRACT_MSB0_SINT (insn, 32, 16, 6);
f_dest = EXTRACT_MSB0_UINT (insn, 32, 22, 6);
/* Record the fields for the semantic handler. */
@ -2932,7 +2932,7 @@ sh64_media_decode (SIM_CPU *current_cpu, IADDR pc,
UINT f_dest;
f_left = EXTRACT_MSB0_UINT (insn, 32, 6, 6);
f_disp6 = EXTRACT_MSB0_INT (insn, 32, 16, 6);
f_disp6 = EXTRACT_MSB0_SINT (insn, 32, 16, 6);
f_dest = EXTRACT_MSB0_UINT (insn, 32, 22, 6);
/* Record the fields for the semantic handler. */
@ -2963,7 +2963,7 @@ sh64_media_decode (SIM_CPU *current_cpu, IADDR pc,
UINT f_dest;
f_left = EXTRACT_MSB0_UINT (insn, 32, 6, 6);
f_disp6 = EXTRACT_MSB0_INT (insn, 32, 16, 6);
f_disp6 = EXTRACT_MSB0_SINT (insn, 32, 16, 6);
f_dest = EXTRACT_MSB0_UINT (insn, 32, 22, 6);
/* Record the fields for the semantic handler. */
@ -3217,7 +3217,7 @@ sh64_media_decode (SIM_CPU *current_cpu, IADDR pc,
INT f_imm16;
UINT f_dest;
f_imm16 = EXTRACT_MSB0_INT (insn, 32, 6, 16);
f_imm16 = EXTRACT_MSB0_SINT (insn, 32, 6, 16);
f_dest = EXTRACT_MSB0_UINT (insn, 32, 22, 6);
/* Record the fields for the semantic handler. */
@ -3259,7 +3259,7 @@ sh64_media_decode (SIM_CPU *current_cpu, IADDR pc,
UINT f_dest;
f_left = EXTRACT_MSB0_UINT (insn, 32, 6, 6);
f_imm10 = EXTRACT_MSB0_INT (insn, 32, 12, 10);
f_imm10 = EXTRACT_MSB0_SINT (insn, 32, 12, 10);
f_dest = EXTRACT_MSB0_UINT (insn, 32, 22, 6);
/* Record the fields for the semantic handler. */
@ -3288,7 +3288,7 @@ sh64_media_decode (SIM_CPU *current_cpu, IADDR pc,
DI f_disp16;
UINT f_tra;
f_disp16 = ((((EXTRACT_MSB0_INT (insn, 32, 6, 16)) << (2))) + (pc));
f_disp16 = ((((EXTRACT_MSB0_SINT (insn, 32, 6, 16)) << (2))) + (pc));
f_tra = EXTRACT_MSB0_UINT (insn, 32, 25, 3);
/* Record the fields for the semantic handler. */
@ -3373,7 +3373,7 @@ sh64_media_decode (SIM_CPU *current_cpu, IADDR pc,
UINT f_dest;
f_left = EXTRACT_MSB0_UINT (insn, 32, 6, 6);
f_disp6 = EXTRACT_MSB0_INT (insn, 32, 16, 6);
f_disp6 = EXTRACT_MSB0_SINT (insn, 32, 16, 6);
f_dest = EXTRACT_MSB0_UINT (insn, 32, 22, 6);
/* Record the fields for the semantic handler. */
@ -3490,7 +3490,7 @@ sh64_media_decode (SIM_CPU *current_cpu, IADDR pc,
UINT f_dest;
f_left = EXTRACT_MSB0_UINT (insn, 32, 6, 6);
f_disp10 = EXTRACT_MSB0_INT (insn, 32, 12, 10);
f_disp10 = EXTRACT_MSB0_SINT (insn, 32, 12, 10);
f_dest = EXTRACT_MSB0_UINT (insn, 32, 22, 6);
/* Record the fields for the semantic handler. */
@ -3521,7 +3521,7 @@ sh64_media_decode (SIM_CPU *current_cpu, IADDR pc,
UINT f_dest;
f_left = EXTRACT_MSB0_UINT (insn, 32, 6, 6);
f_disp10x4 = ((EXTRACT_MSB0_INT (insn, 32, 12, 10)) << (2));
f_disp10x4 = ((EXTRACT_MSB0_SINT (insn, 32, 12, 10)) << (2));
f_dest = EXTRACT_MSB0_UINT (insn, 32, 22, 6);
/* Record the fields for the semantic handler. */
@ -3552,7 +3552,7 @@ sh64_media_decode (SIM_CPU *current_cpu, IADDR pc,
UINT f_dest;
f_left = EXTRACT_MSB0_UINT (insn, 32, 6, 6);
f_disp10x8 = ((EXTRACT_MSB0_INT (insn, 32, 12, 10)) << (3));
f_disp10x8 = ((EXTRACT_MSB0_SINT (insn, 32, 12, 10)) << (3));
f_dest = EXTRACT_MSB0_UINT (insn, 32, 22, 6);
/* Record the fields for the semantic handler. */
@ -3583,7 +3583,7 @@ sh64_media_decode (SIM_CPU *current_cpu, IADDR pc,
UINT f_dest;
f_left = EXTRACT_MSB0_UINT (insn, 32, 6, 6);
f_disp10x2 = ((EXTRACT_MSB0_INT (insn, 32, 12, 10)) << (1));
f_disp10x2 = ((EXTRACT_MSB0_SINT (insn, 32, 12, 10)) << (1));
f_dest = EXTRACT_MSB0_UINT (insn, 32, 22, 6);
/* Record the fields for the semantic handler. */
@ -3614,7 +3614,7 @@ sh64_media_decode (SIM_CPU *current_cpu, IADDR pc,
UINT f_dest;
f_left = EXTRACT_MSB0_UINT (insn, 32, 6, 6);
f_disp6 = EXTRACT_MSB0_INT (insn, 32, 16, 6);
f_disp6 = EXTRACT_MSB0_SINT (insn, 32, 16, 6);
f_dest = EXTRACT_MSB0_UINT (insn, 32, 22, 6);
/* Record the fields for the semantic handler. */
@ -3645,7 +3645,7 @@ sh64_media_decode (SIM_CPU *current_cpu, IADDR pc,
UINT f_dest;
f_left = EXTRACT_MSB0_UINT (insn, 32, 6, 6);
f_disp6 = EXTRACT_MSB0_INT (insn, 32, 16, 6);
f_disp6 = EXTRACT_MSB0_SINT (insn, 32, 16, 6);
f_dest = EXTRACT_MSB0_UINT (insn, 32, 22, 6);
/* Record the fields for the semantic handler. */
@ -3676,7 +3676,7 @@ sh64_media_decode (SIM_CPU *current_cpu, IADDR pc,
UINT f_dest;
f_left = EXTRACT_MSB0_UINT (insn, 32, 6, 6);
f_disp6 = EXTRACT_MSB0_INT (insn, 32, 16, 6);
f_disp6 = EXTRACT_MSB0_SINT (insn, 32, 16, 6);
f_dest = EXTRACT_MSB0_UINT (insn, 32, 22, 6);
/* Record the fields for the semantic handler. */
@ -3707,7 +3707,7 @@ sh64_media_decode (SIM_CPU *current_cpu, IADDR pc,
UINT f_dest;
f_left = EXTRACT_MSB0_UINT (insn, 32, 6, 6);
f_disp6 = EXTRACT_MSB0_INT (insn, 32, 16, 6);
f_disp6 = EXTRACT_MSB0_SINT (insn, 32, 16, 6);
f_dest = EXTRACT_MSB0_UINT (insn, 32, 22, 6);
/* Record the fields for the semantic handler. */
@ -3923,7 +3923,7 @@ sh64_media_decode (SIM_CPU *current_cpu, IADDR pc,
UINT f_dest;
f_left = EXTRACT_MSB0_UINT (insn, 32, 6, 6);
f_imm6 = EXTRACT_MSB0_INT (insn, 32, 16, 6);
f_imm6 = EXTRACT_MSB0_SINT (insn, 32, 16, 6);
f_dest = EXTRACT_MSB0_UINT (insn, 32, 22, 6);
/* Record the fields for the semantic handler. */

12
sim/sh64/defs-compact.h
View File

@ -207,7 +207,7 @@ struct scache {
#define EXTRACT_IFMT_BF_COMPACT_CODE \
length = 2; \
f_op8 = EXTRACT_MSB0_UINT (insn, 16, 0, 8); \
f_disp8 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (1))) + (((pc) + (4)))); \
f_disp8 = ((((EXTRACT_MSB0_SINT (insn, 16, 8, 8)) << (1))) + (((pc) + (4)))); \
#define EXTRACT_IFMT_BRA_COMPACT_VARS \
UINT f_op4; \
@ -216,7 +216,7 @@ struct scache {
#define EXTRACT_IFMT_BRA_COMPACT_CODE \
length = 2; \
f_op4 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
f_disp12 = ((((EXTRACT_MSB0_INT (insn, 16, 4, 12)) << (1))) + (((pc) + (4)))); \
f_disp12 = ((((EXTRACT_MSB0_SINT (insn, 16, 4, 12)) << (1))) + (((pc) + (4)))); \
#define EXTRACT_IFMT_BRAF_COMPACT_VARS \
UINT f_op4; \
@ -366,7 +366,7 @@ struct scache {
f_rm = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \
f_sub4 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \
f_16_4 = EXTRACT_MSB0_UINT (insn, 32, 16, 4); \
f_imm12x8 = ((EXTRACT_MSB0_INT (insn, 32, 20, 12)) << (3)); \
f_imm12x8 = ((EXTRACT_MSB0_SINT (insn, 32, 20, 12)) << (3)); \
#define EXTRACT_IFMT_FMOV9_COMPACT_VARS \
UINT f_op4; \
@ -385,7 +385,7 @@ struct scache {
f_11_1 = EXTRACT_MSB0_UINT (insn, 32, 11, 1); \
f_sub4 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \
f_16_4 = EXTRACT_MSB0_UINT (insn, 32, 16, 4); \
f_imm12x8 = ((EXTRACT_MSB0_INT (insn, 32, 20, 12)) << (3)); \
f_imm12x8 = ((EXTRACT_MSB0_SINT (insn, 32, 20, 12)) << (3)); \
#define EXTRACT_IFMT_FTRV_COMPACT_VARS \
UINT f_op4; \
@ -410,7 +410,7 @@ struct scache {
length = 4; \
f_op4 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \
f_rn = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \
f_imm20_hi = EXTRACT_MSB0_INT (insn, 32, 8, 4); \
f_imm20_hi = EXTRACT_MSB0_SINT (insn, 32, 8, 4); \
f_imm20_lo = EXTRACT_MSB0_UINT (insn, 32, 16, 16); \
f_imm20 = ((((f_imm20_hi) << (16))) | (f_imm20_lo));\
f_sub4 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \
@ -474,7 +474,7 @@ struct scache {
f_rm = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \
f_sub4 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \
f_16_4 = EXTRACT_MSB0_UINT (insn, 32, 16, 4); \
f_imm12x4 = ((EXTRACT_MSB0_INT (insn, 32, 20, 12)) << (2)); \
f_imm12x4 = ((EXTRACT_MSB0_SINT (insn, 32, 20, 12)) << (2)); \
#define EXTRACT_IFMT_MOVW4_COMPACT_VARS \
UINT f_op8; \

28
sim/sh64/defs-media.h
View File

@ -194,7 +194,7 @@ struct scache {
length = 4; \
f_op = EXTRACT_MSB0_UINT (insn, 32, 0, 6); \
f_left = EXTRACT_MSB0_UINT (insn, 32, 6, 6); \
f_disp10 = EXTRACT_MSB0_INT (insn, 32, 12, 10); \
f_disp10 = EXTRACT_MSB0_SINT (insn, 32, 12, 10); \
f_dest = EXTRACT_MSB0_UINT (insn, 32, 22, 6); \
f_rsvd = EXTRACT_MSB0_UINT (insn, 32, 28, 4); \
@ -211,7 +211,7 @@ struct scache {
f_op = EXTRACT_MSB0_UINT (insn, 32, 0, 6); \
f_left = EXTRACT_MSB0_UINT (insn, 32, 6, 6); \
f_ext = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \
f_disp6x32 = ((EXTRACT_MSB0_INT (insn, 32, 16, 6)) << (5)); \
f_disp6x32 = ((EXTRACT_MSB0_SINT (insn, 32, 16, 6)) << (5)); \
f_dest = EXTRACT_MSB0_UINT (insn, 32, 22, 6); \
f_rsvd = EXTRACT_MSB0_UINT (insn, 32, 28, 4); \
@ -251,7 +251,7 @@ struct scache {
f_op = EXTRACT_MSB0_UINT (insn, 32, 0, 6); \
f_left = EXTRACT_MSB0_UINT (insn, 32, 6, 6); \
f_ext = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \
f_imm6 = EXTRACT_MSB0_INT (insn, 32, 16, 6); \
f_imm6 = EXTRACT_MSB0_SINT (insn, 32, 16, 6); \
f_likely = EXTRACT_MSB0_UINT (insn, 32, 22, 1); \
f_23_2 = EXTRACT_MSB0_UINT (insn, 32, 23, 2); \
f_tra = EXTRACT_MSB0_UINT (insn, 32, 25, 3); \
@ -499,7 +499,7 @@ struct scache {
length = 4; \
f_op = EXTRACT_MSB0_UINT (insn, 32, 0, 6); \
f_left = EXTRACT_MSB0_UINT (insn, 32, 6, 6); \
f_disp10x8 = ((EXTRACT_MSB0_INT (insn, 32, 12, 10)) << (3)); \
f_disp10x8 = ((EXTRACT_MSB0_SINT (insn, 32, 12, 10)) << (3)); \
f_dest = EXTRACT_MSB0_UINT (insn, 32, 22, 6); \
f_rsvd = EXTRACT_MSB0_UINT (insn, 32, 28, 4); \
@ -514,7 +514,7 @@ struct scache {
length = 4; \
f_op = EXTRACT_MSB0_UINT (insn, 32, 0, 6); \
f_left = EXTRACT_MSB0_UINT (insn, 32, 6, 6); \
f_disp10x8 = ((EXTRACT_MSB0_INT (insn, 32, 12, 10)) << (3)); \
f_disp10x8 = ((EXTRACT_MSB0_SINT (insn, 32, 12, 10)) << (3)); \
f_dest = EXTRACT_MSB0_UINT (insn, 32, 22, 6); \
f_rsvd = EXTRACT_MSB0_UINT (insn, 32, 28, 4); \
@ -529,7 +529,7 @@ struct scache {
length = 4; \
f_op = EXTRACT_MSB0_UINT (insn, 32, 0, 6); \
f_left = EXTRACT_MSB0_UINT (insn, 32, 6, 6); \
f_disp10x4 = ((EXTRACT_MSB0_INT (insn, 32, 12, 10)) << (2)); \
f_disp10x4 = ((EXTRACT_MSB0_SINT (insn, 32, 12, 10)) << (2)); \
f_dest = EXTRACT_MSB0_UINT (insn, 32, 22, 6); \
f_rsvd = EXTRACT_MSB0_UINT (insn, 32, 28, 4); \
@ -688,7 +688,7 @@ struct scache {
f_op = EXTRACT_MSB0_UINT (insn, 32, 0, 6); \
f_left = EXTRACT_MSB0_UINT (insn, 32, 6, 6); \
f_ext = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \
f_disp6 = EXTRACT_MSB0_INT (insn, 32, 16, 6); \
f_disp6 = EXTRACT_MSB0_SINT (insn, 32, 16, 6); \
f_dest = EXTRACT_MSB0_UINT (insn, 32, 22, 6); \
f_rsvd = EXTRACT_MSB0_UINT (insn, 32, 28, 4); \
@ -720,7 +720,7 @@ struct scache {
length = 4; \
f_op = EXTRACT_MSB0_UINT (insn, 32, 0, 6); \
f_left = EXTRACT_MSB0_UINT (insn, 32, 6, 6); \
f_disp10x4 = ((EXTRACT_MSB0_INT (insn, 32, 12, 10)) << (2)); \
f_disp10x4 = ((EXTRACT_MSB0_SINT (insn, 32, 12, 10)) << (2)); \
f_dest = EXTRACT_MSB0_UINT (insn, 32, 22, 6); \
f_rsvd = EXTRACT_MSB0_UINT (insn, 32, 28, 4); \
@ -735,7 +735,7 @@ struct scache {
length = 4; \
f_op = EXTRACT_MSB0_UINT (insn, 32, 0, 6); \
f_left = EXTRACT_MSB0_UINT (insn, 32, 6, 6); \
f_disp10x8 = ((EXTRACT_MSB0_INT (insn, 32, 12, 10)) << (3)); \
f_disp10x8 = ((EXTRACT_MSB0_SINT (insn, 32, 12, 10)) << (3)); \
f_dest = EXTRACT_MSB0_UINT (insn, 32, 22, 6); \
f_rsvd = EXTRACT_MSB0_UINT (insn, 32, 28, 4); \
@ -765,7 +765,7 @@ struct scache {
#define EXTRACT_IFMT_MOVI_CODE \
length = 4; \
f_op = EXTRACT_MSB0_UINT (insn, 32, 0, 6); \
f_imm16 = EXTRACT_MSB0_INT (insn, 32, 6, 16); \
f_imm16 = EXTRACT_MSB0_SINT (insn, 32, 6, 16); \
f_dest = EXTRACT_MSB0_UINT (insn, 32, 22, 6); \
f_rsvd = EXTRACT_MSB0_UINT (insn, 32, 28, 4); \
@ -780,7 +780,7 @@ struct scache {
length = 4; \
f_op = EXTRACT_MSB0_UINT (insn, 32, 0, 6); \
f_left = EXTRACT_MSB0_UINT (insn, 32, 6, 6); \
f_imm10 = EXTRACT_MSB0_INT (insn, 32, 12, 10); \
f_imm10 = EXTRACT_MSB0_SINT (insn, 32, 12, 10); \
f_dest = EXTRACT_MSB0_UINT (insn, 32, 22, 6); \
f_rsvd = EXTRACT_MSB0_UINT (insn, 32, 28, 4); \
@ -797,7 +797,7 @@ struct scache {
f_op = EXTRACT_MSB0_UINT (insn, 32, 0, 6); \
f_left = EXTRACT_MSB0_UINT (insn, 32, 6, 6); \
f_ext = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \
f_disp6x32 = ((EXTRACT_MSB0_INT (insn, 32, 16, 6)) << (5)); \
f_disp6x32 = ((EXTRACT_MSB0_SINT (insn, 32, 16, 6)) << (5)); \
f_right = EXTRACT_MSB0_UINT (insn, 32, 16, 6); \
f_rsvd = EXTRACT_MSB0_UINT (insn, 32, 28, 4); \
@ -812,7 +812,7 @@ struct scache {
#define EXTRACT_IFMT_PTA_CODE \
length = 4; \
f_op = EXTRACT_MSB0_UINT (insn, 32, 0, 6); \
f_disp16 = ((((EXTRACT_MSB0_INT (insn, 32, 6, 16)) << (2))) + (pc)); \
f_disp16 = ((((EXTRACT_MSB0_SINT (insn, 32, 6, 16)) << (2))) + (pc)); \
f_likely = EXTRACT_MSB0_UINT (insn, 32, 22, 1); \
f_23_2 = EXTRACT_MSB0_UINT (insn, 32, 23, 2); \
f_tra = EXTRACT_MSB0_UINT (insn, 32, 25, 3); \
@ -897,7 +897,7 @@ struct scache {
length = 4; \
f_op = EXTRACT_MSB0_UINT (insn, 32, 0, 6); \
f_left = EXTRACT_MSB0_UINT (insn, 32, 6, 6); \
f_disp10x2 = ((EXTRACT_MSB0_INT (insn, 32, 12, 10)) << (1)); \
f_disp10x2 = ((EXTRACT_MSB0_SINT (insn, 32, 12, 10)) << (1)); \
f_dest = EXTRACT_MSB0_UINT (insn, 32, 22, 6); \
f_rsvd = EXTRACT_MSB0_UINT (insn, 32, 28, 4); \