Support saving saved regs with multiple stores in addition to store multiple instructions in prologue.
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@ -1,3 +1,9 @@
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Fri Mar 3 12:33:24 1995 Michael Meissner <meissner@tiktok.cygnus.com>
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* rs6000-tdep.c (skip_prologue): Skip multiple stores of the saved
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registers that GCC emits on the PowerPC by default in addition to
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the store multiple instruction used on the Power series.
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Fri Mar 3 00:54:58 1995 Doug Evans <dje@canuck.cygnus.com>
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* sparc-tdep.c (decode_asi): New function.
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@ -209,25 +209,28 @@ CORE_ADDR pc;
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If the next is not a nop, this branch was part of the function
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prologue. */
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if (op == 0x4def7b82 || /* crorc 15, 15, 15 */
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if (op == 0x4def7b82 || /* crorc 15, 15, 15 */
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op == 0x0)
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return pc - 4; /* don't skip over this branch */
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return pc - 4; /* don't skip over this branch */
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}
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if ((op & 0xfc1f0000) == 0xd8010000) { /* stfd Rx,NUM(r1) */
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pc += 4; /* store floating register double */
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if ((op & 0xfc1f0000) == 0xd8010000) { /* stfd Rx,NUM(r1) */
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pc += 4; /* store floating register double */
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op = read_memory_integer (pc, 4);
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}
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if ((op & 0xfc1f0000) == 0xbc010000) { /* stm Rx, NUM(r1) */
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if ((op & 0xfc1f0000) == 0xbc010000) { /* stm Rx, NUM(r1) */
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pc += 4;
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op = read_memory_integer (pc, 4);
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}
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while (((tmp = op >> 16) == 0x9001) || /* st r0, NUM(r1) */
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(tmp == 0x9421) || /* stu r1, NUM(r1) */
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(tmp == 0x93e1)) /* st r31,NUM(r1) */
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{
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while ((op & 0xfc1f0000) == 0x9001 && /* st rx,NUM(r1), rx >= r13 */
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(op & 0x03e00000) >= 0x01a00000) {
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pc += 4;
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op = read_memory_integer (pc, 4);
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}
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if ((op & 0xfc1f0000) == 0x94210000) { /* stu r1,NUM(r1) */
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pc += 4;
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op = read_memory_integer (pc, 4);
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}
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