[PATCH, GAS, Arm] Refactor check_simd_pred_availability
gas/ChangeLog: 2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com> * config/tc-arm.c (check_simd_pred_availability): Refactor. (do_neon_dyadic_i_su): Refactor use of check_simd_pred_availability. (do_neon_dyadic_i64_su): Likewise. (do_neon_shl): Likewise. (do_neon_qshl): Likewise. (do_neon_rshl): Likewise. (do_neon_logic): Likewise. (do_neon_dyadic_if_su): Likewise. (do_neon_addsub_if_i): Likewise. (do_neon_mac_maybe_scalar): Likewise. (do_neon_fmac): Likewise. (do_neon_mul): Likewise. (do_neon_qdmulh): Likewise. (do_neon_qrdmlah): Likewise. (do_neon_abs_neg): Likewise. (do_neon_sli): Likewise. (do_neon_sri): Likewise. (do_neon_qshlu_imm): Likewise. (do_neon_cvt_1): Likewise. (do_neon_cvttb_1): Likewise. (do_neon_mvn): Likewise. (do_neon_rev): Likewise. (do_neon_dup): Likewise. (do_neon_mov): Likewise. (do_neon_rshift_round_imm): Likewise. (do_neon_sat_abs_neg): Likewise. (do_neon_cls): Likewise. (do_neon_clz): Likewise. (do_vmaxnm): Likewise. (do_vrint_1): Likewise. (do_vcmla): Likewise. (do_vcadd): Likewise.
This commit is contained in:
Andre Vieira
parent
514bbb0fd9
commit
64c350f2b7
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@ -1,3 +1,38 @@
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2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
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* config/tc-arm.c (check_simd_pred_availability): Refactor.
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(do_neon_dyadic_i_su): Refactor use of check_simd_pred_availability.
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(do_neon_dyadic_i64_su): Likewise.
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(do_neon_shl): Likewise.
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(do_neon_qshl): Likewise.
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(do_neon_rshl): Likewise.
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(do_neon_logic): Likewise.
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(do_neon_dyadic_if_su): Likewise.
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(do_neon_addsub_if_i): Likewise.
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(do_neon_mac_maybe_scalar): Likewise.
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(do_neon_fmac): Likewise.
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(do_neon_mul): Likewise.
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(do_neon_qdmulh): Likewise.
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(do_neon_qrdmlah): Likewise.
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(do_neon_abs_neg): Likewise.
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(do_neon_sli): Likewise.
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(do_neon_sri): Likewise.
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(do_neon_qshlu_imm): Likewise.
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(do_neon_cvt_1): Likewise.
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(do_neon_cvttb_1): Likewise.
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(do_neon_mvn): Likewise.
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(do_neon_rev): Likewise.
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(do_neon_dup): Likewise.
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(do_neon_mov): Likewise.
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(do_neon_rshift_round_imm): Likewise.
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(do_neon_sat_abs_neg): Likewise.
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(do_neon_cls): Likewise.
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(do_neon_clz): Likewise.
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(do_vmaxnm): Likewise.
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(do_vrint_1): Likewise.
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(do_vcmla): Likewise.
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(do_vcadd): Likewise.
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2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
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* NEWS: Mention Armv8.1-M Mainline and MVE.
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@ -16380,7 +16380,13 @@ if (!thumb_mode && (check & NEON_CHECK_CC))
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return SUCCESS;
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}
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static int
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/* Return TRUE if the SIMD instruction is available for the current
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cpu_variant. FP is set to TRUE if this is a SIMD floating-point
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instruction. CHECK contains th. CHECK contains the set of bits to pass to
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vfp_or_neon_is_neon for the NEON specific checks. */
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static bfd_boolean
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check_simd_pred_availability (int fp, unsigned check)
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{
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if (inst.cond > COND_ALWAYS)
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@ -16388,7 +16394,7 @@ if (inst.cond > COND_ALWAYS)
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if (!ARM_CPU_HAS_FEATURE (cpu_variant, mve_ext))
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{
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inst.error = BAD_FPU;
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return 1;
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return FALSE;
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}
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inst.pred_insn_type = INSIDE_VPT_INSN;
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}
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@ -16397,18 +16403,18 @@ else if (inst.cond < COND_ALWAYS)
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if (ARM_CPU_HAS_FEATURE (cpu_variant, mve_ext))
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inst.pred_insn_type = MVE_OUTSIDE_PRED_INSN;
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else if (vfp_or_neon_is_neon (check) == FAIL)
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return 2;
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return FALSE;
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}
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else
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{
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if (!ARM_CPU_HAS_FEATURE (cpu_variant, fp ? mve_fp_ext : mve_ext)
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&& vfp_or_neon_is_neon (check) == FAIL)
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return 3;
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return FALSE;
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if (ARM_CPU_HAS_FEATURE (cpu_variant, mve_ext))
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inst.pred_insn_type = MVE_OUTSIDE_PRED_INSN;
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}
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return 0;
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return TRUE;
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}
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/* Neon instruction encoders, in approximate order of appearance. */
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@ -16416,7 +16422,7 @@ return 0;
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static void
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do_neon_dyadic_i_su (void)
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{
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if (check_simd_pred_availability (0, NEON_CHECK_ARCH | NEON_CHECK_CC))
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if (!check_simd_pred_availability (FALSE, NEON_CHECK_ARCH | NEON_CHECK_CC))
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return;
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enum neon_shape rs;
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@ -16438,7 +16444,7 @@ do_neon_dyadic_i_su (void)
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static void
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do_neon_dyadic_i64_su (void)
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{
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if (check_simd_pred_availability (0, NEON_CHECK_CC | NEON_CHECK_ARCH))
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if (!check_simd_pred_availability (FALSE, NEON_CHECK_CC | NEON_CHECK_ARCH))
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return;
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enum neon_shape rs;
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struct neon_type_el et;
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@ -16480,7 +16486,7 @@ neon_imm_shift (int write_ubit, int uval, int isquad, struct neon_type_el et,
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static void
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do_neon_shl (void)
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{
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if (check_simd_pred_availability (0, NEON_CHECK_ARCH | NEON_CHECK_CC))
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if (!check_simd_pred_availability (FALSE, NEON_CHECK_ARCH | NEON_CHECK_CC))
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return;
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if (!inst.operands[2].isreg)
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@ -16560,7 +16566,7 @@ do_neon_shl (void)
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static void
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do_neon_qshl (void)
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{
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if (check_simd_pred_availability (0, NEON_CHECK_ARCH | NEON_CHECK_CC))
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if (!check_simd_pred_availability (FALSE, NEON_CHECK_ARCH | NEON_CHECK_CC))
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return;
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if (!inst.operands[2].isreg)
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@ -16634,7 +16640,7 @@ do_neon_qshl (void)
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static void
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do_neon_rshl (void)
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{
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if (check_simd_pred_availability (0, NEON_CHECK_ARCH | NEON_CHECK_CC))
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if (!check_simd_pred_availability (FALSE, NEON_CHECK_ARCH | NEON_CHECK_CC))
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return;
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enum neon_shape rs;
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@ -16748,8 +16754,8 @@ do_neon_logic (void)
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{
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enum neon_shape rs = neon_select_shape (NS_DDD, NS_QQQ, NS_NULL);
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if (rs == NS_QQQ
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&& check_simd_pred_availability (0, NEON_CHECK_ARCH | NEON_CHECK_CC)
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== FAIL)
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&& !check_simd_pred_availability (FALSE,
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NEON_CHECK_ARCH | NEON_CHECK_CC))
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return;
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else if (rs != NS_QQQ
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&& !ARM_CPU_HAS_FEATURE (cpu_variant, fpu_neon_ext_v1))
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@ -16771,8 +16777,8 @@ do_neon_logic (void)
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/* Because neon_select_shape makes the second operand a copy of the first
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if the second operand is not present. */
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if (rs == NS_QQI
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&& check_simd_pred_availability (0, NEON_CHECK_ARCH | NEON_CHECK_CC)
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== FAIL)
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&& !check_simd_pred_availability (FALSE,
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NEON_CHECK_ARCH | NEON_CHECK_CC))
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return;
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else if (rs != NS_QQI
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&& !ARM_CPU_HAS_FEATURE (cpu_variant, fpu_neon_ext_v1))
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@ -17215,8 +17221,8 @@ do_neon_dyadic_if_su (void)
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&& et.type == NT_float
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&& !ARM_CPU_HAS_FEATURE (cpu_variant,fpu_neon_ext_v1), BAD_FPU);
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if (check_simd_pred_availability (et.type == NT_float,
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NEON_CHECK_ARCH | NEON_CHECK_CC))
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if (!check_simd_pred_availability (et.type == NT_float,
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NEON_CHECK_ARCH | NEON_CHECK_CC))
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return;
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neon_dyadic_misc (NT_unsigned, N_SUF_32, 0);
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@ -17240,8 +17246,8 @@ do_neon_addsub_if_i (void)
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they are predicated or not. */
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if ((rs == NS_QQQ || rs == NS_QQR) && et.size != 64)
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{
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if (check_simd_pred_availability (et.type == NT_float,
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NEON_CHECK_ARCH | NEON_CHECK_CC))
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if (!check_simd_pred_availability (et.type == NT_float,
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NEON_CHECK_ARCH | NEON_CHECK_CC))
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return;
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}
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else
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@ -17402,7 +17408,7 @@ do_neon_mac_maybe_scalar (void)
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if (try_vfp_nsyn (3, do_vfp_nsyn_mla_mls) == SUCCESS)
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return;
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if (check_simd_pred_availability (0, NEON_CHECK_CC | NEON_CHECK_ARCH))
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if (!check_simd_pred_availability (FALSE, NEON_CHECK_CC | NEON_CHECK_ARCH))
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return;
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if (inst.operands[2].isscalar)
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@ -17439,7 +17445,7 @@ do_neon_fmac (void)
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&& try_vfp_nsyn (3, do_vfp_nsyn_fma_fms) == SUCCESS)
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return;
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if (check_simd_pred_availability (1, NEON_CHECK_CC | NEON_CHECK_ARCH))
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if (!check_simd_pred_availability (TRUE, NEON_CHECK_CC | NEON_CHECK_ARCH))
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return;
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if (ARM_CPU_HAS_FEATURE (cpu_variant, mve_fp_ext))
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@ -17493,7 +17499,7 @@ do_neon_mul (void)
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if (try_vfp_nsyn (3, do_vfp_nsyn_mul) == SUCCESS)
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return;
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if (check_simd_pred_availability (0, NEON_CHECK_CC | NEON_CHECK_ARCH))
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if (!check_simd_pred_availability (FALSE, NEON_CHECK_CC | NEON_CHECK_ARCH))
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return;
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if (inst.operands[2].isscalar)
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@ -17526,7 +17532,7 @@ do_neon_mul (void)
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static void
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do_neon_qdmulh (void)
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{
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if (check_simd_pred_availability (0, NEON_CHECK_ARCH | NEON_CHECK_CC))
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if (!check_simd_pred_availability (FALSE, NEON_CHECK_ARCH | NEON_CHECK_CC))
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return;
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if (inst.operands[2].isscalar)
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@ -17963,7 +17969,7 @@ do_mve_vmaxv (void)
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static void
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do_neon_qrdmlah (void)
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{
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if (check_simd_pred_availability (0, NEON_CHECK_ARCH | NEON_CHECK_CC))
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if (!check_simd_pred_availability (FALSE, NEON_CHECK_ARCH | NEON_CHECK_CC))
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return;
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if (!ARM_CPU_HAS_FEATURE (cpu_variant, mve_ext))
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{
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@ -18043,8 +18049,8 @@ do_neon_abs_neg (void)
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rs = neon_select_shape (NS_DD, NS_QQ, NS_NULL);
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et = neon_check_type (2, rs, N_EQK, N_S_32 | N_F_16_32 | N_KEY);
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if (check_simd_pred_availability (et.type == NT_float,
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NEON_CHECK_ARCH | NEON_CHECK_CC))
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if (!check_simd_pred_availability (et.type == NT_float,
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NEON_CHECK_ARCH | NEON_CHECK_CC))
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return;
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inst.instruction |= LOW4 (inst.operands[0].reg) << 12;
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@ -18061,7 +18067,7 @@ do_neon_abs_neg (void)
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static void
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do_neon_sli (void)
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{
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if (check_simd_pred_availability (0, NEON_CHECK_ARCH | NEON_CHECK_CC))
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if (!check_simd_pred_availability (FALSE, NEON_CHECK_ARCH | NEON_CHECK_CC))
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return;
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enum neon_shape rs;
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@ -18087,7 +18093,7 @@ do_neon_sli (void)
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static void
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do_neon_sri (void)
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{
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if (check_simd_pred_availability (0, NEON_CHECK_ARCH | NEON_CHECK_CC))
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if (!check_simd_pred_availability (FALSE, NEON_CHECK_ARCH | NEON_CHECK_CC))
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return;
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enum neon_shape rs;
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@ -18112,7 +18118,7 @@ do_neon_sri (void)
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static void
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do_neon_qshlu_imm (void)
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{
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if (check_simd_pred_availability (0, NEON_CHECK_ARCH | NEON_CHECK_CC))
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if (!check_simd_pred_availability (FALSE, NEON_CHECK_ARCH | NEON_CHECK_CC))
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return;
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enum neon_shape rs;
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@ -18585,7 +18591,8 @@ do_neon_cvt_1 (enum neon_cvt_mode mode)
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|| flavour == neon_cvt_flavour_s32_f32
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|| flavour == neon_cvt_flavour_u32_f32))
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{
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if (check_simd_pred_availability (1, NEON_CHECK_CC | NEON_CHECK_ARCH))
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if (!check_simd_pred_availability (TRUE,
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NEON_CHECK_CC | NEON_CHECK_ARCH))
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return;
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}
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else if (mode == neon_cvt_mode_n)
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@ -18672,8 +18679,8 @@ do_neon_cvt_1 (enum neon_cvt_mode mode)
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|| flavour == neon_cvt_flavour_s32_f32
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|| flavour == neon_cvt_flavour_u32_f32))
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{
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if (check_simd_pred_availability (1,
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NEON_CHECK_CC | NEON_CHECK_ARCH8))
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if (!check_simd_pred_availability (TRUE,
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NEON_CHECK_CC | NEON_CHECK_ARCH8))
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return;
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}
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else if (mode == neon_cvt_mode_z
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@ -18686,8 +18693,8 @@ do_neon_cvt_1 (enum neon_cvt_mode mode)
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|| flavour == neon_cvt_flavour_s32_f32
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|| flavour == neon_cvt_flavour_u32_f32))
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{
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if (check_simd_pred_availability (1,
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NEON_CHECK_CC | NEON_CHECK_ARCH))
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if (!check_simd_pred_availability (TRUE,
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NEON_CHECK_CC | NEON_CHECK_ARCH))
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return;
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}
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/* fall through. */
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@ -18696,8 +18703,8 @@ do_neon_cvt_1 (enum neon_cvt_mode mode)
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{
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NEON_ENCODE (FLOAT, inst);
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if (check_simd_pred_availability (1,
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NEON_CHECK_CC | NEON_CHECK_ARCH8))
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if (!check_simd_pred_availability (TRUE,
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NEON_CHECK_CC | NEON_CHECK_ARCH8))
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return;
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inst.instruction |= LOW4 (inst.operands[0].reg) << 12;
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@ -18857,7 +18864,7 @@ do_neon_cvttb_1 (bfd_boolean t)
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else if (rs == NS_QQ || rs == NS_QQI)
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{
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int single_to_half = 0;
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if (check_simd_pred_availability (1, NEON_CHECK_ARCH))
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if (!check_simd_pred_availability (TRUE, NEON_CHECK_ARCH))
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return;
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enum neon_cvt_flavour flavour = get_neon_cvt_flavour (rs);
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@ -18997,7 +19004,7 @@ neon_move_immediate (void)
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static void
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do_neon_mvn (void)
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{
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if (check_simd_pred_availability (0, NEON_CHECK_CC | NEON_CHECK_ARCH))
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if (!check_simd_pred_availability (FALSE, NEON_CHECK_CC | NEON_CHECK_ARCH))
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return;
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if (inst.operands[1].isreg)
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@ -19341,7 +19348,7 @@ do_neon_ext (void)
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static void
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do_neon_rev (void)
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{
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if (check_simd_pred_availability (0, NEON_CHECK_ARCH | NEON_CHECK_CC))
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if (!check_simd_pred_availability (FALSE, NEON_CHECK_ARCH | NEON_CHECK_CC))
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return;
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enum neon_shape rs;
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@ -19406,7 +19413,7 @@ do_neon_dup (void)
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N_8 | N_16 | N_32 | N_KEY, N_EQK);
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if (rs == NS_QR)
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{
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if (check_simd_pred_availability (0, NEON_CHECK_ARCH))
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if (!check_simd_pred_availability (FALSE, NEON_CHECK_ARCH))
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return;
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}
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else
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@ -19572,7 +19579,8 @@ do_neon_mov (void)
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case NS_QQ: /* case 0/1. */
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{
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if (check_simd_pred_availability (0, NEON_CHECK_CC | NEON_CHECK_ARCH))
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if (!check_simd_pred_availability (FALSE,
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NEON_CHECK_CC | NEON_CHECK_ARCH))
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return;
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/* The architecture manual I have doesn't explicitly state which
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value the U bit should have for register->register moves, but
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@ -19602,7 +19610,8 @@ do_neon_mov (void)
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/* fall through. */
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case NS_QI: /* case 2/3. */
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if (check_simd_pred_availability (0, NEON_CHECK_CC | NEON_CHECK_ARCH))
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if (!check_simd_pred_availability (FALSE,
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NEON_CHECK_CC | NEON_CHECK_ARCH))
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return;
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inst.instruction = 0x0800010;
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neon_move_immediate ();
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@ -19907,7 +19916,7 @@ do_mve_movl (void)
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static void
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do_neon_rshift_round_imm (void)
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{
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if (check_simd_pred_availability (0, NEON_CHECK_ARCH | NEON_CHECK_CC))
|
||||
if (!check_simd_pred_availability (FALSE, NEON_CHECK_ARCH | NEON_CHECK_CC))
|
||||
return;
|
||||
|
||||
enum neon_shape rs;
|
||||
|
|
@ -20004,7 +20013,7 @@ do_neon_zip_uzp (void)
|
|||
static void
|
||||
do_neon_sat_abs_neg (void)
|
||||
{
|
||||
if (check_simd_pred_availability (0, NEON_CHECK_CC | NEON_CHECK_ARCH))
|
||||
if (!check_simd_pred_availability (FALSE, NEON_CHECK_CC | NEON_CHECK_ARCH))
|
||||
return;
|
||||
|
||||
enum neon_shape rs;
|
||||
|
|
@ -20040,7 +20049,7 @@ do_neon_recip_est (void)
|
|||
static void
|
||||
do_neon_cls (void)
|
||||
{
|
||||
if (check_simd_pred_availability (0, NEON_CHECK_ARCH | NEON_CHECK_CC))
|
||||
if (!check_simd_pred_availability (FALSE, NEON_CHECK_ARCH | NEON_CHECK_CC))
|
||||
return;
|
||||
|
||||
enum neon_shape rs;
|
||||
|
|
@ -20057,7 +20066,7 @@ do_neon_cls (void)
|
|||
static void
|
||||
do_neon_clz (void)
|
||||
{
|
||||
if (check_simd_pred_availability (0, NEON_CHECK_ARCH | NEON_CHECK_CC))
|
||||
if (!check_simd_pred_availability (FALSE, NEON_CHECK_ARCH | NEON_CHECK_CC))
|
||||
return;
|
||||
|
||||
enum neon_shape rs;
|
||||
|
|
@ -20610,7 +20619,7 @@ do_vmaxnm (void)
|
|||
if (try_vfp_nsyn (3, do_vfp_nsyn_fpv8) == SUCCESS)
|
||||
return;
|
||||
|
||||
if (check_simd_pred_availability (1, NEON_CHECK_CC | NEON_CHECK_ARCH8))
|
||||
if (!check_simd_pred_availability (TRUE, NEON_CHECK_CC | NEON_CHECK_ARCH8))
|
||||
return;
|
||||
|
||||
neon_dyadic_misc (NT_untyped, N_F_16_32, 0);
|
||||
|
|
@ -20674,7 +20683,8 @@ do_vrint_1 (enum neon_cvt_mode mode)
|
|||
if (et.type == NT_invtype)
|
||||
return;
|
||||
|
||||
if (check_simd_pred_availability (1, NEON_CHECK_CC | NEON_CHECK_ARCH8))
|
||||
if (!check_simd_pred_availability (TRUE,
|
||||
NEON_CHECK_CC | NEON_CHECK_ARCH8))
|
||||
return;
|
||||
|
||||
NEON_ENCODE (FLOAT, inst);
|
||||
|
|
@ -20777,7 +20787,8 @@ do_vcmla (void)
|
|||
_("immediate out of range"));
|
||||
rot /= 90;
|
||||
|
||||
if (check_simd_pred_availability (1, NEON_CHECK_ARCH8 | NEON_CHECK_CC))
|
||||
if (!check_simd_pred_availability (TRUE,
|
||||
NEON_CHECK_ARCH8 | NEON_CHECK_CC))
|
||||
return;
|
||||
|
||||
if (inst.operands[2].isscalar)
|
||||
|
|
@ -20854,8 +20865,8 @@ do_vcadd (void)
|
|||
if (et.type == NT_invtype)
|
||||
return;
|
||||
|
||||
if (check_simd_pred_availability (et.type == NT_float, NEON_CHECK_ARCH8
|
||||
| NEON_CHECK_CC))
|
||||
if (!check_simd_pred_availability (et.type == NT_float,
|
||||
NEON_CHECK_ARCH8 | NEON_CHECK_CC))
|
||||
return;
|
||||
|
||||
if (et.type == NT_float)
|
||||
|
|
|
|||
Loading…
Reference in New Issue