Make ARMv8-M GAS tests pass on non ELF targets

2016-05-17  Thomas Preud'homme  <thomas.preudhomme@arm.com>

gas/
	* testsuite/gas/arm/archv8m-cmse-msr-base.d: Force Thumb when
	disassembling and stop skipping targets.
	* testsuite/gas/arm/archv8m-cmse-msr-main.d: Likewise.
	* testsuite/gas/arm/archv8m-main-dsp-4.d: Likewise.
	* testsuite/gas/arm/archv8m-base.d: Also allow nops after the last
	instruction for targets that have stronger alignment requirement.
	* testsuite/gas/arm/archv8m-cmse-base.d: Likewise.
	* testsuite/gas/arm/archv8m-cmse-main-1.d: Likewise.
	* testsuite/gas/arm/archv8m-cmse-main-2.d: Likewise.
	* testsuite/gas/arm/archv8m-main-dsp-1.d: Likewise.
	* testsuite/gas/arm/archv8m-main-dsp-2.d: Likewise.
	* testsuite/gas/arm/archv8m-main-dsp-3.d: Likewise.
	* testsuite/gas/arm/archv8m-main.d: Likewise.
	* testsuite/gas/arm/archv8m.s: Add label.
	* testsuite/gas/arm/archv8m-cmse.s: Likewise.
	* testsuite/gas/arm/archv8m-cmse-msr.s: Likewise.
	* testsuite/gas/arm/archv8m-cmse-main.s: Likewise.
This commit is contained in:
Thomas Preud'homme 2016-05-17 16:35:12 +01:00
parent 1bdc036f25
commit 659f032c0a
16 changed files with 43 additions and 22 deletions

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@ -1,3 +1,23 @@
2016-05-17 Thomas Preud'homme <thomas.preudhomme@arm.com>
* testsuite/gas/arm/archv8m-cmse-msr-base.d: Force Thumb when
disassembling and stop skipping targets.
* testsuite/gas/arm/archv8m-cmse-msr-main.d: Likewise.
* testsuite/gas/arm/archv8m-main-dsp-4.d: Likewise.
* testsuite/gas/arm/archv8m-base.d: Also allow nops after the last
instruction for targets that have stronger alignment requirement.
* testsuite/gas/arm/archv8m-cmse-base.d: Likewise.
* testsuite/gas/arm/archv8m-cmse-main-1.d: Likewise.
* testsuite/gas/arm/archv8m-cmse-main-2.d: Likewise.
* testsuite/gas/arm/archv8m-main-dsp-1.d: Likewise.
* testsuite/gas/arm/archv8m-main-dsp-2.d: Likewise.
* testsuite/gas/arm/archv8m-main-dsp-3.d: Likewise.
* testsuite/gas/arm/archv8m-main.d: Likewise.
* testsuite/gas/arm/archv8m.s: Add label.
* testsuite/gas/arm/archv8m-cmse.s: Likewise.
* testsuite/gas/arm/archv8m-cmse-msr.s: Likewise.
* testsuite/gas/arm/archv8m-cmse-main.s: Likewise.
2016-05-16 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
* config/tc-m32r.c (mach_table): Make static and const.

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@ -1,8 +1,7 @@
#name: ARM V8-M baseline instructions
#source: archv8m.s
#as: -march=armv8-m.base
#objdump: -dr --prefix-addresses --show-raw-insn
#skip: *-*-pe *-wince-* *-*-coff
#objdump: -dr --prefix-addresses --show-raw-insn -M force-thumb
.*: +file format .*arm.*
@ -46,3 +45,4 @@ Disassembly of section .text:
0+.* <[^>]*> e8c2 1fe0 stlex r0, r1, \[r2\]
0+.* <[^>]*> e8c2 1fc0 stlexb r0, r1, \[r2\]
0+.* <[^>]*> e8c2 1fd0 stlexh r0, r1, \[r2\]
#...

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@ -1,8 +1,7 @@
#name: ARMv8-M Baseline Security Extensions instructions
#source: archv8m-cmse.s
#as: -march=armv8-m.base
#objdump: -dr --prefix-addresses --show-raw-insn
#skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
#objdump: -dr --prefix-addresses --show-raw-insn -M force-thumb
.*: +file format .*arm.*
@ -16,3 +15,4 @@ Disassembly of section .text:
0+.* <[^>]*> e849 f880 tta r8, r9
0+.* <[^>]*> e841 f0c0 ttat r0, r1
0+.* <[^>]*> e849 f8c0 ttat r8, r9
#...

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@ -1,8 +1,7 @@
#name: ARMv8-M Mainline Security Extensions instructions (1)
#source: archv8m-cmse.s
#as: -march=armv8-m.main
#objdump: -dr --prefix-addresses --show-raw-insn
#skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
#objdump: -dr --prefix-addresses --show-raw-insn -M force-thumb
.*: +file format .*arm.*
@ -16,3 +15,4 @@ Disassembly of section .text:
0+.* <[^>]*> e849 f880 tta r8, r9
0+.* <[^>]*> e841 f0c0 ttat r0, r1
0+.* <[^>]*> e849 f8c0 ttat r8, r9
#...

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@ -1,11 +1,11 @@
#name: ARMv8-M Mainline Security Extensions instructions (2)
#source: archv8m-cmse-main.s
#as: -march=armv8-m.main
#objdump: -dr --prefix-addresses --show-raw-insn
#skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
#objdump: -dr --prefix-addresses --show-raw-insn -M force-thumb
.*: +file format .*arm.*
Disassembly of section .text:
0+.* <[^>]*> ec31 0a00 vlldm r1
0+.* <[^>]*> ec22 0a00 vlstm r2
#...

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@ -1,5 +1,6 @@
.thumb
.syntax unified
T:
vlldm r1
vlstm r2

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@ -1,8 +1,7 @@
#name: ARMv8-M Baseline Security Extensions MSR/MRS instructions
#source: archv8m-cmse-msr.s
#as: -march=armv8-m.base
#objdump: -dr --prefix-addresses --show-raw-insn
#skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
#objdump: -dr --prefix-addresses --show-raw-insn -M force-thumb
.*: +file format .*arm.*

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@ -1,8 +1,7 @@
#name: ARMv8-M Mainline Security Extensions MSR/MRS instructions
#source: archv8m-cmse-msr.s
#as: -march=armv8-m.main
#objdump: -dr --prefix-addresses --show-raw-insn
#skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
#objdump: -dr --prefix-addresses --show-raw-insn -M force-thumb
.*: +file format .*arm.*

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@ -1,3 +1,4 @@
T:
msr MSP, r0
msr MSP_S, r0
msr MSP_NS, r0

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@ -1,6 +1,7 @@
.thumb
.syntax unified
T:
sg
blxns r4
blxns r9

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@ -1,8 +1,7 @@
#name: ARMv8-M Mainline with DSP instructions (base)
#source: archv8m.s
#as: -march=armv8-m.main+dsp
#objdump: -dr --prefix-addresses --show-raw-insn
#skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
#objdump: -dr --prefix-addresses --show-raw-insn -M force-thumb
.*: +file format .*arm.*
@ -46,3 +45,4 @@ Disassembly of section .text:
0+.* <[^>]*> e8c2 1fe0 stlex r0, r1, \[r2\]
0+.* <[^>]*> e8c2 1fc0 stlexb r0, r1, \[r2\]
0+.* <[^>]*> e8c2 1fd0 stlexh r0, r1, \[r2\]
#...

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@ -1,8 +1,7 @@
#name: ARMv8-M Mainline with DSP instructions (Security Extensions 1)
#source: archv8m-cmse.s
#as: -march=armv8-m.main+dsp
#objdump: -dr --prefix-addresses --show-raw-insn
#skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
#objdump: -dr --prefix-addresses --show-raw-insn -M force-thumb
.*: +file format .*arm.*
@ -16,3 +15,4 @@ Disassembly of section .text:
0+.* <[^>]*> e849 f880 tta r8, r9
0+.* <[^>]*> e841 f0c0 ttat r0, r1
0+.* <[^>]*> e849 f8c0 ttat r8, r9
#...

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@ -1,11 +1,11 @@
#name: ARMv8-M Mainline with DSP instructions (Security Extensions 2)
#source: archv8m-cmse-main.s
#as: -march=armv8-m.main+dsp
#objdump: -dr --prefix-addresses --show-raw-insn
#skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
#objdump: -dr --prefix-addresses --show-raw-insn -M force-thumb
.*: +file format .*arm.*
Disassembly of section .text:
0+.* <[^>]*> ec31 0a00 vlldm r1
0+.* <[^>]*> ec22 0a00 vlstm r2
#...

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@ -1,8 +1,7 @@
#name: ARMv8-M Mainline with DSP instructions (Security Extensions 3)
#source: archv8m-cmse-msr.s
#as: -march=armv8-m.main+dsp
#objdump: -dr --prefix-addresses --show-raw-insn
#skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
#objdump: -dr --prefix-addresses --show-raw-insn -M force-thumb
.*: +file format .*arm.*

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@ -1,8 +1,7 @@
#name: ARM V8-M mainline instructions
#source: archv8m.s
#as: -march=armv8-m.main
#objdump: -dr --prefix-addresses --show-raw-insn
#skip: *-*-pe *-wince-* *-*-coff
#objdump: -dr --prefix-addresses --show-raw-insn -M force-thumb
.*: +file format .*arm.*
@ -46,3 +45,4 @@ Disassembly of section .text:
0+.* <[^>]*> e8c2 1fe0 stlex r0, r1, \[r2\]
0+.* <[^>]*> e8c2 1fc0 stlexb r0, r1, \[r2\]
0+.* <[^>]*> e8c2 1fd0 stlexh r0, r1, \[r2\]
#...

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@ -1,6 +1,7 @@
.thumb
.syntax unified
T:
blx r4
blx r9
bx r4