* arm-tdep.h (struct gdbarch_tdep): Add fields for breakpoint
descriptions. * arm-tdep.c (arm_default_arm_le_breakpoint) (arm_default_arm_be_breakpoint, arm_default_thumb_le_breakpoint) (arm_default_thumb_be_breakpoint): New. Initialize them from traditional breakpoint defines. (arm_breakpoint_from_pc): Use new gdbarch_tdep entries. (arm_gdbarch_init): Initialize new breakpoint variables. * arm-linux-tdep.c (arm_linux_arm_le_breakpoint): New. (arm_linux_init_abi): Initialize linux-specific breakpoint. * armnbsd-tdep.c (arm_nbsd_arm_le_breakpoint): New. (arm_netbsd_aout_init_abi, arm_netbsd_elf_init_abi): Split common code out to ... (arm_netbsd_init_abi_common): ... here; new function. * config/arm/tm-arm.h (ARM_LE_BREAKPOINT, ARM_BE_BREAKPOINT) (THUMB_LE_BREAKPOINT, THUMB_BE_BREAKPOINT): Delete. * config/arm/tm-linux.h (ARM_LE_BREAKPOINT): Delete. * config/arm/tm-nbsd.h (ARM_LE_BREAKPOINT): Delete.
This commit is contained in:
parent
97e03143bb
commit
66e810cd09
@ -1,3 +1,24 @@
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2002-02-15 Richard Earnshaw <rearnsha@arm.com>
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* arm-tdep.h (struct gdbarch_tdep): Add fields for breakpoint
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descriptions.
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* arm-tdep.c (arm_default_arm_le_breakpoint)
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(arm_default_arm_be_breakpoint, arm_default_thumb_le_breakpoint)
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(arm_default_thumb_be_breakpoint): New. Initialize them from
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traditional breakpoint defines.
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(arm_breakpoint_from_pc): Use new gdbarch_tdep entries.
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(arm_gdbarch_init): Initialize new breakpoint variables.
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* arm-linux-tdep.c (arm_linux_arm_le_breakpoint): New.
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(arm_linux_init_abi): Initialize linux-specific breakpoint.
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* armnbsd-tdep.c (arm_nbsd_arm_le_breakpoint): New.
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(arm_netbsd_aout_init_abi, arm_netbsd_elf_init_abi): Split common
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code out to ...
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(arm_netbsd_init_abi_common): ... here; new function.
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* config/arm/tm-arm.h (ARM_LE_BREAKPOINT, ARM_BE_BREAKPOINT)
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(THUMB_LE_BREAKPOINT, THUMB_BE_BREAKPOINT): Delete.
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* config/arm/tm-linux.h (ARM_LE_BREAKPOINT): Delete.
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* config/arm/tm-nbsd.h (ARM_LE_BREAKPOINT): Delete.
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2002-02-15 Richard Earnshaw <rearnsha@arm.com>
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* arm-tdep.h (enum arm_abi): New enum.
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@ -35,6 +35,15 @@
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#include "symfile.h"
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#include "objfiles.h"
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/* Under ARM Linux the traditional way of performing a breakpoint is to
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execute a particular software interrupt, rather than use a particular
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undefined instruction to provoke a trap. Upon exection of the software
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interrupt the kernel stops the inferior with a SIGTRAP, and wakes the
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debugger. Since ARM Linux is little endian, and doesn't support Thumb
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at the moment we only override the ARM little-endian breakpoint. */
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static const char arm_linux_arm_le_breakpoint[] = {0x01,0x00,0x9f,0xef};
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/* CALL_DUMMY_WORDS:
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This sequence of words is the instructions
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@ -537,6 +546,8 @@ arm_linux_init_abi (struct gdbarch_info info,
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struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
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tdep->lowest_pc = 0x8000;
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tdep->arm_breakpoint = arm_linux_arm_le_breakpoint;
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tdep->arm_breakpoint_size = sizeof (arm_linux_arm_le_breakpoint);
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}
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void
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@ -2044,6 +2044,56 @@ gdb_print_insn_arm (bfd_vma memaddr, disassemble_info *info)
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return print_insn_little_arm (memaddr, info);
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}
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/* The following define instruction sequences that will cause ARM
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cpu's to take an undefined instruction trap. These are used to
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signal a breakpoint to GDB.
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The newer ARMv4T cpu's are capable of operating in ARM or Thumb
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modes. A different instruction is required for each mode. The ARM
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cpu's can also be big or little endian. Thus four different
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instructions are needed to support all cases.
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Note: ARMv4 defines several new instructions that will take the
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undefined instruction trap. ARM7TDMI is nominally ARMv4T, but does
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not in fact add the new instructions. The new undefined
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instructions in ARMv4 are all instructions that had no defined
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behaviour in earlier chips. There is no guarantee that they will
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raise an exception, but may be treated as NOP's. In practice, it
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may only safe to rely on instructions matching:
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3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1
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1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
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C C C C 0 1 1 x x x x x x x x x x x x x x x x x x x x 1 x x x x
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Even this may only true if the condition predicate is true. The
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following use a condition predicate of ALWAYS so it is always TRUE.
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There are other ways of forcing a breakpoint. GNU/Linux, RISC iX,
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and NetBSD all use a software interrupt rather than an undefined
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instruction to force a trap. This can be handled by by the
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abi-specific code during establishment of the gdbarch vector. */
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/* XXX for now we allow a non-multi-arch gdb to override these
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definitions. */
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#ifndef ARM_LE_BREAKPOINT
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#define ARM_LE_BREAKPOINT {0xFE,0xDE,0xFF,0xE7}
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#endif
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#ifndef ARM_BE_BREAKPOINT
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#define ARM_BE_BREAKPOINT {0xE7,0xFF,0xDE,0xFE}
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#endif
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#ifndef THUMB_LE_BREAKPOINT
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#define THUMB_LE_BREAKPOINT {0xfe,0xdf}
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#endif
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#ifndef THUMB_BE_BREAKPOINT
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#define THUMB_BE_BREAKPOINT {0xdf,0xfe}
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#endif
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static const char arm_default_arm_le_breakpoint[] = ARM_LE_BREAKPOINT;
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static const char arm_default_arm_be_breakpoint[] = ARM_BE_BREAKPOINT;
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static const char arm_default_thumb_le_breakpoint[] = THUMB_LE_BREAKPOINT;
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static const char arm_default_thumb_be_breakpoint[] = THUMB_BE_BREAKPOINT;
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/* Determine the type and size of breakpoint to insert at PCPTR. Uses
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the program counter value to determine whether a 16-bit or 32-bit
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breakpoint should be used. It returns a pointer to a string of
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@ -2060,37 +2110,18 @@ gdb_print_insn_arm (bfd_vma memaddr, disassemble_info *info)
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unsigned char *
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arm_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
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{
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struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
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if (arm_pc_is_thumb (*pcptr) || arm_pc_is_thumb_dummy (*pcptr))
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{
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if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
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{
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static char thumb_breakpoint[] = THUMB_BE_BREAKPOINT;
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*pcptr = UNMAKE_THUMB_ADDR (*pcptr);
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*lenptr = sizeof (thumb_breakpoint);
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return thumb_breakpoint;
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}
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else
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{
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static char thumb_breakpoint[] = THUMB_LE_BREAKPOINT;
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*pcptr = UNMAKE_THUMB_ADDR (*pcptr);
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*lenptr = sizeof (thumb_breakpoint);
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return thumb_breakpoint;
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}
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*pcptr = UNMAKE_THUMB_ADDR (*pcptr);
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*lenptr = tdep->thumb_breakpoint_size;
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return tdep->thumb_breakpoint;
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}
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else
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{
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if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
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{
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static char arm_breakpoint[] = ARM_BE_BREAKPOINT;
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*lenptr = sizeof (arm_breakpoint);
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return arm_breakpoint;
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}
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else
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{
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static char arm_breakpoint[] = ARM_LE_BREAKPOINT;
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*lenptr = sizeof (arm_breakpoint);
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return arm_breakpoint;
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}
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*lenptr = tdep->arm_breakpoint_size;
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return tdep->arm_breakpoint;
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}
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}
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@ -2710,21 +2741,33 @@ arm_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
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tdep->abi_name = "<invalid>";
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}
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/* Floating point sizes and format. */
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/* Breakpoints and floating point sizes and format. */
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switch (info.byte_order)
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{
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case BFD_ENDIAN_BIG:
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tdep->arm_breakpoint = arm_default_arm_be_breakpoint;
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tdep->arm_breakpoint_size = sizeof (arm_default_arm_be_breakpoint);
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tdep->thumb_breakpoint = arm_default_thumb_be_breakpoint;
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tdep->thumb_breakpoint_size = sizeof (arm_default_thumb_be_breakpoint);
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set_gdbarch_float_format (gdbarch, &floatformat_ieee_single_big);
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set_gdbarch_double_format (gdbarch, &floatformat_ieee_double_big);
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set_gdbarch_long_double_format (gdbarch, &floatformat_ieee_double_big);
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break;
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case BFD_ENDIAN_LITTLE:
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tdep->arm_breakpoint = arm_default_arm_le_breakpoint;
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tdep->arm_breakpoint_size = sizeof (arm_default_arm_le_breakpoint);
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tdep->thumb_breakpoint = arm_default_thumb_le_breakpoint;
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tdep->thumb_breakpoint_size = sizeof (arm_default_thumb_le_breakpoint);
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set_gdbarch_float_format (gdbarch, &floatformat_ieee_single_little);
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set_gdbarch_double_format (gdbarch,
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&floatformat_ieee_double_littlebyte_bigword);
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set_gdbarch_long_double_format (gdbarch,
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&floatformat_ieee_double_littlebyte_bigword);
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break;
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default:
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const char *abi_name; /* Name of the above. */
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CORE_ADDR lowest_pc; /* Lowest address at which instructions
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will appear. */
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const char *arm_breakpoint;
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int arm_breakpoint_size;
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const char *thumb_breakpoint;
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int thumb_breakpoint_size;
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};
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#ifndef LOWEST_PC
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gdb/armnbsd-tdep.c
Normal file
59
gdb/armnbsd-tdep.c
Normal file
@ -0,0 +1,59 @@
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/* Target-specific functions for ARM running under NetBSD.
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Copyright 2002 Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330,
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Boston, MA 02111-1307, USA. */
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#include "defs.h"
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#include "arm-tdep.h"
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/* For compatibility with previous implemenations of GDB on arm/NetBSD,
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override the default little-endian breakpoint. */
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static const char arm_nbsd_arm_le_breakpoint[] = {0x11, 0x00, 0x00, 0xe6};
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static void
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arm_netbsd_init_abi_common (struct gdbarch_info info,
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struct gdbarch *gdbarch)
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{
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struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
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tdep->lowest_pc = 0x8000;
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tdep->arm_breakpoint = arm_nbsd_arm_le_breakpoint;
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tdep->arm_breakpoint_size = sizeof (arm_nbsd_arm_le_breakpoint);
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}
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static void
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arm_netbsd_aout_init_abi (struct gdbarch_info info,
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struct gdbarch *gdbarch)
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{
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arm_netbsd_init_abi_common (info, gdbarch);
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}
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static void
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arm_netbsd_elf_init_abi (struct gdbarch_info info,
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struct gdbarch *gdbarch)
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{
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arm_netbsd_init_abi_common (info, gdbarch);
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}
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void
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_initialize_arm_netbsd_tdep (void)
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{
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arm_gdbarch_register_os_abi (ARM_ABI_NETBSD_AOUT, arm_netbsd_aout_init_abi);
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arm_gdbarch_register_os_abi (ARM_ABI_NETBSD_ELF, arm_netbsd_elf_init_abi);
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}
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#define GDB_MULTI_ARCH 1
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#endif
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/* The following define instruction sequences that will cause ARM
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cpu's to take an undefined instruction trap. These are used to
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signal a breakpoint to GDB.
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The newer ARMv4T cpu's are capable of operating in ARM or Thumb
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modes. A different instruction is required for each mode. The ARM
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cpu's can also be big or little endian. Thus four different
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instructions are needed to support all cases.
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Note: ARMv4 defines several new instructions that will take the
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undefined instruction trap. ARM7TDMI is nominally ARMv4T, but does
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not in fact add the new instructions. The new undefined
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instructions in ARMv4 are all instructions that had no defined
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behaviour in earlier chips. There is no guarantee that they will
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raise an exception, but may be treated as NOP's. In practice, it
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may only safe to rely on instructions matching:
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3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1
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1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
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C C C C 0 1 1 x x x x x x x x x x x x x x x x x x x x 1 x x x x
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Even this may only true if the condition predicate is true. The
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following use a condition predicate of ALWAYS so it is always TRUE.
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There are other ways of forcing a breakpoint. ARM Linux, RISC iX,
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and NetBSD will all use a software interrupt rather than an
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undefined instruction to force a trap. This can be handled by
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redefining some or all of the following in a target dependent
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fashion. */
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#define ARM_LE_BREAKPOINT {0xFE,0xDE,0xFF,0xE7}
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#define ARM_BE_BREAKPOINT {0xE7,0xFF,0xDE,0xFE}
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#define THUMB_LE_BREAKPOINT {0xfe,0xdf}
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#define THUMB_BE_BREAKPOINT {0xdf,0xfe}
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/* Specify that for the native compiler variables for a particular
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lexical context are listed after the beginning LBRAC instead of
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before in the executables list of symbols. */
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@ -34,16 +34,6 @@
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extern struct link_map_offsets *arm_linux_svr4_fetch_link_map_offsets (void);
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#define SVR4_FETCH_LINK_MAP_OFFSETS() arm_linux_svr4_fetch_link_map_offsets ()
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/* Under ARM Linux the traditional way of performing a breakpoint is to
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execute a particular software interrupt, rather than use a particular
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undefined instruction to provoke a trap. Upon exection of the software
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interrupt the kernel stops the inferior with a SIGTRAP, and wakes the
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debugger. Since ARM Linux is little endian, and doesn't support Thumb
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at the moment we redefined ARM_LE_BREAKPOINT to use the correct software
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interrupt. */
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#undef ARM_LE_BREAKPOINT
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#define ARM_LE_BREAKPOINT {0x01,0x00,0x9f,0xef}
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#undef CALL_DUMMY_WORDS
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#define CALL_DUMMY_WORDS arm_linux_call_dummy_words
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extern LONGEST arm_linux_call_dummy_words[];
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@ -42,11 +42,6 @@ get_longjmp_target (CORE_ADDR *);
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#define GET_LONGJMP_TARGET(ADDR) get_longjmp_target(ADDR)
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/* For compatibility with previous implemenations of GDB on arm/NetBSD,
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override the default little-endian breakpoint. */
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#undef ARM_LE_BREAKPOINT
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#define ARM_LE_BREAKPOINT {0x11, 0x00, 0x00, 0xe6}
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/* By convention, NetBSD uses the "other" register names. */
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#define DEFAULT_REGISTER_NAMES additional_register_names
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|
Loading…
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Reference in New Issue
Block a user