* amd64-tdep.c (struct amd64_register_info): Remove.
(amd64_register_info): Remove. (amd64_register_names): New static variable. (AMD64_NUM_REGS): Use amd64_register_names instead of amd64_register_info. (amd64_register_name): Likewise. (amd64_register_type): Do not refer to amd64_register_info. * s390-tdep.c (struct s390_register_info): Remove. (s390_register_info): Remove. (s390_register_name): Do not refer to s390_register_info. (s390_register_type): Likewise. * sparc64-tdep.c (struct sparc64_register_info): Remove. (sparc64_register_info, sparc64_pseudo_register_info): Remove. (sparc64_register_names, sparc64_pseudo_register_names): New. (SPARC64_NUM_REGS, SPARC64_NUM_PSEUDO_REGS): Use sparc64_register_names and sparc64_pseudo_register_names instead of sparc64_register_info and sparc64_pseudo_register_info. (sparc64_register_name): Likewise. (sparc64_register_type): Do not refer to sparc64_register_info and sparc64_pseudo_register_info.
This commit is contained in:
parent
cad351d11d
commit
6707b003ad
|
@ -1,3 +1,28 @@
|
|||
2007-06-16 Ulrich Weigand <uweigand@de.ibm.com>
|
||||
|
||||
* amd64-tdep.c (struct amd64_register_info): Remove.
|
||||
(amd64_register_info): Remove.
|
||||
(amd64_register_names): New static variable.
|
||||
(AMD64_NUM_REGS): Use amd64_register_names instead of
|
||||
amd64_register_info.
|
||||
(amd64_register_name): Likewise.
|
||||
(amd64_register_type): Do not refer to amd64_register_info.
|
||||
|
||||
* s390-tdep.c (struct s390_register_info): Remove.
|
||||
(s390_register_info): Remove.
|
||||
(s390_register_name): Do not refer to s390_register_info.
|
||||
(s390_register_type): Likewise.
|
||||
|
||||
* sparc64-tdep.c (struct sparc64_register_info): Remove.
|
||||
(sparc64_register_info, sparc64_pseudo_register_info): Remove.
|
||||
(sparc64_register_names, sparc64_pseudo_register_names): New.
|
||||
(SPARC64_NUM_REGS, SPARC64_NUM_PSEUDO_REGS): Use
|
||||
sparc64_register_names and sparc64_pseudo_register_names instead of
|
||||
sparc64_register_info and sparc64_pseudo_register_info.
|
||||
(sparc64_register_name): Likewise.
|
||||
(sparc64_register_type): Do not refer to sparc64_register_info
|
||||
and sparc64_pseudo_register_info.
|
||||
|
||||
2007-06-16 Ulrich Weigand <uweigand@de.ibm.com>
|
||||
|
||||
* c-lang.c (cplus_builtin_types): Remove.
|
||||
|
@ -28,7 +53,6 @@
|
|||
(pascal_language_defn): Set la_language_arch_info member. Do not set
|
||||
la_builtin_type_vector and string_char_type members.
|
||||
|
||||
|
||||
2007-06-16 Ulrich Weigand <uweigand@de.ibm.com>
|
||||
|
||||
* regcache.c (struct regcache): Add ptid_t member.
|
||||
|
|
100
gdb/amd64-tdep.c
100
gdb/amd64-tdep.c
|
@ -51,81 +51,26 @@
|
|||
|
||||
/* Register information. */
|
||||
|
||||
struct amd64_register_info
|
||||
static const char *amd64_register_names[] =
|
||||
{
|
||||
char *name;
|
||||
struct type **type;
|
||||
};
|
||||
|
||||
static struct amd64_register_info const amd64_register_info[] =
|
||||
{
|
||||
{ "rax", &builtin_type_int64 },
|
||||
{ "rbx", &builtin_type_int64 },
|
||||
{ "rcx", &builtin_type_int64 },
|
||||
{ "rdx", &builtin_type_int64 },
|
||||
{ "rsi", &builtin_type_int64 },
|
||||
{ "rdi", &builtin_type_int64 },
|
||||
{ "rbp", &builtin_type_void_data_ptr },
|
||||
{ "rsp", &builtin_type_void_data_ptr },
|
||||
"rax", "rbx", "rcx", "rdx", "rsi", "rdi", "rbp", "rsp",
|
||||
|
||||
/* %r8 is indeed register number 8. */
|
||||
{ "r8", &builtin_type_int64 },
|
||||
{ "r9", &builtin_type_int64 },
|
||||
{ "r10", &builtin_type_int64 },
|
||||
{ "r11", &builtin_type_int64 },
|
||||
{ "r12", &builtin_type_int64 },
|
||||
{ "r13", &builtin_type_int64 },
|
||||
{ "r14", &builtin_type_int64 },
|
||||
{ "r15", &builtin_type_int64 },
|
||||
{ "rip", &builtin_type_void_func_ptr },
|
||||
{ "eflags", &i386_eflags_type },
|
||||
{ "cs", &builtin_type_int32 },
|
||||
{ "ss", &builtin_type_int32 },
|
||||
{ "ds", &builtin_type_int32 },
|
||||
{ "es", &builtin_type_int32 },
|
||||
{ "fs", &builtin_type_int32 },
|
||||
{ "gs", &builtin_type_int32 },
|
||||
"r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
|
||||
"rip", "eflags", "cs", "ss", "ds", "es", "fs", "gs",
|
||||
|
||||
/* %st0 is register number 24. */
|
||||
{ "st0", &builtin_type_i387_ext },
|
||||
{ "st1", &builtin_type_i387_ext },
|
||||
{ "st2", &builtin_type_i387_ext },
|
||||
{ "st3", &builtin_type_i387_ext },
|
||||
{ "st4", &builtin_type_i387_ext },
|
||||
{ "st5", &builtin_type_i387_ext },
|
||||
{ "st6", &builtin_type_i387_ext },
|
||||
{ "st7", &builtin_type_i387_ext },
|
||||
{ "fctrl", &builtin_type_int32 },
|
||||
{ "fstat", &builtin_type_int32 },
|
||||
{ "ftag", &builtin_type_int32 },
|
||||
{ "fiseg", &builtin_type_int32 },
|
||||
{ "fioff", &builtin_type_int32 },
|
||||
{ "foseg", &builtin_type_int32 },
|
||||
{ "fooff", &builtin_type_int32 },
|
||||
{ "fop", &builtin_type_int32 },
|
||||
"st0", "st1", "st2", "st3", "st4", "st5", "st6", "st7",
|
||||
"fctrl", "fstat", "ftag", "fiseg", "fioff", "foseg", "fooff", "fop",
|
||||
|
||||
/* %xmm0 is register number 40. */
|
||||
{ "xmm0", &i386_sse_type },
|
||||
{ "xmm1", &i386_sse_type },
|
||||
{ "xmm2", &i386_sse_type },
|
||||
{ "xmm3", &i386_sse_type },
|
||||
{ "xmm4", &i386_sse_type },
|
||||
{ "xmm5", &i386_sse_type },
|
||||
{ "xmm6", &i386_sse_type },
|
||||
{ "xmm7", &i386_sse_type },
|
||||
{ "xmm8", &i386_sse_type },
|
||||
{ "xmm9", &i386_sse_type },
|
||||
{ "xmm10", &i386_sse_type },
|
||||
{ "xmm11", &i386_sse_type },
|
||||
{ "xmm12", &i386_sse_type },
|
||||
{ "xmm13", &i386_sse_type },
|
||||
{ "xmm14", &i386_sse_type },
|
||||
{ "xmm15", &i386_sse_type },
|
||||
{ "mxcsr", &i386_mxcsr_type }
|
||||
"xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7",
|
||||
"xmm8", "xmm9", "xmm10", "xmm11", "xmm12", "xmm13", "xmm14", "xmm15",
|
||||
"mxcsr",
|
||||
};
|
||||
|
||||
/* Total number of registers. */
|
||||
#define AMD64_NUM_REGS ARRAY_SIZE (amd64_register_info)
|
||||
#define AMD64_NUM_REGS ARRAY_SIZE (amd64_register_names)
|
||||
|
||||
/* Return the name of register REGNUM. */
|
||||
|
||||
|
@ -133,7 +78,7 @@ const char *
|
|||
amd64_register_name (int regnum)
|
||||
{
|
||||
if (regnum >= 0 && regnum < AMD64_NUM_REGS)
|
||||
return amd64_register_info[regnum].name;
|
||||
return amd64_register_names[regnum];
|
||||
|
||||
return NULL;
|
||||
}
|
||||
|
@ -144,9 +89,28 @@ amd64_register_name (int regnum)
|
|||
struct type *
|
||||
amd64_register_type (struct gdbarch *gdbarch, int regnum)
|
||||
{
|
||||
gdb_assert (regnum >= 0 && regnum < AMD64_NUM_REGS);
|
||||
if (regnum >= AMD64_RAX_REGNUM && regnum <= AMD64_RDI_REGNUM)
|
||||
return builtin_type_int64;
|
||||
if (regnum == AMD64_RBP_REGNUM || regnum == AMD64_RSP_REGNUM)
|
||||
return builtin_type_void_data_ptr;
|
||||
if (regnum >= AMD64_R8_REGNUM && regnum <= AMD64_R15_REGNUM)
|
||||
return builtin_type_int64;
|
||||
if (regnum == AMD64_RIP_REGNUM)
|
||||
return builtin_type_void_func_ptr;
|
||||
if (regnum == AMD64_EFLAGS_REGNUM)
|
||||
return i386_eflags_type;
|
||||
if (regnum >= AMD64_CS_REGNUM && regnum <= AMD64_GS_REGNUM)
|
||||
return builtin_type_int32;
|
||||
if (regnum >= AMD64_ST0_REGNUM && regnum <= AMD64_ST0_REGNUM + 7)
|
||||
return builtin_type_i387_ext;
|
||||
if (regnum >= AMD64_FCTRL_REGNUM && regnum <= AMD64_FCTRL_REGNUM + 7)
|
||||
return builtin_type_int32;
|
||||
if (regnum >= AMD64_XMM0_REGNUM && regnum <= AMD64_XMM0_REGNUM + 15)
|
||||
return i386_sse_type;
|
||||
if (regnum == AMD64_MXCSR_REGNUM)
|
||||
return i386_mxcsr_type;
|
||||
|
||||
return *amd64_register_info[regnum].type;
|
||||
internal_error (__FILE__, __LINE__, _("invalid regnum"));
|
||||
}
|
||||
|
||||
/* DWARF Register Number Mapping as defined in the System V psABI,
|
||||
|
|
117
gdb/s390-tdep.c
117
gdb/s390-tdep.c
|
@ -65,97 +65,54 @@ struct gdbarch_tdep
|
|||
};
|
||||
|
||||
|
||||
/* Register information. */
|
||||
|
||||
struct s390_register_info
|
||||
{
|
||||
char *name;
|
||||
struct type **type;
|
||||
};
|
||||
|
||||
static struct s390_register_info s390_register_info[S390_NUM_TOTAL_REGS] =
|
||||
{
|
||||
/* Program Status Word. */
|
||||
{ "pswm", &builtin_type_long },
|
||||
{ "pswa", &builtin_type_long },
|
||||
|
||||
/* General Purpose Registers. */
|
||||
{ "r0", &builtin_type_long },
|
||||
{ "r1", &builtin_type_long },
|
||||
{ "r2", &builtin_type_long },
|
||||
{ "r3", &builtin_type_long },
|
||||
{ "r4", &builtin_type_long },
|
||||
{ "r5", &builtin_type_long },
|
||||
{ "r6", &builtin_type_long },
|
||||
{ "r7", &builtin_type_long },
|
||||
{ "r8", &builtin_type_long },
|
||||
{ "r9", &builtin_type_long },
|
||||
{ "r10", &builtin_type_long },
|
||||
{ "r11", &builtin_type_long },
|
||||
{ "r12", &builtin_type_long },
|
||||
{ "r13", &builtin_type_long },
|
||||
{ "r14", &builtin_type_long },
|
||||
{ "r15", &builtin_type_long },
|
||||
|
||||
/* Access Registers. */
|
||||
{ "acr0", &builtin_type_int },
|
||||
{ "acr1", &builtin_type_int },
|
||||
{ "acr2", &builtin_type_int },
|
||||
{ "acr3", &builtin_type_int },
|
||||
{ "acr4", &builtin_type_int },
|
||||
{ "acr5", &builtin_type_int },
|
||||
{ "acr6", &builtin_type_int },
|
||||
{ "acr7", &builtin_type_int },
|
||||
{ "acr8", &builtin_type_int },
|
||||
{ "acr9", &builtin_type_int },
|
||||
{ "acr10", &builtin_type_int },
|
||||
{ "acr11", &builtin_type_int },
|
||||
{ "acr12", &builtin_type_int },
|
||||
{ "acr13", &builtin_type_int },
|
||||
{ "acr14", &builtin_type_int },
|
||||
{ "acr15", &builtin_type_int },
|
||||
|
||||
/* Floating Point Control Word. */
|
||||
{ "fpc", &builtin_type_int },
|
||||
|
||||
/* Floating Point Registers. */
|
||||
{ "f0", &builtin_type_double },
|
||||
{ "f1", &builtin_type_double },
|
||||
{ "f2", &builtin_type_double },
|
||||
{ "f3", &builtin_type_double },
|
||||
{ "f4", &builtin_type_double },
|
||||
{ "f5", &builtin_type_double },
|
||||
{ "f6", &builtin_type_double },
|
||||
{ "f7", &builtin_type_double },
|
||||
{ "f8", &builtin_type_double },
|
||||
{ "f9", &builtin_type_double },
|
||||
{ "f10", &builtin_type_double },
|
||||
{ "f11", &builtin_type_double },
|
||||
{ "f12", &builtin_type_double },
|
||||
{ "f13", &builtin_type_double },
|
||||
{ "f14", &builtin_type_double },
|
||||
{ "f15", &builtin_type_double },
|
||||
|
||||
/* Pseudo registers. */
|
||||
{ "pc", &builtin_type_void_func_ptr },
|
||||
{ "cc", &builtin_type_int },
|
||||
};
|
||||
|
||||
/* Return the name of register REGNUM. */
|
||||
static const char *
|
||||
s390_register_name (int regnum)
|
||||
{
|
||||
static const char *register_names[S390_NUM_TOTAL_REGS] =
|
||||
{
|
||||
/* Program Status Word. */
|
||||
"pswm", "pswa",
|
||||
/* General Purpose Registers. */
|
||||
"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
|
||||
"r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
|
||||
/* Access Registers. */
|
||||
"acr0", "acr1", "acr2", "acr3", "acr4", "acr5", "acr6", "acr7",
|
||||
"acr8", "acr9", "acr10", "acr11", "acr12", "acr13", "acr14", "acr15",
|
||||
/* Floating Point Control Word. */
|
||||
"fpc",
|
||||
/* Floating Point Registers. */
|
||||
"f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
|
||||
"f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
|
||||
/* Pseudo registers. */
|
||||
"pc", "cc",
|
||||
};
|
||||
|
||||
gdb_assert (regnum >= 0 && regnum < S390_NUM_TOTAL_REGS);
|
||||
return s390_register_info[regnum].name;
|
||||
return register_names[regnum];
|
||||
}
|
||||
|
||||
/* Return the GDB type object for the "standard" data type of data in
|
||||
register REGNUM. */
|
||||
register REGNUM. */
|
||||
static struct type *
|
||||
s390_register_type (struct gdbarch *gdbarch, int regnum)
|
||||
{
|
||||
gdb_assert (regnum >= 0 && regnum < S390_NUM_TOTAL_REGS);
|
||||
return *s390_register_info[regnum].type;
|
||||
if (regnum == S390_PSWM_REGNUM || regnum == S390_PSWA_REGNUM)
|
||||
return builtin_type_long;
|
||||
if (regnum >= S390_R0_REGNUM && regnum <= S390_R15_REGNUM)
|
||||
return builtin_type_long;
|
||||
if (regnum >= S390_A0_REGNUM && regnum <= S390_A15_REGNUM)
|
||||
return builtin_type_int;
|
||||
if (regnum == S390_FPC_REGNUM)
|
||||
return builtin_type_int;
|
||||
if (regnum >= S390_F0_REGNUM && regnum <= S390_F15_REGNUM)
|
||||
return builtin_type_double;
|
||||
if (regnum == S390_PC_REGNUM)
|
||||
return builtin_type_void_func_ptr;
|
||||
if (regnum == S390_CC_REGNUM)
|
||||
return builtin_type_int;
|
||||
|
||||
internal_error (__FILE__, __LINE__, _("invalid regnum"));
|
||||
}
|
||||
|
||||
/* DWARF Register Mapping. */
|
||||
|
|
|
@ -179,181 +179,50 @@ sparc64_init_types (void)
|
|||
|
||||
/* Register information. */
|
||||
|
||||
struct sparc64_register_info
|
||||
static const char *sparc64_register_names[] =
|
||||
{
|
||||
char *name;
|
||||
struct type **type;
|
||||
};
|
||||
"g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7",
|
||||
"o0", "o1", "o2", "o3", "o4", "o5", "sp", "o7",
|
||||
"l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7",
|
||||
"i0", "i1", "i2", "i3", "i4", "i5", "fp", "i7",
|
||||
|
||||
static struct sparc64_register_info sparc64_register_info[] =
|
||||
{
|
||||
{ "g0", &builtin_type_int64 },
|
||||
{ "g1", &builtin_type_int64 },
|
||||
{ "g2", &builtin_type_int64 },
|
||||
{ "g3", &builtin_type_int64 },
|
||||
{ "g4", &builtin_type_int64 },
|
||||
{ "g5", &builtin_type_int64 },
|
||||
{ "g6", &builtin_type_int64 },
|
||||
{ "g7", &builtin_type_int64 },
|
||||
"f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
|
||||
"f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
|
||||
"f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
|
||||
"f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
|
||||
"f32", "f34", "f36", "f38", "f40", "f42", "f44", "f46",
|
||||
"f48", "f50", "f52", "f54", "f56", "f58", "f60", "f62",
|
||||
|
||||
{ "o0", &builtin_type_int64 },
|
||||
{ "o1", &builtin_type_int64 },
|
||||
{ "o2", &builtin_type_int64 },
|
||||
{ "o3", &builtin_type_int64 },
|
||||
{ "o4", &builtin_type_int64 },
|
||||
{ "o5", &builtin_type_int64 },
|
||||
{ "sp", &builtin_type_void_data_ptr },
|
||||
{ "o7", &builtin_type_int64 },
|
||||
|
||||
{ "l0", &builtin_type_int64 },
|
||||
{ "l1", &builtin_type_int64 },
|
||||
{ "l2", &builtin_type_int64 },
|
||||
{ "l3", &builtin_type_int64 },
|
||||
{ "l4", &builtin_type_int64 },
|
||||
{ "l5", &builtin_type_int64 },
|
||||
{ "l6", &builtin_type_int64 },
|
||||
{ "l7", &builtin_type_int64 },
|
||||
|
||||
{ "i0", &builtin_type_int64 },
|
||||
{ "i1", &builtin_type_int64 },
|
||||
{ "i2", &builtin_type_int64 },
|
||||
{ "i3", &builtin_type_int64 },
|
||||
{ "i4", &builtin_type_int64 },
|
||||
{ "i5", &builtin_type_int64 },
|
||||
{ "fp", &builtin_type_void_data_ptr },
|
||||
{ "i7", &builtin_type_int64 },
|
||||
|
||||
{ "f0", &builtin_type_float },
|
||||
{ "f1", &builtin_type_float },
|
||||
{ "f2", &builtin_type_float },
|
||||
{ "f3", &builtin_type_float },
|
||||
{ "f4", &builtin_type_float },
|
||||
{ "f5", &builtin_type_float },
|
||||
{ "f6", &builtin_type_float },
|
||||
{ "f7", &builtin_type_float },
|
||||
{ "f8", &builtin_type_float },
|
||||
{ "f9", &builtin_type_float },
|
||||
{ "f10", &builtin_type_float },
|
||||
{ "f11", &builtin_type_float },
|
||||
{ "f12", &builtin_type_float },
|
||||
{ "f13", &builtin_type_float },
|
||||
{ "f14", &builtin_type_float },
|
||||
{ "f15", &builtin_type_float },
|
||||
{ "f16", &builtin_type_float },
|
||||
{ "f17", &builtin_type_float },
|
||||
{ "f18", &builtin_type_float },
|
||||
{ "f19", &builtin_type_float },
|
||||
{ "f20", &builtin_type_float },
|
||||
{ "f21", &builtin_type_float },
|
||||
{ "f22", &builtin_type_float },
|
||||
{ "f23", &builtin_type_float },
|
||||
{ "f24", &builtin_type_float },
|
||||
{ "f25", &builtin_type_float },
|
||||
{ "f26", &builtin_type_float },
|
||||
{ "f27", &builtin_type_float },
|
||||
{ "f28", &builtin_type_float },
|
||||
{ "f29", &builtin_type_float },
|
||||
{ "f30", &builtin_type_float },
|
||||
{ "f31", &builtin_type_float },
|
||||
{ "f32", &builtin_type_double },
|
||||
{ "f34", &builtin_type_double },
|
||||
{ "f36", &builtin_type_double },
|
||||
{ "f38", &builtin_type_double },
|
||||
{ "f40", &builtin_type_double },
|
||||
{ "f42", &builtin_type_double },
|
||||
{ "f44", &builtin_type_double },
|
||||
{ "f46", &builtin_type_double },
|
||||
{ "f48", &builtin_type_double },
|
||||
{ "f50", &builtin_type_double },
|
||||
{ "f52", &builtin_type_double },
|
||||
{ "f54", &builtin_type_double },
|
||||
{ "f56", &builtin_type_double },
|
||||
{ "f58", &builtin_type_double },
|
||||
{ "f60", &builtin_type_double },
|
||||
{ "f62", &builtin_type_double },
|
||||
|
||||
{ "pc", &builtin_type_void_func_ptr },
|
||||
{ "npc", &builtin_type_void_func_ptr },
|
||||
"pc", "npc",
|
||||
|
||||
/* This raw register contains the contents of %cwp, %pstate, %asi
|
||||
and %ccr as laid out in a %tstate register. */
|
||||
/* FIXME: Give it a name until we start using register groups. */
|
||||
{ "state", &builtin_type_int64 },
|
||||
|
||||
{ "fsr", &sparc64_fsr_type },
|
||||
{ "fprs", &sparc64_fprs_type },
|
||||
|
||||
/* "Although Y is a 64-bit register, its high-order 32 bits are
|
||||
reserved and always read as 0." */
|
||||
{ "y", &builtin_type_int64 }
|
||||
/* FIXME: Give "state" a name until we start using register groups. */
|
||||
"state",
|
||||
"fsr",
|
||||
"fprs",
|
||||
"y",
|
||||
};
|
||||
|
||||
/* Total number of registers. */
|
||||
#define SPARC64_NUM_REGS ARRAY_SIZE (sparc64_register_info)
|
||||
#define SPARC64_NUM_REGS ARRAY_SIZE (sparc64_register_names)
|
||||
|
||||
/* We provide the aliases %d0..%d62 and %q0..%q60 for the floating
|
||||
registers as "psuedo" registers. */
|
||||
|
||||
static struct sparc64_register_info sparc64_pseudo_register_info[] =
|
||||
static const char *sparc64_pseudo_register_names[] =
|
||||
{
|
||||
{ "cwp", &builtin_type_int64 },
|
||||
{ "pstate", &sparc64_pstate_type },
|
||||
{ "asi", &builtin_type_int64 },
|
||||
{ "ccr", &builtin_type_int64 },
|
||||
"cwp", "pstate", "asi", "ccr",
|
||||
|
||||
{ "d0", &builtin_type_double },
|
||||
{ "d2", &builtin_type_double },
|
||||
{ "d4", &builtin_type_double },
|
||||
{ "d6", &builtin_type_double },
|
||||
{ "d8", &builtin_type_double },
|
||||
{ "d10", &builtin_type_double },
|
||||
{ "d12", &builtin_type_double },
|
||||
{ "d14", &builtin_type_double },
|
||||
{ "d16", &builtin_type_double },
|
||||
{ "d18", &builtin_type_double },
|
||||
{ "d20", &builtin_type_double },
|
||||
{ "d22", &builtin_type_double },
|
||||
{ "d24", &builtin_type_double },
|
||||
{ "d26", &builtin_type_double },
|
||||
{ "d28", &builtin_type_double },
|
||||
{ "d30", &builtin_type_double },
|
||||
{ "d32", &builtin_type_double },
|
||||
{ "d34", &builtin_type_double },
|
||||
{ "d36", &builtin_type_double },
|
||||
{ "d38", &builtin_type_double },
|
||||
{ "d40", &builtin_type_double },
|
||||
{ "d42", &builtin_type_double },
|
||||
{ "d44", &builtin_type_double },
|
||||
{ "d46", &builtin_type_double },
|
||||
{ "d48", &builtin_type_double },
|
||||
{ "d50", &builtin_type_double },
|
||||
{ "d52", &builtin_type_double },
|
||||
{ "d54", &builtin_type_double },
|
||||
{ "d56", &builtin_type_double },
|
||||
{ "d58", &builtin_type_double },
|
||||
{ "d60", &builtin_type_double },
|
||||
{ "d62", &builtin_type_double },
|
||||
"d0", "d2", "d4", "d6", "d8", "d10", "d12", "d14",
|
||||
"d16", "d18", "d20", "d22", "d24", "d26", "d28", "d30",
|
||||
"d32", "d34", "d36", "d38", "d40", "d42", "d44", "d46",
|
||||
"d48", "d50", "d52", "d54", "d56", "d58", "d60", "d62",
|
||||
|
||||
{ "q0", &builtin_type_long_double },
|
||||
{ "q4", &builtin_type_long_double },
|
||||
{ "q8", &builtin_type_long_double },
|
||||
{ "q12", &builtin_type_long_double },
|
||||
{ "q16", &builtin_type_long_double },
|
||||
{ "q20", &builtin_type_long_double },
|
||||
{ "q24", &builtin_type_long_double },
|
||||
{ "q28", &builtin_type_long_double },
|
||||
{ "q32", &builtin_type_long_double },
|
||||
{ "q36", &builtin_type_long_double },
|
||||
{ "q40", &builtin_type_long_double },
|
||||
{ "q44", &builtin_type_long_double },
|
||||
{ "q48", &builtin_type_long_double },
|
||||
{ "q52", &builtin_type_long_double },
|
||||
{ "q56", &builtin_type_long_double },
|
||||
{ "q60", &builtin_type_long_double }
|
||||
"q0", "q4", "q8", "q12", "q16", "q20", "q24", "q28",
|
||||
"q32", "q36", "q40", "q44", "q48", "q52", "q56", "q60",
|
||||
};
|
||||
|
||||
/* Total number of pseudo registers. */
|
||||
#define SPARC64_NUM_PSEUDO_REGS ARRAY_SIZE (sparc64_pseudo_register_info)
|
||||
#define SPARC64_NUM_PSEUDO_REGS ARRAY_SIZE (sparc64_pseudo_register_names)
|
||||
|
||||
/* Return the name of register REGNUM. */
|
||||
|
||||
|
@ -361,11 +230,11 @@ static const char *
|
|||
sparc64_register_name (int regnum)
|
||||
{
|
||||
if (regnum >= 0 && regnum < SPARC64_NUM_REGS)
|
||||
return sparc64_register_info[regnum].name;
|
||||
return sparc64_register_names[regnum];
|
||||
|
||||
if (regnum >= SPARC64_NUM_REGS
|
||||
&& regnum < SPARC64_NUM_REGS + SPARC64_NUM_PSEUDO_REGS)
|
||||
return sparc64_pseudo_register_info[regnum - SPARC64_NUM_REGS].name;
|
||||
return sparc64_pseudo_register_names[regnum - SPARC64_NUM_REGS];
|
||||
|
||||
return NULL;
|
||||
}
|
||||
|
@ -376,12 +245,47 @@ sparc64_register_name (int regnum)
|
|||
static struct type *
|
||||
sparc64_register_type (struct gdbarch *gdbarch, int regnum)
|
||||
{
|
||||
if (regnum >= SPARC64_NUM_REGS
|
||||
&& regnum < SPARC64_NUM_REGS + SPARC64_NUM_PSEUDO_REGS)
|
||||
return *sparc64_pseudo_register_info[regnum - SPARC64_NUM_REGS].type;
|
||||
/* Raw registers. */
|
||||
|
||||
gdb_assert (regnum >= 0 && regnum < SPARC64_NUM_REGS);
|
||||
return *sparc64_register_info[regnum].type;
|
||||
if (regnum == SPARC_SP_REGNUM || regnum == SPARC_FP_REGNUM)
|
||||
return builtin_type_void_data_ptr;
|
||||
if (regnum >= SPARC_G0_REGNUM && regnum <= SPARC_I7_REGNUM)
|
||||
return builtin_type_int64;
|
||||
if (regnum >= SPARC_F0_REGNUM && regnum <= SPARC_F31_REGNUM)
|
||||
return builtin_type_float;
|
||||
if (regnum >= SPARC64_F32_REGNUM && regnum <= SPARC64_F62_REGNUM)
|
||||
return builtin_type_double;
|
||||
if (regnum == SPARC64_PC_REGNUM || regnum == SPARC64_NPC_REGNUM)
|
||||
return builtin_type_void_func_ptr;
|
||||
/* This raw register contains the contents of %cwp, %pstate, %asi
|
||||
and %ccr as laid out in a %tstate register. */
|
||||
if (regnum == SPARC64_STATE_REGNUM)
|
||||
return builtin_type_int64;
|
||||
if (regnum == SPARC64_FSR_REGNUM)
|
||||
return sparc64_fsr_type;
|
||||
if (regnum == SPARC64_FPRS_REGNUM)
|
||||
return sparc64_fprs_type;
|
||||
/* "Although Y is a 64-bit register, its high-order 32 bits are
|
||||
reserved and always read as 0." */
|
||||
if (regnum == SPARC64_Y_REGNUM)
|
||||
return builtin_type_int64;
|
||||
|
||||
/* Pseudo registers. */
|
||||
|
||||
if (regnum == SPARC64_CWP_REGNUM)
|
||||
return builtin_type_int64;
|
||||
if (regnum == SPARC64_PSTATE_REGNUM)
|
||||
return sparc64_pstate_type;
|
||||
if (regnum == SPARC64_ASI_REGNUM)
|
||||
return builtin_type_int64;
|
||||
if (regnum == SPARC64_CCR_REGNUM)
|
||||
return builtin_type_int64;
|
||||
if (regnum >= SPARC64_D0_REGNUM && regnum <= SPARC64_D62_REGNUM)
|
||||
return builtin_type_double;
|
||||
if (regnum >= SPARC64_Q0_REGNUM && regnum <= SPARC64_Q60_REGNUM)
|
||||
return builtin_type_long_double;
|
||||
|
||||
internal_error (__FILE__, __LINE__, _("invalid regnum"));
|
||||
}
|
||||
|
||||
static void
|
||||
|
|
Loading…
Reference in New Issue