[PR19620][GAS][AArch64]Remove mov[z,k,n] relocation symbol name restriction.

In AArch64 gas, register name or string starts with valid register name
is not allowed as symbol name for mov[z,k,n] instruction.
This patch removes the restriction.

gas/
	PR gas/19620
	* config/tc-aarch64.c (parse_half): Remove restrictions on symbol name.
	* testsuite/gas/aarch64/movw_label.d: New.
	* testsuite/gas/aarch64/movw_label.s: New.
This commit is contained in:
Renlin Li 2016-02-16 10:00:29 +00:00
parent 64bfc2584c
commit 671eeb286f
4 changed files with 40 additions and 9 deletions

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@ -1,3 +1,10 @@
2016-02-16 Renlin Li <renlin.li@arm.com>
PR gas/19620
* config/tc-aarch64.c (parse_half): Remove restrictions on symbol name.
* testsuite/gas/aarch64/movw_label.d: New.
* testsuite/gas/aarch64/movw_label.s: New.
2016-02-15 Vinay Kumar G. <Vinay.G@kpit.com>
PR gas/19556

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@ -3473,10 +3473,8 @@ parse_address_reloc (char **str, aarch64_opnd_info *operand)
static bfd_boolean
parse_half (char **str, int *internal_fixup_p)
{
char *p, *saved;
int dummy;
char *p = *str;
p = *str;
skip_past_char (&p, '#');
gas_assert (internal_fixup_p);
@ -3506,12 +3504,6 @@ parse_half (char **str, int *internal_fixup_p)
else
*internal_fixup_p = 1;
/* Avoid parsing a register as a general symbol. */
saved = p;
if (aarch64_reg_parse_32_64 (&p, 0, 0, &dummy, &dummy) != PARSE_FAIL)
return FALSE;
p = saved;
if (! my_get_expression (&inst.reloc.exp, &p, GE_NO_PREFIX, 1))
return FALSE;

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@ -0,0 +1,22 @@
#objdump: -dr
#name: movw relocation symbol name
.*: file format .*
Disassembly of section \.text:
0000000000000000 <.*>:
0: f2800002 movk x2, #0x0
0: R_AARCH64_MOVW_UABS_G0_NC x3.22
4: f2800002 movk x2, #0x0
4: R_AARCH64_MOVW_UABS_G0_NC x8
8: f2800002 movk x2, #0x0
8: R_AARCH64_MOVW_UABS_G0_NC w3
c: f2800002 movk x2, #0x0
c: R_AARCH64_MOVW_UABS_G0_NC w8.22
10: f2800002 movk x2, #0x0
10: R_AARCH64_MOVW_UABS_G0_NC sp
14: f2800002 movk x2, #0x0
14: R_AARCH64_MOVW_UABS_G0_NC wzr
18: f2800002 movk x2, #0x0
18: R_AARCH64_MOVW_UABS_G0_NC xzr

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@ -0,0 +1,10 @@
.text
movk x2, #:abs_g0_nc: x3.22
movk x2, #:abs_g0_nc: x8
movk x2, #:abs_g0_nc: w3
movk x2, #:abs_g0_nc: w8.22
movk x2, #:abs_g0_nc: sp
movk x2, #:abs_g0_nc: wzr
movk x2, #:abs_g0_nc: xzr