Fix printf arguments.
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3e87a7603f
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673388c077
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@ -1,3 +1,7 @@
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Tue Jun 13 20:52:07 2000 Andrew Cagney <cagney@b1.cygnus.com>
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* mips.igen (MxC1, DMxC1): Fix printf formatting.
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2000-05-24 Michael Hayes <mhayes@cygnus.com>
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2000-05-24 Michael Hayes <mhayes@cygnus.com>
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* mips.igen (do_dmultx): Fix typo.
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* mips.igen (do_dmultx): Fix typo.
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@ -3034,8 +3034,8 @@
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{
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{
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if (STATE_VERBOSE_P(SD))
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if (STATE_VERBOSE_P(SD))
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sim_io_eprintf (SD,
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sim_io_eprintf (SD,
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"Warning: PC 0x%x: semantic_DMxC1_COP1Sa 32-bit use of odd FPR number\n",
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"Warning: PC 0x%lx: semantic_DMxC1_COP1Sa 32-bit use of odd FPR number\n",
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CIA);
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(long) CIA);
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PENDING_FILL(RT,SET64HI(0xDEADC0DE) | 0xBAD0BAD0);
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PENDING_FILL(RT,SET64HI(0xDEADC0DE) | 0xBAD0BAD0);
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}
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}
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}
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}
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@ -3209,7 +3209,8 @@
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{
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{
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if (STATE_VERBOSE_P(SD))
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if (STATE_VERBOSE_P(SD))
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sim_io_eprintf (SD,
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sim_io_eprintf (SD,
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"Warning: PC 0x%x: MTC1 not DMTC1 with 64 bit regs\n", CIA);
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"Warning: PC 0x%lx: MTC1 not DMTC1 with 64 bit regs\n",
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(long) CIA);
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PENDING_FILL ((FS + FGRIDX), (SET64HI(0xDEADC0DE) | VL4_8(GPR[RT])));
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PENDING_FILL ((FS + FGRIDX), (SET64HI(0xDEADC0DE) | VL4_8(GPR[RT])));
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}
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}
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else
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else
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