* doc/gdb.texinfo (PowerPC): Mention Extended FPR's for POWER7.
(PowerPC features): Mention feature set for VSX registers. * gdbserver/Makefile.in: Add required vsx dependencies. * gdbserver/linux-ppc-low: Define PPC_FEATURE_HAS_VSX. Declare init_registers_powerpc_vsx32l. Declare init_registers_powerpc_vsx64l. Define PTRACE_GETVSXREGS and PTRACE_SETVSXREGS. (ppc_arch_setup): Check for VSX in hwcap. (ppc_fill_vsxregset): New function. (ppc_store_vsxregset): New function. Add new VSX entry in regset_info target_regsets. * gdbserver/configure.srv: Add new VSX dependencies.
This commit is contained in:
Luis Machado
parent
46a9b8ed1b
commit
677c5bb1ab
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@ -1,3 +1,8 @@
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2008-08-18 Luis Machado <luisgpm@br.ibm.com>
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* doc/gdb.texinfo (PowerPC): Mention Extended FPR's for POWER7.
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(PowerPC features): Mention feature set for VSX registers.
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2008-08-13 Joel Brobecker <brobecker@adacore.com>
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* gdb.texinfo (Ada Mode Intro): Improve the documentation regarding
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@ -16427,6 +16427,9 @@ The pseudo-registers go from @code{$dl0} through @code{$dl15}, and are formed
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by joining the even/odd register pairs @code{f0} and @code{f1} for @code{$dl0},
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@code{f2} and @code{f3} for @code{$dl1} and so on.
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For POWER7 processors, @value{GDB} provides a set of pseudo-registers, the 64-bit
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wide Extended Floating Point Registers (@samp{f32} through @samp{f63}).
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@node Controlling GDB
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@chapter Controlling @value{GDBN}
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@ -27865,6 +27868,13 @@ The @samp{org.gnu.gdb.power.altivec} feature is optional. It should
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contain registers @samp{vr0} through @samp{vr31}, @samp{vscr},
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and @samp{vrsave}.
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The @samp{org.gnu.gdb.power.vsx} feature is optional. It should
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contain registers @samp{vs0h} through @samp{vs31h}. @value{GDBN}
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will combine these registers with the floating point registers
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(@samp{f0} through @samp{f31}) and the altivec registers (@samp{vr0}
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through @samp{vr31}} to present the 128-bit wide registers @samp{vs0}
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through @samp{vs63}, the set of vector registers for POWER7.
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The @samp{org.gnu.gdb.power.spe} feature is optional. It should
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contain registers @samp{ev0h} through @samp{ev31h}, @samp{acc}, and
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@samp{spefscr}. SPE targets should provide 32-bit registers in
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@ -1,3 +1,18 @@
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2008-08-18 Luis Machado <luisgpm@br.ibm.com>
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* Makefile.in: Add required vsx dependencies.
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* linux-ppc-low: Define PPC_FEATURE_HAS_VSX.
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Declare init_registers_powerpc_vsx32l.
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Declare init_registers_powerpc_vsx64l.
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Define PTRACE_GETVSXREGS and PTRACE_SETVSXREGS.
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(ppc_arch_setup): Check for VSX in hwcap.
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(ppc_fill_vsxregset): New function.
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(ppc_store_vsxregset): New function.
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Add new VSX entry in regset_info target_regsets.
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* configure.srv: Add new VSX dependencies.
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2008-08-12 Pedro Alves <pedro@codesourcery.com>
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* remote-utils.c (noack_mode, transport_is_reliable): New globals.
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@ -224,8 +224,8 @@ clean:
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rm -f reg-cris.c reg-crisv32.c reg-x86-64-linux.c reg-xtensa.c
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rm -f arm-with-iwmmxt.c mips-linux.c mips64-linux.c
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rm -f powerpc-32l.c powerpc-64l.c powerpc-e500l.c
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rm -f powerpc-altivec32l.c powerpc-altivec64l.c
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rm -f xml-builtin.c stamp-xml
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rm -f powerpc-altivec32l.c powerpc-vsx32l.c powerpc-altivec64l.c
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rm -f powerpc-vsx64l.c xml-builtin.c stamp-xml
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maintainer-clean realclean distclean: clean
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rm -f nm.h tm.h xm.h config.status config.h stamp-h config.log
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@ -369,6 +369,9 @@ powerpc-32l.c : $(srcdir)/../regformats/rs6000/powerpc-32l.dat $(regdat_sh)
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powerpc-altivec32l.o : powerpc-altivec32l.c $(regdef_h)
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powerpc-altivec32l.c : $(srcdir)/../regformats/rs6000/powerpc-altivec32l.dat $(regdat_sh)
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$(SHELL) $(regdat_sh) $(srcdir)/../regformats/rs6000/powerpc-altivec32l.dat powerpc-altivec32l.c
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powerpc-vsx32l.o : powerpc-vsx32l.c $(regdef_h)
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powerpc-vsx32l.c : $(srcdir)/../regformats/rs6000/powerpc-vsx32l.dat $(regdat_sh)
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$(SHELL) $(regdat_sh) $(srcdir)/../regformats/rs6000/powerpc-vsx32l.dat powerpc-vsx32l.c
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powerpc-e500l.o : powerpc-e500l.c $(regdef_h)
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powerpc-e500l.c : $(srcdir)/../regformats/rs6000/powerpc-e500l.dat $(regdat_sh)
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$(SHELL) $(regdat_sh) $(srcdir)/../regformats/rs6000/powerpc-e500l.dat powerpc-e500l.c
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@ -378,6 +381,9 @@ powerpc-64l.c : $(srcdir)/../regformats/rs6000/powerpc-64l.dat $(regdat_sh)
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powerpc-altivec64l.o : powerpc-altivec64l.c $(regdef_h)
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powerpc-altivec64l.c : $(srcdir)/../regformats/rs6000/powerpc-altivec64l.dat $(regdat_sh)
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$(SHELL) $(regdat_sh) $(srcdir)/../regformats/rs6000/powerpc-altivec64l.dat powerpc-altivec64l.c
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powerpc-vsx64l.o : powerpc-vsx64l.c $(regdef_h)
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powerpc-vsx64l.c : $(srcdir)/../regformats/rs6000/powerpc-vsx64l.dat $(regdat_sh)
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$(SHELL) $(regdat_sh) $(srcdir)/../regformats/rs6000/powerpc-vsx64l.dat powerpc-vsx64l.c
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reg-s390.o : reg-s390.c $(regdef_h)
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reg-s390.c : $(srcdir)/../regformats/reg-s390.dat $(regdat_sh)
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$(SHELL) $(regdat_sh) $(srcdir)/../regformats/reg-s390.dat reg-s390.c
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@ -108,13 +108,17 @@ case "${target}" in
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;;
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powerpc*-*-linux*) srv_regobj="powerpc-32l.o"
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srv_regobj="${srv_regobj} powerpc-altivec32l.o"
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srv_regobj="${srv_regobj} powerpc-vsx32l.o"
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srv_regobj="${srv_regobj} powerpc-e500l.o"
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srv_regobj="${srv_regobj} powerpc-64l.o"
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srv_regobj="${srv_regobj} powerpc-altivec64l.o"
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srv_regobj="${srv_regobj} powerpc-vsx64l.o"
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srv_tgtobj="linux-low.o linux-ppc-low.o"
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srv_xmlfiles="rs6000/powerpc-32l.xml"
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srv_xmlfiles="${srv_xmlfiles} rs6000/powerpc-altivec32l.xml"
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srv_xmlfiles="${srv_xmlfiles} rs6000/powerpc-vsx32l.xml"
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srv_xmlfiles="${srv_xmlfiles} rs6000/power-altivec.xml"
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srv_xmlfiles="${srv_xmlfiles} rs6000/power-vsx.xml"
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srv_xmlfiles="${srv_xmlfiles} rs6000/power-core.xml"
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srv_xmlfiles="${srv_xmlfiles} rs6000/power-linux.xml"
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srv_xmlfiles="${srv_xmlfiles} rs6000/power-fpu.xml"
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@ -122,6 +126,7 @@ case "${target}" in
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srv_xmlfiles="${srv_xmlfiles} rs6000/power-spe.xml"
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srv_xmlfiles="${srv_xmlfiles} rs6000/powerpc-64l.xml"
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srv_xmlfiles="${srv_xmlfiles} rs6000/powerpc-altivec64l.xml"
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srv_xmlfiles="${srv_xmlfiles} rs6000/powerpc-vsx64l.xml"
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srv_xmlfiles="${srv_xmlfiles} rs6000/power64-core.xml"
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srv_xmlfiles="${srv_xmlfiles} rs6000/power64-linux.xml"
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srv_linux_usrregs=yes
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@ -25,6 +25,7 @@
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#include <asm/ptrace.h>
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/* These are in <asm/cputable.h> in current kernels. */
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#define PPC_FEATURE_HAS_VSX 0x00000080
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#define PPC_FEATURE_HAS_ALTIVEC 0x10000000
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#define PPC_FEATURE_HAS_SPE 0x00800000
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@ -35,12 +36,16 @@ static unsigned long ppc_hwcap;
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void init_registers_powerpc_32l (void);
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/* Defined in auto-generated file powerpc-altivec32l.c. */
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void init_registers_powerpc_altivec32l (void);
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/* Defined in auto-generated file powerpc-vsx32l.c. */
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void init_registers_powerpc_vsx32l (void);
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/* Defined in auto-generated file powerpc-e500l.c. */
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void init_registers_powerpc_e500l (void);
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/* Defined in auto-generated file powerpc-64l.c. */
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void init_registers_powerpc_64l (void);
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/* Defined in auto-generated file powerpc-altivec64l.c. */
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void init_registers_powerpc_altivec64l (void);
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/* Defined in auto-generated file powerpc-vsx64l.c. */
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void init_registers_powerpc_vsx64l (void);
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#define ppc_num_regs 73
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@ -254,9 +259,10 @@ ppc_arch_setup (void)
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if (msr < 0)
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{
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ppc_get_hwcap (&ppc_hwcap);
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if (ppc_hwcap & PPC_FEATURE_HAS_ALTIVEC)
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if (ppc_hwcap & PPC_FEATURE_HAS_VSX)
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init_registers_powerpc_vsx64l ();
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else if (ppc_hwcap & PPC_FEATURE_HAS_ALTIVEC)
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init_registers_powerpc_altivec64l ();
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return;
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}
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#endif
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@ -265,9 +271,12 @@ ppc_arch_setup (void)
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init_registers_powerpc_32l ();
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ppc_get_hwcap (&ppc_hwcap);
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if (ppc_hwcap & PPC_FEATURE_HAS_ALTIVEC)
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if (ppc_hwcap & PPC_FEATURE_HAS_VSX)
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init_registers_powerpc_vsx32l ();
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else if (ppc_hwcap & PPC_FEATURE_HAS_ALTIVEC)
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init_registers_powerpc_altivec32l ();
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/* On 32-bit machines, check for SPE registers.
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Set the low target's regmap field as appropriately. */
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#ifndef __powerpc64__
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@ -316,6 +325,41 @@ static void ppc_fill_gregset (void *buf)
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ppc_collect_ptrace_register (i, (char *) buf + ppc_regmap[i]);
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}
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#ifndef PTRACE_GETVSXREGS
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#define PTRACE_GETVSXREGS 27
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#define PTRACE_SETVSXREGS 28
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#endif
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#define SIZEOF_VSXREGS 32*8
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static void
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ppc_fill_vsxregset (void *buf)
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{
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int i, base;
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char *regset = buf;
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if (!(ppc_hwcap & PPC_FEATURE_HAS_VSX))
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return;
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base = find_regno ("vs0h");
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for (i = 0; i < 32; i++)
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collect_register (base + i, ®set[i * 8]);
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}
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static void
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ppc_store_vsxregset (const void *buf)
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{
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int i, base;
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const char *regset = buf;
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if (!(ppc_hwcap & PPC_FEATURE_HAS_VSX))
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return;
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base = find_regno ("vs0h");
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for (i = 0; i < 32; i++)
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supply_register (base + i, ®set[i * 8]);
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}
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#ifndef PTRACE_GETVRREGS
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#define PTRACE_GETVRREGS 18
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#define PTRACE_SETVRREGS 19
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@ -408,6 +452,8 @@ struct regset_info target_regsets[] = {
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fetch them every time, but still fall back to PTRACE_PEEKUSER for the
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general registers. Some kernels support these, but not the newer
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PPC_PTRACE_GETREGS. */
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{ PTRACE_GETVSXREGS, PTRACE_SETVSXREGS, SIZEOF_VSXREGS, EXTENDED_REGS,
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ppc_fill_vsxregset, ppc_store_vsxregset },
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{ PTRACE_GETVRREGS, PTRACE_SETVRREGS, SIZEOF_VRREGS, EXTENDED_REGS,
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ppc_fill_vrregset, ppc_store_vrregset },
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{ PTRACE_GETEVRREGS, PTRACE_SETEVRREGS, 32 * 4 + 8 + 4, EXTENDED_REGS,
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