From 67d74e430ea9b97d9c0f09f48473a7fe81010d08 Mon Sep 17 00:00:00 2001
From: Daniel Jacobowitz <drow@false.org>
Date: Wed, 9 Sep 2009 18:36:11 +0000
Subject: [PATCH] 	bfd/ 	* elf32-arm.c (elf32_arm_final_link_relocate):
 Set sym_flags 	for the mode of target PLT entries. 	(allocate_dynrelocs):
 Only adjust symbol type if setting its 	value.

	ld/testsuite/
	* ld-arm/farcall-mixed-lib.d: Update.
---
 bfd/ChangeLog                           |  7 +++++++
 bfd/elf32-arm.c                         | 23 +++++++++++++++--------
 ld/testsuite/ChangeLog                  |  4 ++++
 ld/testsuite/ld-arm/farcall-mixed-lib.d | 23 ++++++++++++-----------
 4 files changed, 38 insertions(+), 19 deletions(-)

diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index e1edd46477..7453dccdb9 100644
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,3 +1,10 @@
+2009-09-09  Daniel Jacobowitz  <dan@codesourcery.com>
+
+	* elf32-arm.c (elf32_arm_final_link_relocate): Set sym_flags
+	for the mode of target PLT entries.
+	(allocate_dynrelocs): Only adjust symbol type if setting its
+	value.
+
 2009-09-09  Paolo Bonzini  <bonzini@gnu.org>
 
 	* configure: Regnerate.
diff --git a/bfd/elf32-arm.c b/bfd/elf32-arm.c
index 2dbf23cf1c..157024c8cd 100644
--- a/bfd/elf32-arm.c
+++ b/bfd/elf32-arm.c
@@ -7036,6 +7036,9 @@ elf32_arm_final_link_relocate (reloc_howto_type *           howto,
 			   + splt->output_offset
 			   + h->plt.offset);
 		  *unresolved_reloc_p = FALSE;
+		  /* The PLT entry is in ARM mode, regardless of the
+		     target function.  */
+		  sym_flags = STT_FUNC;
 		}
 
 	      from = (input_section->output_section->vma
@@ -7452,10 +7455,14 @@ elf32_arm_final_link_relocate (reloc_howto_type *           howto,
  		/* If the Thumb BLX instruction is available, convert the
 		   BL to a BLX instruction to call the ARM-mode PLT entry.  */
 		lower_insn = (lower_insn & ~0x1000) | 0x0800;
+		sym_flags = STT_FUNC;
  	      }
  	    else
- 	      /* Target the Thumb stub before the ARM PLT entry.  */
- 	      value -= PLT_THUMB_STUB_SIZE;
+	      {
+		/* Target the Thumb stub before the ARM PLT entry.  */
+		value -= PLT_THUMB_STUB_SIZE;
+		sym_flags = STT_ARM_TFUNC;
+	      }
 	    *unresolved_reloc_p = FALSE;
 	  }
 
@@ -11449,13 +11456,13 @@ allocate_dynrelocs (struct elf_link_hash_entry *h, void * inf)
 	    {
 	      h->root.u.def.section = s;
 	      h->root.u.def.value = h->plt.offset;
-	    }
 
-	  /* Make sure the function is not marked as Thumb, in case
-	     it is the target of an ABS32 relocation, which will
-	     point to the PLT entry.  */
-	  if (ELF_ST_TYPE (h->type) == STT_ARM_TFUNC)
-	    h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
+	      /* Make sure the function is not marked as Thumb, in case
+		 it is the target of an ABS32 relocation, which will
+		 point to the PLT entry.  */
+	      if (ELF_ST_TYPE (h->type) == STT_ARM_TFUNC)
+		h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
+	    }
 
 	  /* Make room for this entry.  */
 	  s->size += htab->plt_entry_size;
diff --git a/ld/testsuite/ChangeLog b/ld/testsuite/ChangeLog
index e11aa76c59..a355827c9e 100644
--- a/ld/testsuite/ChangeLog
+++ b/ld/testsuite/ChangeLog
@@ -1,3 +1,7 @@
+2009-09-09  Daniel Jacobowitz  <dan@codesourcery.com>
+
+	* ld-arm/farcall-mixed-lib.d: Update.
+
 2009-09-09  Alan Modra  <amodra@bigpond.net.au>
 
 	* ld-elf/sec64k.exp: For frv-linux use "aw" sections.
diff --git a/ld/testsuite/ld-arm/farcall-mixed-lib.d b/ld/testsuite/ld-arm/farcall-mixed-lib.d
index e03fb3c6ad..0c9937549d 100644
--- a/ld/testsuite/ld-arm/farcall-mixed-lib.d
+++ b/ld/testsuite/ld-arm/farcall-mixed-lib.d
@@ -39,9 +39,9 @@ Disassembly of section .text:
 
 .* <lib_func2>:
  .*:	f000 e80e 	blx	1000350 <__app_func_from_thumb>
- .*:	f000 e818 	blx	1000368 <__app_func_weak_from_thumb>
- .*:	f000 e810 	blx	100035c <__lib_func3_from_thumb>
- .*:	f000 e81a 	blx	1000374 <__lib_func4_from_thumb>
+ .*:	f000 e81a 	blx	100036c <__app_func_weak_from_thumb>
+ .*:	f000 e810 	blx	100035c <__lib_func3_veneer>
+ .*:	f000 e81c 	blx	1000378 <__lib_func4_from_thumb>
  .*:	4770      	bx	lr
  .*:	46c0      	nop			; \(mov r8, r8\)
  .*:	46c0      	nop			; \(mov r8, r8\)
@@ -56,20 +56,21 @@ Disassembly of section .text:
  .*:	e08ff00c 	add	pc, pc, ip
  .*:	feffff84 	.word	0xfeffff84
 
-.* <__lib_func3_from_thumb>:
- .*:	e59fc000 	ldr	ip, \[pc, #0\]	; 1000364 <__lib_func3_from_thumb\+0x8>
- .*:	e08ff00c 	add	pc, pc, ip
- .*:	feffff90 	.word	0xfeffff90
+.* <__lib_func3_veneer>:
+ .*:	e59fc004 	ldr	ip, \[pc, #4\]	; 1000368 <__lib_func3_veneer\+0xc>
+ .*:	e08fc00c 	add	ip, pc, ip
+ .*:	e12fff1c 	bx	ip
+ .*:	feffff91 	.word	0xfeffff91
 
 .* <__app_func_weak_from_thumb>:
- .*:	e59fc000 	ldr	ip, \[pc, #0\]	; 1000370 <__app_func_weak_from_thumb\+0x8>
+ .*:	e59fc000 	ldr	ip, \[pc, #0\]	; 1000374 <__app_func_weak_from_thumb\+0x8>
  .*:	e08ff00c 	add	pc, pc, ip
- .*:	feffff78 	.word	0xfeffff78
+ .*:	feffff74 	.word	0xfeffff74
 
 .* <__lib_func4_from_thumb>:
- .*:	e59fc000 	ldr	ip, \[pc, #0\]	; 100037c <__lib_func4_from_thumb\+0x8>
+ .*:	e59fc000 	ldr	ip, \[pc, #0\]	; 1000380 <__lib_func4_from_thumb\+0x8>
  .*:	e08ff00c 	add	pc, pc, ip
- .*:	feffff84 	.word	0xfeffff84
+ .*:	feffff80 	.word	0xfeffff80
 	...
 
 .* <lib_func3>: