From 69088b17068a002cfdad9aaa12a3e486b9f47f61 Mon Sep 17 00:00:00 2001
From: Chao-ying Fu <fu@mips.com>
Date: Mon, 15 May 2006 20:34:18 +0000
Subject: [PATCH] * dsp.igen (do_ph_shift, do_w_shra): Fix bugs for rounding
 instructions.

---
 sim/mips/ChangeLog |  4 ++++
 sim/mips/dsp.igen  | 14 ++++++++------
 2 files changed, 12 insertions(+), 6 deletions(-)

diff --git a/sim/mips/ChangeLog b/sim/mips/ChangeLog
index e3c2283596..5a0228d53d 100644
--- a/sim/mips/ChangeLog
+++ b/sim/mips/ChangeLog
@@ -1,3 +1,7 @@
+2006-05-15 Chao-ying Fu  <fu@mips.com>
+
+	* dsp.igen (do_ph_shift, do_w_shra): Fix bugs for rounding instructions.
+
 2006-04-18  Nick Clifton  <nickc@redhat.com>
 
 	* dv-tx3904tmr.c (deliver_tx3904tmr_tick): Add missing break
diff --git a/sim/mips/dsp.igen b/sim/mips/dsp.igen
index 9c39b7160f..18aafcbe50 100644
--- a/sim/mips/dsp.igen
+++ b/sim/mips/dsp.igen
@@ -193,9 +193,10 @@
 	}
       else // right
 	{
-	  if (sat == 1 && shift != 0)
-	    h0 += (1 << (shift - 1));
-	  h0 = h0 >> shift;
+	  if (sat == 1 && shift != 0 && (h0 & (1 << (shift-1))))
+	    h0 = (h0 >> shift) + 1;
+	  else
+	    h0 = h0 >> shift;
 	}
 
       result |= ((unsigned32)((unsigned16)h0) << i);
@@ -246,9 +247,10 @@
 {
   unsigned32 result = GPR[rt];
   signed32 h0 = (signed32)result;
-  if (shift != 0)
-    h0 += (1 << (shift - 1));
-  h0 = h0 >> shift;
+  if (shift != 0 && (h0 & (1 << (shift-1))))
+    h0 = (h0 >> shift) + 1;
+  else
+    h0 = h0 >> shift;
   GPR[rd] = EXTEND32 (h0);
 }