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2003-11-16 Andrew Cagney <cagney@redhat.com> 

* mips-tdep.h (deprecated_mips_set_processor_regs_hack): Declare.
	* remote-mips.c (common_open): Instead of
	"mips_read_register_type" and "mips_set_processor_type_command"
	call "deprecated_mips_set_processor_regs_hack".
	* config/mips/tm-mips.h (mips_read_processor_type): Delete
	declaration.
	(mips_set_processor_type_command): Delete declaration.
	* mips-tdep.c (mips_gdbarch_init): Update comment.
	(mips_dump_tdep): Do not print MIPS_REGISTER_NAMES.
	(mips_set_processor_type): Delete function.
	(NUM_MIPS_PROCESSOR_REGS): Define.
	(mips_show_processor_type_command): Delete function.
	(mips_set_processor_type_command): Delete function.
	(tmp_mips_processor_type): Delete.
	(mips_processor_type): Delete.
	(mips_processor_type_table): Delete.
	(mips_r3051_reg_names): Delete.
	(mips_r3081_reg_names): Delete.
	(mips_lsi33k_reg_names): Delete.
	(mips_processor_reg_names): Delete.
	(mips_read_processor_type): Delete function.
	(deprecated_mips_set_processor_regs_hack): New function.
	(struct gdbarch_tdep): Add member "mips_processor_reg_names".
	(mips_register_name): Get the processor names from the tdep.
	(mips_tx39_reg_names): New array.
	(mips_generic_reg_names): Wire to a standard set of names.
	(mips_gdbarch_init): Set "mips_processor_reg_names".
	* config/mips/tm-irix5.h (MIPS_REGISTER_NAMES): Delete macro.
	* config/mips/tm-mips.h (MIPS_REGISTER_NAMES): Delete macro.
	* config/mips/tm-tx39.h (MIPS_REGISTER_NAMES): Delete macro.
This commit is contained in:
Andrew Cagney 2003-11-16 22:46:49 +00:00
parent 56cea62382
commit 691c0433df
8 changed files with 112 additions and 221 deletions
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33
gdb/ChangeLog
View File

@ -1,3 +1,36 @@
2003-11-16 Andrew Cagney <cagney@redhat.com>
* mips-tdep.h (deprecated_mips_set_processor_regs_hack): Declare.
* remote-mips.c (common_open): Instead of
"mips_read_register_type" and "mips_set_processor_type_command"
call "deprecated_mips_set_processor_regs_hack".
* config/mips/tm-mips.h (mips_read_processor_type): Delete
declaration.
(mips_set_processor_type_command): Delete declaration.
* mips-tdep.c (mips_gdbarch_init): Update comment.
(mips_dump_tdep): Do not print MIPS_REGISTER_NAMES.
(mips_set_processor_type): Delete function.
(NUM_MIPS_PROCESSOR_REGS): Define.
(mips_show_processor_type_command): Delete function.
(mips_set_processor_type_command): Delete function.
(tmp_mips_processor_type): Delete.
(mips_processor_type): Delete.
(mips_processor_type_table): Delete.
(mips_r3051_reg_names): Delete.
(mips_r3081_reg_names): Delete.
(mips_lsi33k_reg_names): Delete.
(mips_processor_reg_names): Delete.
(mips_read_processor_type): Delete function.
(deprecated_mips_set_processor_regs_hack): New function.
(struct gdbarch_tdep): Add member "mips_processor_reg_names".
(mips_register_name): Get the processor names from the tdep.
(mips_tx39_reg_names): New array.
(mips_generic_reg_names): Wire to a standard set of names.
(mips_gdbarch_init): Set "mips_processor_reg_names".
* config/mips/tm-irix5.h (MIPS_REGISTER_NAMES): Delete macro.
* config/mips/tm-mips.h (MIPS_REGISTER_NAMES): Delete macro.
* config/mips/tm-tx39.h (MIPS_REGISTER_NAMES): Delete macro.
2003-11-16 Andrew Cagney <cagney@redhat.com>
* mips-tdep.c (struct gdbarch_tdep): Add field "regnum".

15
gdb/config/mips/tm-irix5.h
View File

@ -21,21 +21,6 @@
#include "mips/tm-mips.h"
/* Redefine register numbers for SGI. */
#undef MIPS_REGISTER_NAMES
/* Initializer for an array of names for registers 32 and above.
There should be NUM_REGS-32 strings in this initializer. */
#define MIPS_REGISTER_NAMES \
{ "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \
"f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", \
"f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",\
"f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",\
"pc", "cause", "bad", "hi", "lo", "fsr", "fir" \
}
/* Offsets for register values in _sigtramp frame.
sigcontext is immediately above the _sigtramp frame on Irix. */
#define SIGFRAME_BASE 0x0

15
gdb/config/mips/tm-irix6.h
View File

@ -22,21 +22,6 @@
#include "mips/tm-mips.h"
#include "solib.h"
/* Redefine register numbers for SGI. */
#undef MIPS_REGISTER_NAMES
/* Initializer for an array of names for registers 32 and above.
There should be NUM_REGS-32 strings in this initializer. */
#define MIPS_REGISTER_NAMES \
{ "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \
"f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", \
"f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",\
"f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",\
"pc", "cause", "bad", "hi", "lo", "fsr", "fir" \
}
/* The signal handler trampoline is called _sigtramp. */
#undef IN_SIGTRAMP
#define IN_SIGTRAMP(pc, name) ((name) && STREQ ("_sigtramp", name))

22
gdb/config/mips/tm-mips.h
View File

@ -45,22 +45,6 @@ extern int mips_step_skips_delay (CORE_ADDR);
#define STEP_SKIPS_DELAY_P (1)
#define STEP_SKIPS_DELAY(pc) (mips_step_skips_delay (pc))
/* Initializer for an array of names for registers 32 and above.
There should be NUM_REGS-32 strings in this initializer. */
#ifndef MIPS_REGISTER_NAMES
#define MIPS_REGISTER_NAMES \
{ "sr", "lo", "hi", "bad", "cause","pc", \
"f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \
"f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", \
"f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",\
"f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",\
"fsr", "fir", ""/*"fp"*/, "", \
"", "", "", "", "", "", "", "", \
"", "", "", "", "", "", "", "", \
}
#endif
/* Register numbers of various important registers.
Note that some of these values are "real" register numbers,
and correspond to the general registers of the machine,
@ -119,9 +103,6 @@ extern struct frame_info *setup_arbitrary_frame (int, CORE_ADDR *);
extern CORE_ADDR sigtramp_address, sigtramp_end;
extern void fixup_sigtramp (void);
/* Defined in mips-tdep.c and used in remote-mips.c */
extern char *mips_read_processor_type (void);
/* Functions for dealing with MIPS16 call and return stubs. */
#define IGNORE_HELPER_CALL(pc) mips_ignore_helper (pc)
extern int mips_ignore_helper (CORE_ADDR pc);
@ -134,8 +115,5 @@ typedef unsigned long t_inst; /* Integer big enough to hold an instruction */
#endif /* TM_MIPS_H */
/* Command to set the processor type. */
extern void mips_set_processor_type_command (char *, int);
/* Single step based on where the current instruction will take us. */
extern void mips_software_single_step (enum target_signal, int);

12
gdb/config/mips/tm-tx39.h
View File

@ -18,15 +18,3 @@
Boston, MA 02111-1307, USA. */
#include "mips/tm-mips.h"
#undef MIPS_REGISTER_NAMES
#define MIPS_REGISTER_NAMES \
{ "sr", "lo", "hi", "bad", "cause","pc", \
"", "", "", "", "", "", "", "", \
"", "", "", "", "", "", "", "", \
"", "", "", "", "", "", "", "", \
"", "", "", "", "", "", "", "", \
"", "", "", "", \
"", "", "", "", "", "", "", "", \
"", "", "config", "cache", "debug", "depc", "epc", "" \
}

228
gdb/mips-tdep.c
View File

@ -142,6 +142,8 @@ struct gdbarch_tdep
different values. This contains the "public" fields. Don't
add any that do not need to be public. */
const struct mips_regnum *regnum;
/* Register names table for the current register set. */
const char **mips_processor_reg_names;
};
const struct mips_regnum *
@ -393,10 +395,6 @@ static CORE_ADDR heuristic_proc_start (CORE_ADDR);
static CORE_ADDR read_next_frame_reg (struct frame_info *, int);
static int mips_set_processor_type (char *);
static void mips_show_processor_type_command (char *, int);
static void reinit_frame_cache_sfunc (char *, int, struct cmd_list_element *);
static mips_extra_func_info_t find_proc_desc (CORE_ADDR pc,
@ -409,32 +407,71 @@ static CORE_ADDR after_prologue (CORE_ADDR pc,
static struct type *mips_float_register_type (void);
static struct type *mips_double_register_type (void);
/* This value is the model of MIPS in use. It is derived from the value
of the PrID register. */
char *mips_processor_type;
char *tmp_mips_processor_type;
/* The list of available "set mips " and "show mips " commands */
static struct cmd_list_element *setmipscmdlist = NULL;
static struct cmd_list_element *showmipscmdlist = NULL;
/* A set of original names, to be used when restoring back to generic
registers from a specific set. */
static char *mips_generic_reg_names[] = MIPS_REGISTER_NAMES;
/* Integer registers 0 thru 31 are handled explicitly by
mips_register_name(). Processor specific registers 32 and above
are listed in the sets of register names assigned to
mips_processor_reg_names. */
static char **mips_processor_reg_names = mips_generic_reg_names;
are listed in the followign tables. */
enum { NUM_MIPS_PROCESSOR_REGS = (90 - 32) };
/* Generic MIPS. */
static const char *mips_generic_reg_names[NUM_MIPS_PROCESSOR_REGS] = {
"sr", "lo", "hi", "bad", "cause","pc",
"f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
"f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
"f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
"f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
"fsr", "fir", ""/*"fp"*/, "",
"", "", "", "", "", "", "", "",
"", "", "", "", "", "", "", "",
};
/* Names of IDT R3041 registers. */
static const char *mips_r3041_reg_names[] = {
"sr", "lo", "hi", "bad", "cause","pc",
"f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
"f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
"f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
"f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
"fsr", "fir", "",/*"fp"*/ "",
"", "", "bus", "ccfg", "", "", "", "",
"", "", "port", "cmp", "", "", "epc", "prid",
};
/* Names of tx39 registers. */
static const char *mips_tx39_reg_names[NUM_MIPS_PROCESSOR_REGS] = {
"sr", "lo", "hi", "bad", "cause","pc",
"", "", "", "", "", "", "", "",
"", "", "", "", "", "", "", "",
"", "", "", "", "", "", "", "",
"", "", "", "", "", "", "", "",
"", "", "", "",
"", "", "", "", "", "", "", "",
"", "", "config", "cache", "debug", "depc", "epc", ""
};
/* Names of IRIX registers. */
static const char *mips_irix_reg_names[NUM_MIPS_PROCESSOR_REGS] = {
"f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
"f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
"f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
"f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
"pc", "cause", "bad", "hi", "lo", "fsr", "fir"
};
/* Return the name of the register corresponding to REGNO. */
static const char *
mips_register_name (int regno)
{
struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
/* GPR names for all ABIs other than n32/n64. */
static char *mips_gpr_names[] = {
"zero", "at", "v0", "v1", "a0", "a1", "a2", "a3",
@ -470,79 +507,15 @@ mips_register_name (int regno)
return mips_gpr_names[rawnum];
}
else if (32 <= rawnum && rawnum < NUM_REGS)
return mips_processor_reg_names[rawnum - 32];
{
gdb_assert (rawnum - 32 < NUM_MIPS_PROCESSOR_REGS);
return tdep->mips_processor_reg_names[rawnum - 32];
}
else
internal_error (__FILE__, __LINE__,
"mips_register_name: bad register number %d", rawnum);
}
/* *INDENT-OFF* */
/* Names of IDT R3041 registers. */
char *mips_r3041_reg_names[] = {
"sr", "lo", "hi", "bad", "cause","pc",
"f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
"f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
"f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
"f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
"fsr", "fir", "",/*"fp"*/ "",
"", "", "bus", "ccfg", "", "", "", "",
"", "", "port", "cmp", "", "", "epc", "prid",
};
/* Names of IDT R3051 registers. */
char *mips_r3051_reg_names[] = {
"sr", "lo", "hi", "bad", "cause","pc",
"f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
"f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
"f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
"f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
"fsr", "fir", ""/*"fp"*/, "",
"inx", "rand", "elo", "", "ctxt", "", "", "",
"", "", "ehi", "", "", "", "epc", "prid",
};
/* Names of IDT R3081 registers. */
char *mips_r3081_reg_names[] = {
"sr", "lo", "hi", "bad", "cause","pc",
"f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
"f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
"f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
"f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
"fsr", "fir", ""/*"fp"*/, "",
"inx", "rand", "elo", "cfg", "ctxt", "", "", "",
"", "", "ehi", "", "", "", "epc", "prid",
};
/* Names of LSI 33k registers. */
char *mips_lsi33k_reg_names[] = {
"epc", "hi", "lo", "sr", "cause","badvaddr",
"dcic", "bpc", "bda", "", "", "", "", "",
"", "", "", "", "", "", "", "",
"", "", "", "", "", "", "", "",
"", "", "", "", "", "", "", "",
"", "", "", "",
"", "", "", "", "", "", "", "",
"", "", "", "", "", "", "", "",
};
struct {
char *name;
char **regnames;
} mips_processor_type_table[] = {
{ "generic", mips_generic_reg_names },
{ "r3041", mips_r3041_reg_names },
{ "r3051", mips_r3051_reg_names },
{ "r3071", mips_r3081_reg_names },
{ "r3081", mips_r3081_reg_names },
{ "lsi33k", mips_lsi33k_reg_names },
{ NULL, NULL }
};
/* *INDENT-ON* */
/* Return the groups that a MIPS register can be categorised into. */
static int
@ -5119,76 +5092,22 @@ set_mipsfpu_auto_command (char *args, int from_tty)
mips_fpu_type_auto = 1;
}
/* Command to set the processor type. */
/* Attempt to identify the particular processor model by reading the
processor id. NOTE: cagney/2003-11-15: Firstly it isn't clear that
the relevant processor still exists (it dates back to '94) and
secondly this is not the way to do this. The processor type should
be set by forcing an architecture change. */
void
mips_set_processor_type_command (char *args, int from_tty)
{
int i;
if (tmp_mips_processor_type == NULL || *tmp_mips_processor_type == '\0')
{
printf_unfiltered ("The known MIPS processor types are as follows:\n\n");
for (i = 0; mips_processor_type_table[i].name != NULL; ++i)
printf_unfiltered ("%s\n", mips_processor_type_table[i].name);
/* Restore the value. */
tmp_mips_processor_type = xstrdup (mips_processor_type);
return;
}
if (!mips_set_processor_type (tmp_mips_processor_type))
{
error ("Unknown processor type `%s'.", tmp_mips_processor_type);
/* Restore its value. */
tmp_mips_processor_type = xstrdup (mips_processor_type);
}
}
static void
mips_show_processor_type_command (char *args, int from_tty)
{
}
/* Modify the actual processor type. */
static int
mips_set_processor_type (char *str)
{
int i;
if (str == NULL)
return 0;
for (i = 0; mips_processor_type_table[i].name != NULL; ++i)
{
if (strcasecmp (str, mips_processor_type_table[i].name) == 0)
{
mips_processor_type = str;
mips_processor_reg_names = mips_processor_type_table[i].regnames;
return 1;
/* FIXME tweak fpu flag too */
}
}
return 0;
}
/* Attempt to identify the particular processor model by reading the
processor id. */
char *
mips_read_processor_type (void)
deprecated_mips_set_processor_regs_hack (void)
{
struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
CORE_ADDR prid;
prid = read_register (PRID_REGNUM);
if ((prid & ~0xf) == 0x700)
return savestring ("r3041", strlen ("r3041"));
return NULL;
tdep->mips_processor_reg_names = mips_r3041_reg_names;
}
/* Just like reinit_frame_cache, but with the right arguments to be
@ -6019,11 +5938,14 @@ mips_gdbarch_init (struct gdbarch_info info,
else
tdep->mips_fpu_type = MIPS_FPU_DOUBLE;
/* MIPS version of register names. NOTE: At present the MIPS
register name management is part way between the old -
#undef/#define MIPS_REGISTER_NAMES and the new REGISTER_NAME(nr).
Further work on it is required. */
/* MIPS version of register names. */
set_gdbarch_register_name (gdbarch, mips_register_name);
if (info.osabi == GDB_OSABI_IRIX)
tdep->mips_processor_reg_names = mips_irix_reg_names;
else if (info.bfd_arch_info != NULL && info.bfd_arch_info->mach == bfd_mach_mips3900)
tdep->mips_processor_reg_names = mips_tx39_reg_names;
else
tdep->mips_processor_reg_names = mips_generic_reg_names;
set_gdbarch_read_pc (gdbarch, mips_read_pc);
set_gdbarch_write_pc (gdbarch, generic_target_write_pc);
set_gdbarch_deprecated_target_read_fp (gdbarch, mips_read_sp); /* Draft FRAME base. */
@ -6296,8 +6218,6 @@ mips_dump_tdep (struct gdbarch *current_gdbarch, struct ui_file *file)
fprintf_unfiltered (file,
"mips_dump_tdep: MIPS_NUMREGS = %d\n",
MIPS_NUMREGS);
fprintf_unfiltered (file,
"mips_dump_tdep: MIPS_REGISTER_NAMES = delete?\n");
fprintf_unfiltered (file,
"mips_dump_tdep: MIPS_SAVED_REGSIZE = %d\n",
MIPS_SAVED_REGSIZE);

4
gdb/mips-tdep.h
View File

@ -70,4 +70,8 @@ enum {
MIPS_EMBED_FP0_REGNUM = 38
};
/* Defined in mips-tdep.c and used in remote-mips.c */
extern void deprecated_mips_set_processor_regs_hack (void);
#endif /* MIPS_TDEP_H */

4
gdb/remote-mips.c
View File

@ -1607,9 +1607,7 @@ device is attached to the target board (e.g., /dev/ttya).\n"
/* FIXME: Should we call start_remote here? */
/* Try to figure out the processor model if possible. */
ptype = mips_read_processor_type ();
if (ptype)
mips_set_processor_type_command (xstrdup (ptype), 0);
deprecated_mips_set_processor_regs_hack ();
/* This is really the job of start_remote however, that makes an
assumption that the target is about to print out a status message