Wed Jul 13 18:01:58 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
* ns32k-dis.c: Deleted all code in "#ifdef GDB". (invalid_float): Enabled general version, doesn't require running on ns32k host. Sun Jul 10 00:27:47 1994 Ian Dall (dall@hfrd.dsto.gov.au) * opcodes/ns32k-dis.c: Semi-new file. Had apparently been dropped from distribution. A ns32k-dis.c from a previous distribution has been brought up to date and supports the new interface. * disaaemble.c: define ARCH_ns32k and add case bfd_arch_ns32k. * configure.in: add bfd_ns32k_arch target support. * Makefile.in: add ns32k-dis.o to ALL_MACHINES. Add ns32k-dis.c to CFILES. Add dependencies for ns32k-dis.o.
This commit is contained in:
Ken Raeburn
parent
903f5bc3a0
commit
69bb683c6d
@ -1,3 +1,27 @@
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Wed Jul 13 18:01:58 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
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* ns32k-dis.c: Deleted all code in "#ifdef GDB".
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(invalid_float): Enabled general version, doesn't require running
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on ns32k host.
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Sun Jul 10 00:27:47 1994 Ian Dall (dall@hfrd.dsto.gov.au)
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* opcodes/ns32k-dis.c: Semi-new file. Had apparently been dropped
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from distribution. A ns32k-dis.c from a previous distribution has
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been brought up to date and supports the new interface.
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* disaaemble.c: define ARCH_ns32k and add case bfd_arch_ns32k.
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* configure.in: add bfd_ns32k_arch target support.
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* Makefile.in: add ns32k-dis.o to ALL_MACHINES.
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Add ns32k-dis.c to CFILES. Add dependencies for ns32k-dis.o.
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Wed Jun 29 22:10:37 1994 Steve Chamberlain (sac@cygnus.com)
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* h8300-dis.c (bfd_h8_disassemble): Get 16bit branch
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disassembly right.
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Tue Jun 28 13:22:06 1994 Stan Shebs (shebs@andros.cygnus.com)
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* h8300-dis.c, mips-dis.c: Don't use true and false.
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846
opcodes/ns32k-dis.c
Normal file
846
opcodes/ns32k-dis.c
Normal file
@ -0,0 +1,846 @@
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/* Print National Semiconductor 32000 instructions.
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Copyright 1986, 1988, 1991, 1992, 1994 Free Software Foundation, Inc.
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This file is part of opcodes library.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
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#include "bfd.h"
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#include "sysdep.h"
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#include "dis-asm.h"
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#if !defined(const) && !defined(__STDC__)
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#define const
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#endif
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#include "opcode/ns32k.h"
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static disassemble_info *dis_info;
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/*
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* Hacks to get it to compile <= READ THESE AS FIXES NEEDED
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*/
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#define CORE_ADDR unsigned long
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#define INVALID_FLOAT(val, size) invalid_float(val, size)
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static long read_memory_integer(addr, nr)
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unsigned char *addr;
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int nr;
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{
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long val;
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int i;
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for (val = 0, i = nr - 1; i >= 0; i--) {
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val = (val << 8);
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val |= (0xff & *(addr + i));
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}
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return val;
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}
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/* 32000 instructions are never longer than this. */
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#define MAXLEN 62
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#include <setjmp.h>
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struct private
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{
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/* Points to first byte not fetched. */
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bfd_byte *max_fetched;
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bfd_byte the_buffer[MAXLEN];
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bfd_vma insn_start;
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jmp_buf bailout;
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};
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/* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
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to ADDR (exclusive) are valid. Returns 1 for success, longjmps
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on error. */
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#define FETCH_DATA(info, addr) \
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((addr) <= ((struct private *)(info->private_data))->max_fetched \
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? 1 : fetch_data ((info), (addr)))
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static int
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fetch_data (info, addr)
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struct disassemble_info *info;
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bfd_byte *addr;
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{
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int status;
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struct private *priv = (struct private *)info->private_data;
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bfd_vma start = priv->insn_start + (priv->max_fetched - priv->the_buffer);
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status = (*info->read_memory_func) (start,
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priv->max_fetched,
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addr - priv->max_fetched,
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info);
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if (status != 0)
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{
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(*info->memory_error_func) (status, start, info);
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longjmp (priv->bailout, 1);
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}
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else
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priv->max_fetched = addr;
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return 1;
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}
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/* Number of elements in the opcode table. */
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#define NOPCODES (sizeof ns32k_opcodes / sizeof ns32k_opcodes[0])
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#define NEXT_IS_ADDR '|'
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struct option {
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char *pattern; /* the option itself */
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unsigned long value; /* binary value of the option */
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unsigned long match; /* these bits must match */
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};
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static struct option opt_u[]= /* restore, exit */
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{
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{ "r0", 0x80, 0x80 },
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{ "r1", 0x40, 0x40 },
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{ "r2", 0x20, 0x20 },
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{ "r3", 0x10, 0x10 },
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{ "r4", 0x08, 0x08 },
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{ "r5", 0x04, 0x04 },
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{ "r6", 0x02, 0x02 },
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{ "r7", 0x01, 0x01 },
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{ 0 , 0x00, 0x00 }
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};
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static struct option opt_U[]= /* save, enter */
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{
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{ "r0", 0x01, 0x01 },
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{ "r1", 0x02, 0x02 },
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{ "r2", 0x04, 0x04 },
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{ "r3", 0x08, 0x08 },
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{ "r4", 0x10, 0x10 },
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{ "r5", 0x20, 0x20 },
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{ "r6", 0x40, 0x40 },
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{ "r7", 0x80, 0x80 },
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{ 0 , 0x00, 0x00 }
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};
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static struct option opt_O[]= /* setcfg */
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{
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{ "c", 0x8, 0x8 },
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{ "m", 0x4, 0x4 },
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{ "f", 0x2, 0x2 },
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{ "i", 0x1, 0x1 },
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{ 0 , 0x0, 0x0 }
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};
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static struct option opt_C[]= /* cinv */
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{
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{ "a", 0x4, 0x4 },
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{ "i", 0x2, 0x2 },
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{ "d", 0x1, 0x1 },
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{ 0 , 0x0, 0x0 }
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};
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static struct option opt_S[]= /* string inst */
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{
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{ "b", 0x1, 0x1 },
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{ "u", 0x6, 0x6 },
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{ "w", 0x2, 0x2 },
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{ 0 , 0x0, 0x0 }
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};
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static struct option list_P532[]= /* lpr spr */
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{
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{ "us", 0x0, 0xf },
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{ "dcr", 0x1, 0xf },
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{ "bpc", 0x2, 0xf },
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{ "dsr", 0x3, 0xf },
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{ "car", 0x4, 0xf },
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{ "fp", 0x8, 0xf },
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{ "sp", 0x9, 0xf },
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{ "sb", 0xa, 0xf },
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{ "usp", 0xb, 0xf },
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{ "cfg", 0xc, 0xf },
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{ "psr", 0xd, 0xf },
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{ "intbase", 0xe, 0xf },
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{ "mod", 0xf, 0xf },
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{ 0 , 0x00, 0xf }
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};
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static struct option list_M532[]= /* lmr smr */
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{
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{ "mcr", 0x9, 0xf },
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{ "msr", 0xa, 0xf },
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{ "tear", 0xb, 0xf },
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{ "ptb0", 0xc, 0xf },
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{ "ptb1", 0xd, 0xf },
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{ "ivar0", 0xe, 0xf },
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{ "ivar1", 0xf, 0xf },
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{ 0 , 0x0, 0xf }
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};
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static struct option list_P032[]= /* lpr spr */
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{
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{ "upsr", 0x0, 0xf },
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{ "fp", 0x8, 0xf },
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{ "sp", 0x9, 0xf },
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{ "sb", 0xa, 0xf },
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{ "psr", 0xb, 0xf },
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{ "intbase", 0xe, 0xf },
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{ "mod", 0xf, 0xf },
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{ 0 , 0x0, 0xf }
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};
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static struct option list_M032[]= /* lmr smr */
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{
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{ "bpr0", 0x0, 0xf },
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{ "bpr1", 0x1, 0xf },
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{ "pf0", 0x4, 0xf },
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{ "pf1", 0x5, 0xf },
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{ "sc", 0x8, 0xf },
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{ "msr", 0xa, 0xf },
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{ "bcnt", 0xb, 0xf },
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{ "ptb0", 0xc, 0xf },
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{ "ptb1", 0xd, 0xf },
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{ "eia", 0xf, 0xf },
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{ 0 , 0x0, 0xf }
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};
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/*
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* figure out which options are present
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*/
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static void
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optlist(options, optionP, result)
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int options;
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struct option *optionP;
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char *result;
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{
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if (options == 0) {
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sprintf(result, "[]");
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return;
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}
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sprintf(result, "[");
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for (; (options != 0) && optionP->pattern; optionP++) {
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if ((options & optionP->match) == optionP->value) {
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/* we found a match, update result and options */
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strcat(result, optionP->pattern);
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options &= ~optionP->value;
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if (options != 0) /* more options to come */
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strcat(result, ",");
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}
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}
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if (options != 0)
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strcat(result, "undefined");
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strcat(result, "]");
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}
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static list_search(reg_value, optionP, result)
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int reg_value;
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struct option *optionP;
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char *result;
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{
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for (; optionP->pattern; optionP++) {
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if ((reg_value & optionP->match) == optionP->value) {
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sprintf(result, "%s", optionP->pattern);
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return;
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}
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}
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sprintf(result, "undefined");
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}
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/*
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* extract "count" bits starting "offset" bits
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* into buffer
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*/
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static int
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bit_extract (buffer, offset, count)
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bfd_byte *buffer;
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int offset;
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int count;
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{
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int result;
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int mask;
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int bit;
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buffer += offset >> 3;
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offset &= 7;
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bit = 1;
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result = 0;
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while (count--)
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{
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FETCH_DATA(dis_info, buffer + 1);
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if ((*buffer & (1 << offset)))
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result |= bit;
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if (++offset == 8)
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{
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offset = 0;
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||||
buffer++;
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||||
}
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bit <<= 1;
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||||
}
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||||
return result;
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||||
}
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static void
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bit_copy (buffer, offset, count, to)
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||||
char *buffer;
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||||
int offset;
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||||
int count;
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||||
char *to;
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||||
{
|
||||
for(; count > 8; count -= 8, to++, offset += 8)
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||||
*to = bit_extract (buffer, offset, 8);
|
||||
*to = bit_extract (buffer, offset, count);
|
||||
}
|
||||
|
||||
|
||||
static sign_extend (value, bits)
|
||||
int value, bits;
|
||||
{
|
||||
value = value & ((1 << bits) - 1);
|
||||
return (value & (1 << (bits-1))
|
||||
? value | (~((1 << bits) - 1))
|
||||
: value);
|
||||
}
|
||||
|
||||
static flip_bytes (ptr, count)
|
||||
char *ptr;
|
||||
int count;
|
||||
{
|
||||
char tmp;
|
||||
|
||||
while (count > 0)
|
||||
{
|
||||
tmp = ptr[0];
|
||||
ptr[0] = ptr[count-1];
|
||||
ptr[count-1] = tmp;
|
||||
ptr++;
|
||||
count -= 2;
|
||||
}
|
||||
}
|
||||
|
||||
/* Given a character C, does it represent a general addressing mode? */
|
||||
#define Is_gen(c) \
|
||||
((c) == 'F' || (c) == 'L' || (c) == 'B' \
|
||||
|| (c) == 'W' || (c) == 'D' || (c) == 'A' || (c) == 'I' || (c) == 'Z')
|
||||
|
||||
/* Adressing modes. */
|
||||
#define Adrmod_index_byte 0x1c
|
||||
#define Adrmod_index_word 0x1d
|
||||
#define Adrmod_index_doubleword 0x1e
|
||||
#define Adrmod_index_quadword 0x1f
|
||||
|
||||
/* Is MODE an indexed addressing mode? */
|
||||
#define Adrmod_is_index(mode) \
|
||||
(mode == Adrmod_index_byte \
|
||||
|| mode == Adrmod_index_word \
|
||||
|| mode == Adrmod_index_doubleword \
|
||||
|| mode == Adrmod_index_quadword)
|
||||
|
||||
|
||||
/* Print the 32000 instruction at address MEMADDR in debugged memory,
|
||||
on STREAM. Returns length of the instruction, in bytes. */
|
||||
|
||||
int
|
||||
print_insn_ns32k (memaddr, info)
|
||||
bfd_vma memaddr;
|
||||
disassemble_info *info;
|
||||
{
|
||||
register int i;
|
||||
register unsigned char *p;
|
||||
register char *d;
|
||||
unsigned short first_word;
|
||||
int gen, disp;
|
||||
int ioffset; /* bits into instruction */
|
||||
int aoffset; /* bits into arguments */
|
||||
char arg_bufs[MAX_ARGS+1][ARG_LEN];
|
||||
int argnum;
|
||||
int maxarg;
|
||||
struct private priv;
|
||||
bfd_byte *buffer = priv.the_buffer;
|
||||
dis_info = info;
|
||||
|
||||
info->private_data = (PTR) &priv;
|
||||
priv.max_fetched = priv.the_buffer;
|
||||
priv.insn_start = memaddr;
|
||||
if (setjmp (priv.bailout) != 0)
|
||||
/* Error return. */
|
||||
return -1;
|
||||
|
||||
/* Look for 8bit opcodes first. Other wise, fetching two bytes could take
|
||||
* us over the end of accessible data unnecessarilly
|
||||
*/
|
||||
FETCH_DATA(info, buffer + 1);
|
||||
for (i = 0; i < NOPCODES; i++)
|
||||
if (ns32k_opcodes[i].opcode_id_size <= 8
|
||||
&& ((buffer[0] & ((1 << ns32k_opcodes[i].opcode_id_size) - 1))
|
||||
== ns32k_opcodes[i].opcode_seed))
|
||||
break;
|
||||
if (i == NOPCODES) {
|
||||
/* Maybe it is 9 to 16 bits big */
|
||||
FETCH_DATA(info, buffer + 2);
|
||||
first_word = read_memory_integer(buffer, 2);
|
||||
|
||||
for (i = 0; i < NOPCODES; i++)
|
||||
if ((first_word & ((1 << ns32k_opcodes[i].opcode_id_size) - 1))
|
||||
== ns32k_opcodes[i].opcode_seed)
|
||||
break;
|
||||
|
||||
/* Handle undefined instructions. */
|
||||
if (i == NOPCODES)
|
||||
{
|
||||
(*dis_info->fprintf_func)(dis_info->stream, "0%o", buffer[0]);
|
||||
return 1;
|
||||
}
|
||||
}
|
||||
|
||||
(*dis_info->fprintf_func)(dis_info->stream, "%s", ns32k_opcodes[i].name);
|
||||
|
||||
ioffset = ns32k_opcodes[i].opcode_size;
|
||||
aoffset = ns32k_opcodes[i].opcode_size;
|
||||
d = ns32k_opcodes[i].operands;
|
||||
|
||||
if (*d)
|
||||
{
|
||||
/* Offset in bits of the first thing beyond each index byte.
|
||||
Element 0 is for operand A and element 1 is for operand B.
|
||||
The rest are irrelevant, but we put them here so we don't
|
||||
index outside the array. */
|
||||
int index_offset[MAX_ARGS];
|
||||
|
||||
/* 0 for operand A, 1 for operand B, greater for other args. */
|
||||
int whicharg = 0;
|
||||
|
||||
(*dis_info->fprintf_func)(dis_info->stream, "\t");
|
||||
|
||||
maxarg = 0;
|
||||
|
||||
/* First we have to find and keep track of the index bytes,
|
||||
if we are using scaled indexed addressing mode, since the index
|
||||
bytes occur right after the basic instruction, not as part
|
||||
of the addressing extension. */
|
||||
if (Is_gen(d[1]))
|
||||
{
|
||||
int addr_mode = bit_extract (buffer, ioffset - 5, 5);
|
||||
|
||||
if (Adrmod_is_index (addr_mode))
|
||||
{
|
||||
aoffset += 8;
|
||||
index_offset[0] = aoffset;
|
||||
}
|
||||
}
|
||||
if (d[2] && Is_gen(d[3]))
|
||||
{
|
||||
int addr_mode = bit_extract (buffer, ioffset - 10, 5);
|
||||
|
||||
if (Adrmod_is_index (addr_mode))
|
||||
{
|
||||
aoffset += 8;
|
||||
index_offset[1] = aoffset;
|
||||
}
|
||||
}
|
||||
|
||||
while (*d)
|
||||
{
|
||||
argnum = *d - '1';
|
||||
d++;
|
||||
if (argnum > maxarg && argnum < MAX_ARGS)
|
||||
maxarg = argnum;
|
||||
ioffset = print_insn_arg (*d, ioffset, &aoffset, buffer,
|
||||
memaddr, arg_bufs[argnum],
|
||||
index_offset[whicharg]);
|
||||
d++;
|
||||
whicharg++;
|
||||
}
|
||||
for (argnum = 0; argnum <= maxarg; argnum++)
|
||||
{
|
||||
CORE_ADDR addr;
|
||||
char *ch;
|
||||
for (ch = arg_bufs[argnum]; *ch;)
|
||||
{
|
||||
if (*ch == NEXT_IS_ADDR)
|
||||
{
|
||||
++ch;
|
||||
addr = atoi (ch);
|
||||
(*dis_info->print_address_func) (addr, dis_info);
|
||||
while (*ch && *ch != NEXT_IS_ADDR)
|
||||
++ch;
|
||||
if (*ch)
|
||||
++ch;
|
||||
}
|
||||
else
|
||||
(*dis_info->fprintf_func)(dis_info->stream, "%c", *ch++);
|
||||
}
|
||||
if (argnum < maxarg)
|
||||
(*dis_info->fprintf_func)(dis_info->stream, ", ");
|
||||
}
|
||||
}
|
||||
return aoffset / 8;
|
||||
}
|
||||
|
||||
/* Print an instruction operand of category given by d. IOFFSET is
|
||||
the bit position below which small (<1 byte) parts of the operand can
|
||||
be found (usually in the basic instruction, but for indexed
|
||||
addressing it can be in the index byte). AOFFSETP is a pointer to the
|
||||
bit position of the addressing extension. BUFFER contains the
|
||||
instruction. ADDR is where BUFFER was read from. Put the disassembled
|
||||
version of the operand in RESULT. INDEX_OFFSET is the bit position
|
||||
of the index byte (it contains garbage if this operand is not a
|
||||
general operand using scaled indexed addressing mode). */
|
||||
|
||||
print_insn_arg (d, ioffset, aoffsetp, buffer, addr, result, index_offset)
|
||||
char d;
|
||||
int ioffset, *aoffsetp;
|
||||
char *buffer;
|
||||
CORE_ADDR addr;
|
||||
char *result;
|
||||
int index_offset;
|
||||
{
|
||||
int addr_mode;
|
||||
float Fvalue;
|
||||
double Lvalue;
|
||||
int Ivalue;
|
||||
int disp1, disp2;
|
||||
int index;
|
||||
int size;
|
||||
|
||||
switch (d)
|
||||
{
|
||||
case 'f':
|
||||
/* a "gen" operand but 5 bits from the end of instruction */
|
||||
ioffset -= 5;
|
||||
case 'Z':
|
||||
case 'F':
|
||||
case 'L':
|
||||
case 'I':
|
||||
case 'B':
|
||||
case 'W':
|
||||
case 'D':
|
||||
case 'A':
|
||||
addr_mode = bit_extract (buffer, ioffset-5, 5);
|
||||
ioffset -= 5;
|
||||
switch (addr_mode)
|
||||
{
|
||||
case 0x0: case 0x1: case 0x2: case 0x3:
|
||||
case 0x4: case 0x5: case 0x6: case 0x7:
|
||||
/* register mode R0 -- R7 */
|
||||
switch (d)
|
||||
{
|
||||
case 'F':
|
||||
case 'L':
|
||||
case 'Z':
|
||||
sprintf (result, "f%d", addr_mode);
|
||||
break;
|
||||
default:
|
||||
sprintf (result, "r%d", addr_mode);
|
||||
}
|
||||
break;
|
||||
case 0x8: case 0x9: case 0xa: case 0xb:
|
||||
case 0xc: case 0xd: case 0xe: case 0xf:
|
||||
/* Register relative disp(R0 -- R7) */
|
||||
disp1 = get_displacement (buffer, aoffsetp);
|
||||
sprintf (result, "%d(r%d)", disp1, addr_mode & 7);
|
||||
break;
|
||||
case 0x10:
|
||||
case 0x11:
|
||||
case 0x12:
|
||||
/* Memory relative disp2(disp1(FP, SP, SB)) */
|
||||
disp1 = get_displacement (buffer, aoffsetp);
|
||||
disp2 = get_displacement (buffer, aoffsetp);
|
||||
sprintf (result, "%d(%d(%s))", disp2, disp1,
|
||||
addr_mode==0x10?"fp":addr_mode==0x11?"sp":"sb");
|
||||
break;
|
||||
case 0x13:
|
||||
/* reserved */
|
||||
sprintf (result, "reserved");
|
||||
break;
|
||||
case 0x14:
|
||||
/* Immediate */
|
||||
switch (d)
|
||||
{
|
||||
case 'I': case 'Z': case 'A':
|
||||
/* I and Z are output operands and can`t be immediate
|
||||
* A is an address and we can`t have the address of
|
||||
* an immediate either. We don't know how much to increase
|
||||
* aoffsetp by since whatever generated this is broken
|
||||
* anyway!
|
||||
*/
|
||||
sprintf (result, "$<undefined>");
|
||||
break;
|
||||
case 'B':
|
||||
Ivalue = bit_extract (buffer, *aoffsetp, 8);
|
||||
Ivalue = sign_extend (Ivalue, 8);
|
||||
*aoffsetp += 8;
|
||||
sprintf (result, "$%d", Ivalue);
|
||||
break;
|
||||
case 'W':
|
||||
Ivalue = bit_extract (buffer, *aoffsetp, 16);
|
||||
flip_bytes (&Ivalue, 2);
|
||||
*aoffsetp += 16;
|
||||
Ivalue = sign_extend (Ivalue, 16);
|
||||
sprintf (result, "$%d", Ivalue);
|
||||
break;
|
||||
case 'D':
|
||||
Ivalue = bit_extract (buffer, *aoffsetp, 32);
|
||||
flip_bytes (&Ivalue, 4);
|
||||
*aoffsetp += 32;
|
||||
sprintf (result, "$%d", Ivalue);
|
||||
break;
|
||||
case 'F':
|
||||
bit_copy (buffer, *aoffsetp, 32, (char *) &Fvalue);
|
||||
flip_bytes (&Fvalue, 4);
|
||||
*aoffsetp += 32;
|
||||
if (INVALID_FLOAT (&Fvalue, 4))
|
||||
sprintf (result, "<<invalid float 0x%.8x>>", *(int *) &Fvalue);
|
||||
else /* assume host has ieee float */
|
||||
sprintf (result, "$%g", Fvalue);
|
||||
break;
|
||||
case 'L':
|
||||
bit_copy (buffer, *aoffsetp, 64, (char *) &Lvalue);
|
||||
flip_bytes (&Lvalue, 8);
|
||||
*aoffsetp += 64;
|
||||
if (INVALID_FLOAT (&Lvalue, 8))
|
||||
sprintf (result, "<<invalid long 0x%.8x%.8x>>",
|
||||
*(((int *) &Lvalue) + 1), *(int *) &Lvalue);
|
||||
else /* assume host has ieee float */
|
||||
sprintf (result, "$%g", Lvalue);
|
||||
break;
|
||||
}
|
||||
break;
|
||||
case 0x15:
|
||||
/* Absolute @disp */
|
||||
disp1 = get_displacement (buffer, aoffsetp);
|
||||
sprintf (result, "@|%d|", disp1);
|
||||
break;
|
||||
case 0x16:
|
||||
/* External EXT(disp1) + disp2 (Mod table stuff) */
|
||||
disp1 = get_displacement (buffer, aoffsetp);
|
||||
disp2 = get_displacement (buffer, aoffsetp);
|
||||
sprintf (result, "EXT(%d) + %d", disp1, disp2);
|
||||
break;
|
||||
case 0x17:
|
||||
/* Top of stack tos */
|
||||
sprintf (result, "tos");
|
||||
break;
|
||||
case 0x18:
|
||||
/* Memory space disp(FP) */
|
||||
disp1 = get_displacement (buffer, aoffsetp);
|
||||
sprintf (result, "%d(fp)", disp1);
|
||||
break;
|
||||
case 0x19:
|
||||
/* Memory space disp(SP) */
|
||||
disp1 = get_displacement (buffer, aoffsetp);
|
||||
sprintf (result, "%d(sp)", disp1);
|
||||
break;
|
||||
case 0x1a:
|
||||
/* Memory space disp(SB) */
|
||||
disp1 = get_displacement (buffer, aoffsetp);
|
||||
sprintf (result, "%d(sb)", disp1);
|
||||
break;
|
||||
case 0x1b:
|
||||
/* Memory space disp(PC) */
|
||||
disp1 = get_displacement (buffer, aoffsetp);
|
||||
sprintf (result, "|%d|", addr + disp1);
|
||||
break;
|
||||
case 0x1c:
|
||||
case 0x1d:
|
||||
case 0x1e:
|
||||
case 0x1f:
|
||||
/* Scaled index basemode[R0 -- R7:B,W,D,Q] */
|
||||
index = bit_extract (buffer, index_offset - 8, 3);
|
||||
print_insn_arg (d, index_offset, aoffsetp, buffer, addr,
|
||||
result, 0);
|
||||
{
|
||||
static char *ind[] = {"b", "w", "d", "q"};
|
||||
char *off;
|
||||
|
||||
off = result + strlen (result);
|
||||
sprintf (off, "[r%d:%s]", index,
|
||||
ind[addr_mode & 3]);
|
||||
}
|
||||
break;
|
||||
}
|
||||
break;
|
||||
case 'H':
|
||||
case 'q':
|
||||
Ivalue = bit_extract (buffer, ioffset-4, 4);
|
||||
Ivalue = sign_extend (Ivalue, 4);
|
||||
sprintf (result, "%d", Ivalue);
|
||||
ioffset -= 4;
|
||||
break;
|
||||
case 'r':
|
||||
Ivalue = bit_extract (buffer, ioffset-3, 3);
|
||||
sprintf (result, "r%d", Ivalue&7);
|
||||
ioffset -= 3;
|
||||
break;
|
||||
case 'd':
|
||||
sprintf (result, "%d", get_displacement (buffer, aoffsetp));
|
||||
break;
|
||||
case 'b':
|
||||
Ivalue = get_displacement (buffer, aoffsetp);
|
||||
/*
|
||||
* Warning!! HACK ALERT!
|
||||
* Operand type 'b' is only used by the cmp{b,w,d} and
|
||||
* movm{b,w,d} instructions; we need to know whether
|
||||
* it's a `b' or `w' or `d' instruction; and for both
|
||||
* cmpm and movm it's stored at the same place so we
|
||||
* just grab two bits of the opcode and look at it...
|
||||
*
|
||||
*/
|
||||
size = bit_extract(buffer, ioffset-6, 2);
|
||||
if (size == 0) /* 00 => b */
|
||||
size = 1;
|
||||
else if (size == 1) /* 01 => w */
|
||||
size = 2;
|
||||
else
|
||||
size = 4; /* 11 => d */
|
||||
|
||||
sprintf (result, "%d", (Ivalue / size) + 1);
|
||||
break;
|
||||
case 'p':
|
||||
sprintf (result, "%c%d%c", NEXT_IS_ADDR,
|
||||
addr + get_displacement (buffer, aoffsetp),
|
||||
NEXT_IS_ADDR);
|
||||
break;
|
||||
case 'i':
|
||||
Ivalue = bit_extract (buffer, *aoffsetp, 8);
|
||||
*aoffsetp += 8;
|
||||
sprintf (result, "0x%x", Ivalue);
|
||||
break;
|
||||
case 'u':
|
||||
Ivalue = bit_extract (buffer, *aoffsetp, 8);
|
||||
optlist(Ivalue, opt_u, result);
|
||||
*aoffsetp += 8;
|
||||
break;
|
||||
case 'U':
|
||||
Ivalue = bit_extract(buffer, *aoffsetp, 8);
|
||||
optlist(Ivalue, opt_U, result);
|
||||
*aoffsetp += 8;
|
||||
break;
|
||||
case 'O':
|
||||
Ivalue = bit_extract(buffer, ioffset-9, 9);
|
||||
optlist(Ivalue, opt_O, result);
|
||||
ioffset -= 9;
|
||||
break;
|
||||
case 'C':
|
||||
Ivalue = bit_extract(buffer, ioffset-4, 4);
|
||||
optlist(Ivalue, opt_C, result);
|
||||
ioffset -= 4;
|
||||
break;
|
||||
case 'S':
|
||||
Ivalue = bit_extract(buffer, ioffset - 8, 8);
|
||||
optlist(Ivalue, opt_S, result);
|
||||
ioffset -= 8;
|
||||
break;
|
||||
case 'M':
|
||||
Ivalue = bit_extract(buffer, ioffset-4, 4);
|
||||
list_search(Ivalue, 0 ? list_M032 : list_M532, result);
|
||||
ioffset -= 4;
|
||||
break;
|
||||
case 'P':
|
||||
Ivalue = bit_extract(buffer, ioffset-4, 4);
|
||||
list_search(Ivalue, 0 ? list_P032 : list_P532, result);
|
||||
ioffset -= 4;
|
||||
break;
|
||||
case 'g':
|
||||
Ivalue = bit_extract(buffer, *aoffsetp, 3);
|
||||
sprintf(result, "%d", Ivalue);
|
||||
*aoffsetp += 3;
|
||||
break;
|
||||
case 'G':
|
||||
Ivalue = bit_extract(buffer, *aoffsetp, 5);
|
||||
sprintf(result, "%d", Ivalue + 1);
|
||||
*aoffsetp += 5;
|
||||
break;
|
||||
}
|
||||
return ioffset;
|
||||
}
|
||||
|
||||
get_displacement (buffer, aoffsetp)
|
||||
char *buffer;
|
||||
int *aoffsetp;
|
||||
{
|
||||
int Ivalue;
|
||||
short Ivalue2;
|
||||
|
||||
Ivalue = bit_extract (buffer, *aoffsetp, 8);
|
||||
switch (Ivalue & 0xc0)
|
||||
{
|
||||
case 0x00:
|
||||
case 0x40:
|
||||
Ivalue = sign_extend (Ivalue, 7);
|
||||
*aoffsetp += 8;
|
||||
break;
|
||||
case 0x80:
|
||||
Ivalue2 = bit_extract (buffer, *aoffsetp, 16);
|
||||
flip_bytes (&Ivalue2, 2);
|
||||
Ivalue = sign_extend (Ivalue2, 14);
|
||||
*aoffsetp += 16;
|
||||
break;
|
||||
case 0xc0:
|
||||
Ivalue = bit_extract (buffer, *aoffsetp, 32);
|
||||
flip_bytes (&Ivalue, 4);
|
||||
Ivalue = sign_extend (Ivalue, 30);
|
||||
*aoffsetp += 32;
|
||||
break;
|
||||
}
|
||||
return Ivalue;
|
||||
}
|
||||
|
||||
|
||||
#if 1 /* a version that should work on ns32k f's&d's on any machine */
|
||||
int invalid_float(p, len)
|
||||
register union { double d; float f; } *p;
|
||||
register int len;
|
||||
{
|
||||
register val;
|
||||
|
||||
if ( len == sizeof (float) )
|
||||
val = (bit_extract(&p.f, 23, 8)/*exponent*/ == 0xff
|
||||
|| (bit_extract(&p, 23, 8)/*exponent*/ == 0 &&
|
||||
bit_extract(&p, 0, 23)/*mantisa*/ != 0));
|
||||
else if ( len == sizeof (double) )
|
||||
val = (bit_extract(&p.d, 52, 11)/*exponent*/ == 0x7ff
|
||||
|| (bit_extract(&p, 52, 11)/*exponent*/ == 0
|
||||
&& (bit_extract(&p, 0, 32)/*low mantisa*/ != 0
|
||||
|| bit_extract(&p, 32, 20)/*high mantisa*/ != 0)));
|
||||
else
|
||||
val = 1;
|
||||
return (val);
|
||||
}
|
||||
#else
|
||||
|
||||
/* assumes the bytes have been swapped to local order */
|
||||
typedef union { double d;
|
||||
float f;
|
||||
struct { unsigned m:23, e:8, :1;} sf;
|
||||
struct { unsigned lm; unsigned m:20, e:11, :1;} sd;
|
||||
} float_type_u;
|
||||
|
||||
int invalid_float(p, len)
|
||||
register float_type_u *p;
|
||||
register int len;
|
||||
{
|
||||
register int val;
|
||||
if ( len == sizeof (float) )
|
||||
val = (p->sf.e == 0xff
|
||||
|| (p->sf.e == 0 && p->sf.m != 0));
|
||||
else if ( len == sizeof (double) )
|
||||
val = (p->sd.e == 0x7ff
|
||||
|| (p->sd.e == 0 && (p->sd.m != 0 || p->sd.lm != 0)));
|
||||
else
|
||||
val = 1;
|
||||
return (val);
|
||||
}
|
||||
#endif
|
||||
Loading…
Reference in New Issue
Block a user