[GOLD] PowerPC relocation signed overflow check
Relocations with right shifts were calculating wrong overflow status. Since the addr34 split-field reloc is implemented as an 18-bit high part with value shifted right by 16 and a 16-bit low part, most of the pc-relative relocs were affected. * powerpc.cc (Powerpc_relocate_functions::rela, rela_ua): Perform signed right shift for signed overflow check.
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2019-08-02 Alan Modra <amodra@gmail.com>
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* powerpc.cc (Powerpc_relocate_functions::rela, rela_ua): Perform
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signed right shift for signed overflow check.
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2019-07-29 Martin Liska <mliska@suse.cz>
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PR 24768
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@ -1996,11 +1996,15 @@ private:
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typedef typename elfcpp::Swap<fieldsize, big_endian>::Valtype Valtype;
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Valtype* wv = reinterpret_cast<Valtype*>(view);
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Valtype val = elfcpp::Swap<fieldsize, big_endian>::readval(wv);
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Valtype reloc = value >> right_shift;
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if (overflow == CHECK_SIGNED)
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value = static_cast<SignedAddress>(value) >> right_shift;
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else
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value = value >> right_shift;
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Valtype reloc = value;
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val &= ~dst_mask;
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reloc &= dst_mask;
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elfcpp::Swap<fieldsize, big_endian>::writeval(wv, val | reloc);
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return overflowed<valsize>(value >> right_shift, overflow);
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return overflowed<valsize>(value, overflow);
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}
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// Do a simple RELA relocation, unaligned.
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@ -2023,11 +2027,15 @@ private:
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typedef typename elfcpp::Swap_unaligned<fieldsize, big_endian>::Valtype
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Valtype;
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Valtype val = elfcpp::Swap<fieldsize, big_endian>::readval(view);
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Valtype reloc = value >> right_shift;
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if (overflow == CHECK_SIGNED)
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value = static_cast<SignedAddress>(value) >> right_shift;
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else
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value = value >> right_shift;
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Valtype reloc = value;
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val &= ~dst_mask;
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reloc &= dst_mask;
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elfcpp::Swap_unaligned<fieldsize, big_endian>::writeval(view, val | reloc);
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return overflowed<valsize>(value >> right_shift, overflow);
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return overflowed<valsize>(value, overflow);
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}
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public:
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